| /linux-4.1.27/arch/m32r/lib/ |
| H A D | ashxdi3.S | 10 ; input r2 shift val
23 cmpz r2 || ldi r3, #32
24 jc r14 || cmpu r2, r3
28 addi r2, #-32
29 sra r1, r2
33 mv r3, r0 || srl r1, r2
34 sra r0, r2 || neg r2, r2
35 sll r3, r2
43 cmpz r2 || ldi r3, #32
44 jc r14 || cmpu r2, r3
47 mv r0, r1 || addi r2, #-32
48 sll r0, r2 || ldi r1, #0
52 mv r3, r1 || sll r0, r2
53 sll r1, r2 || neg r2, r2
54 srl r3, r2
60 cmpz r2 || ldi r3, #32
61 jc r14 || cmpu r2, r3
64 mv r1, r0 || addi r2, #-32
65 ldi r0, #0 || srl r1, r2
69 mv r3, r0 || srl r1, r2
70 srl r0, r2 || neg r2, r2
71 sll r3, r2
80 cmpz r2 || ldi r3, #32
81 jc r14 || cmpu r2, r3
85 addi r2, #-32
86 sra r0, r2
90 mv r3, r1 || srl r0, r2
91 sra r1, r2 || neg r2, r2
92 sll r3, r2
100 cmpz r2 || ldi r3, #32
101 jc r14 || cmpu r2, r3
104 mv r1, r0 || addi r2, #-32
105 sll r1, r2 || ldi r0, #0
109 mv r3, r0 || sll r1, r2
110 sll r0, r2 || neg r2, r2
111 srl r3, r2
117 cmpz r2 || ldi r3, #32
118 jc r14 || cmpu r2, r3
121 mv r0, r1 || addi r2, #-32
122 ldi r1, #0 || srl r0, r2
126 mv r3, r1 || srl r0, r2
127 srl r1, r2 || neg r2, r2
128 sll r3, r2
141 beqz r2, 2f
142 cmpui r2, #32
147 addi r2, #-32
148 sra r1, r2
153 srl r1, r2
154 sra r0, r2
155 neg r2, r2
156 sll r3, r2
167 beqz r2, 2f
168 cmpui r2, #32
172 addi r2, #-32
173 sll r0, r2
179 sll r0, r2
180 sll r1, r2
181 neg r2, r2
182 srl r3, r2
191 beqz r2, 2f
192 cmpui r2, #32
197 addi r2, #-32
198 srl r1, r2
203 srl r1, r2
204 srl r0, r2
205 neg r2, r2
206 sll r3, r2
218 beqz r2, 2f
219 cmpui r2, #32
224 addi r2, #-32
225 sra r0, r2
230 srl r0, r2
231 sra r1, r2
232 neg r2, r2
233 sll r3, r2
244 beqz r2, 2f
245 cmpui r2, #32
249 addi r2, #-32
250 sll r1, r2
256 sll r1, r2
257 sll r0, r2
258 neg r2, r2
259 srl r3, r2
268 beqz r2, 2f
269 cmpui r2, #32
274 addi r2, #-32
275 srl r0, r2
280 srl r0, r2
281 srl r1, r2
282 neg r2, r2
283 sll r3, r2
|
| H A D | memset.S | 11 * len: r2
23 mv r4, r0 || cmpz r2
25 cmpui r2, #16
27 cmpui r2, #4
36 addi r2, #-1 || addi r3, #-1
38 cmpui r2, #4
45 or r1, r3 || addi r2, #-4
47 st r1, @+r4 || addi r2, #-4
48 bgtz r2, word_set_loop
49 bnez r2, byte_set_wrap
64 st r1, @+r4 || addi r2, #-16
65 st r1, @+r4 || cmpu r2, r5
68 bnc qword_set_loop || cmpz r2
71 cmpui r2, #4
73 addi r2, #-4
77 addi r2, #4
78 cmpz r2
84 addi r2, #-1 || stb r1, @r4+
85 bnez r2, byte_set
88 addi r2, #-1 || stb r1, @r4
90 bnez r2, byte_set
102 beqz r2, end_memset
103 cmpui r2, #16
105 cmpui r2, #4
115 addi r2, #-1
118 cmpui r2, #4
126 addi r2, #-4
130 addi r2, #-4
131 bgtz r2, word_set_loop
132 bnez r2, byte_set_wrap
148 addi r2, #-16
151 cmpui r2, #16
155 bnez r2, set_remainder
158 cmpui r2, #4
160 addi r2, #-4
164 addi r2, #4
165 beqz r2, end_memset
169 addi r2, #-1
172 bnez r2, byte_set
|
| H A D | memcpy.S | 11 * n : r2
24 or r7, r1 || cmpz r2
25 jc r14 || cmpeq r0, r1 ; return if r2=0
30 srl3 r3, r2, #2
31 and3 r2, r2, #3
36 st r7, @+r4 || cmpz r2
38 addi r4, #4 || jc r14 ; return if r2=0
42 addi r2, #-1 || stb r7, @r4+
43 bnez r2, byte_copy
47 addi r2, #-1 || stb r7, @r4
49 bnez r2, byte_copy
65 beqz r2, end_memcopy
69 srl3 r3, r2, #2
70 and3 r2, r2, #3
78 beqz r2, end_memcopy
83 addi r2, #-1
86 bnez r2, byte_copy
|
| H A D | strlen.S | 17 mv r6, r0 || ldi r2, #0
34 and r4, r1 || addi r2, #4
36 addi r2, #4 || bra.s strlen_word_loop
45 addi r2, #1 || bra.s strlen_byte
54 addi r2, #1 || bnc.s strlen_byte_loop
57 mv r0, r2 || jmp r14
64 ldi r2, #0
81 addi r2, #4
89 addi r2, #4
96 addi r2, #1
108 addi r2, #1
112 mv r0, r2
|
| /linux-4.1.27/arch/nios2/mm/ |
| H A D | uaccess.c | 16 " movi r2,7\n"
18 " bge r2,r6,1f\n"
19 " xor r2,r4,r5\n"
20 " andi r2,r2,3\n"
22 " beq r2,zero,4f\n"
24 " movi r2,-1\n"
25 " beq r6,r2,3f\n"
26 " mov r7,r2\n"
27 "2: ldbu r2,0(r5)\n"
30 " stb r2,0(r3)\n"
34 " addi r2,r6,1\n"
36 "13:mov r2,r6\n"
38 "4: andi r2,r4,1\n"
39 " cmpeq r2,r2,zero\n"
40 " beq r2,zero,7f\n"
41 "5: andi r2,r3,2\n"
42 " beq r2,zero,6f\n"
43 "9: ldhu r2,0(r5)\n"
46 " sth r2,0(r3)\n"
49 "10:ldw r2,0(r5)\n"
52 " stw r2,0(r3)\n"
55 "7: ldbu r2,0(r5)\n"
59 " stb r2,0(r4)\n"
74 " movi r2,7\n"
76 " bge r2,r6,1f\n"
77 " xor r2,r4,r5\n"
78 " andi r2,r2,3\n"
80 " beq r2,zero,4f\n"
83 " movi r2,-1\n"
84 " beq r6,r2,3f\n"
86 " mov r7,r2\n"
87 "2: ldbu r2,0(r5)\n"
89 "9: stb r2,0(r3)\n"
93 "3: addi r2,r6,1\n"
95 "13:mov r2,r6\n"
98 "4: andi r2,r4,1\n"
99 " cmpeq r2,r2,zero\n"
100 " beq r2,zero,7f\n"
102 "5: andi r2,r3,2\n"
103 " beq r2,zero,6f\n"
104 " ldhu r2,0(r5)\n"
106 "10:sth r2,0(r3)\n"
111 " ldw r2,0(r5)\n"
113 "11:stw r2,0(r3)\n"
118 "7: ldbu r2,0(r5)\n"
121 "12: stb r2,0(r4)\n"
|
| /linux-4.1.27/arch/arm/lib/ |
| H A D | bitops.h | 10 mov r2, #1
19 mov r3, r2, lsl r3 variable
20 1: ldrex r2, [r1] variable
21 \instr r2, r2, r3 variable
22 strex r0, r2, [r1] variable
35 mov r2, #1
39 mov r3, r2, lsl r3 @ create mask variable
46 1: ldrex r2, [r1]
47 ands r0, r2, r3 @ save old value of bit variable
48 \instr r2, r2, r3 @ toggle bit variable
49 strex ip, r2, [r1] variable
65 and r2, r0, #31
68 mov r3, r3, lsl r2
70 ldr r2, [r1, r0, lsl #2]
71 \instr r2, r2, r3
72 str r2, [r1, r0, lsl #2]
95 ldr r2, [r1, r0, lsl #2]!
97 tst r2, r0, lsl r3
98 \instr r2, r2, r0, lsl r3
99 \store r2, [r1]
|
| H A D | io-writesw-armv4.S | 29 sub r2, r2, #1
33 teq r2, #0
40 subs r2, r2, #8
44 subs r2, r2, #8
51 .Lno_outsw_8: tst r2, #4
58 .Lno_outsw_4: movs r2, r2, lsl #31
82 subcs r2, r2, #1
84 subs r2, r2, #2
91 subs r2, r2, #2
96 tst r2, #1
|
| H A D | getuser.S | 21 * r2, r3 contains the zero-extended value
36 check_uaccess r0, 1, r1, r2, __get_user_bad
37 1: TUSER(ldrb) r2, [r0]
43 check_uaccess r0, 2, r1, r2, __get_user_bad
46 2: ldrbt r2, [r0], #1
50 2: ldrb r2, [r0]
54 orr r2, r2, rb, lsl #8
56 orr r2, rb, r2, lsl #8
63 check_uaccess r0, 4, r1, r2, __get_user_bad
64 4: TUSER(ldr) r2, [r0]
70 check_uaccess r0, 8, r1, r2, __get_user_bad
72 5: TUSER(ldr) r2, [r0]
75 5: TUSER(ldr) r2, [r0], #4
84 check_uaccess r0, 8, r1, r2, __get_user_bad
87 7: ldrt r2, [r0]
89 7: ldr r2, [r0, #4]
96 check_uaccess r0, 1, r1, r2, __get_user_bad8
103 check_uaccess r0, 2, r1, r2, __get_user_bad8
119 check_uaccess r0, 4, r1, r2, __get_user_bad8
129 mov r2, #0
|
| H A D | io-readsw-armv4.S | 24 sub r2, r2, #1
28 teq r2, #0
35 subs r2, r2, #8
54 subs r2, r2, #8
58 .Lno_insw_8: tst r2, #4
71 .Lno_insw_4: movs r2, r2, lsl #31
101 sub r2, r2, #1
107 1: subs r2, r2, #2
113 subs r2, r2, #2
122 3: tst r2, #1
|
| H A D | putuser.S | 20 * r2, r3 contains the value
37 1: TUSER(strb) r2, [r0]
44 mov ip, r2, lsr #8
47 2: TUSER(strb) r2, [r0]
51 3: TUSER(strb) r2, [r0, #1]
55 2: TUSER(strb) r2, [r0], #1
59 3: TUSER(strb) r2, [r0]
68 4: TUSER(str) r2, [r0]
76 5: TUSER(str) r2, [r0]
79 5: TUSER(str) r2, [r0], #4
|
| H A D | csumpartialcopyuser.S | 21 stmfd sp!, {r1, r2, r4 - r8, lr}
25 ldmfd sp!, {r1, r2, r4 - r8, pc}
56 * r0 = src, r1 = dst, r2 = len, r3 = sum, [sp] = *err_ptr
76 ldmia sp, {r1, r2} @ retrieve dst, len
77 add r2, r2, r1
79 9002: teq r2, r1
|
| H A D | lib1funcs.S | 212 subs r2, r1, #1
217 tst r1, r2
220 ARM_DIV_BODY r0, r1, r2, r3
222 mov r0, r2
229 12: ARM_DIV2_ORDER r1, r2
231 mov r0, r0, lsr r2
241 subs r2, r1, #1 @ compare divisor with 1
245 tsthi r1, r2 @ see if divisor is power of 2
246 andeq r0, r0, r2
249 ARM_MOD_BODY r0, r1, r2, r3
264 subs r2, r1, #1 @ division by 1 or -1 ?
270 tst r1, r2 @ divisor is power of 2 ?
273 ARM_DIV_BODY r3, r1, r0, r2
288 12: ARM_DIV2_ORDER r1, r2
291 mov r0, r3, lsr r2
307 subs r2, r1, #1 @ compare divisor with 1
310 tsthi r1, r2 @ see if divisor is power of 2
311 andeq r0, r0, r2
314 ARM_MOD_BODY r0, r1, r2, r3
331 ldmfd sp!, {r1, r2, ip, lr}
332 mul r3, r0, r2
344 ldmfd sp!, {r1, r2, ip, lr}
345 mul r3, r0, r2
|
| H A D | muldi3.S | 19 #define yh r2
24 #define yl r2
|
| H A D | ucmpdi2.S | 19 #define yh r2
24 #define yl r2
|
| H A D | ashldi3.S | 43 subs r3, r2, #32
44 rsb ip, r2, #32
45 movmi ah, ah, lsl r2
50 mov al, al, lsl r2
|
| H A D | ashrdi3.S | 43 subs r3, r2, #32
44 rsb ip, r2, #32
45 movmi al, al, lsr r2
50 mov ah, ah, asr r2
|
| H A D | copy_from_user.S | 78 stmdb sp!, {r0, r2, r3, \reg1, \reg2}
82 UNWIND( .save {r0, r2, r3, \reg1, \reg2} )
101 ldmfd sp!, {r1, r2}
103 rsb r1, r3, r2
|
| H A D | copy_to_user.S | 81 stmdb sp!, {r0, r2, r3, \reg1, \reg2}
85 UNWIND( .save {r0, r2, r3, \reg1, \reg2} )
106 ldmfd sp!, {r1, r2, r3}
108 rsb r0, r0, r2
|
| H A D | lshrdi3.S | 43 subs r3, r2, #32
44 rsb ip, r2, #32
45 movmi al, al, lsr r2
50 mov ah, ah, lsr r2
|
| H A D | copy_page.S | 31 mov r2, #COPY_COUNT @ 1
40 subs r2, r2, #1 @ 1
|
| /linux-4.1.27/arch/sh/include/asm/ |
| H A D | switch_to_32.h | 11 register u32 *__ts2 __asm__ ("r2") = \
15 "movs.l @r2+, a0\n\t" \
16 "movs.l @r2+, a1\n\t" \
17 "movs.l @r2+, a0g\n\t" \
18 "movs.l @r2+, a1g\n\t" \
19 "movs.l @r2+, m0\n\t" \
20 "movs.l @r2+, m1\n\t" \
21 "movs.l @r2+, x0\n\t" \
22 "movs.l @r2+, x1\n\t" \
23 "movs.l @r2+, y0\n\t" \
24 "movs.l @r2+, y1\n\t" \
25 "lds.l @r2+, dsr\n\t" \
26 "ldc.l @r2+, rs\n\t" \
27 "ldc.l @r2+, re\n\t" \
28 "ldc.l @r2+, mod\n\t" \
34 register u32 *__ts2 __asm__ ("r2") = \
39 "stc.l mod, @-r2\n\t" \
40 "stc.l re, @-r2\n\t" \
41 "stc.l rs, @-r2\n\t" \
42 "sts.l dsr, @-r2\n\t" \
43 "movs.l y1, @-r2\n\t" \
44 "movs.l y0, @-r2\n\t" \
45 "movs.l x1, @-r2\n\t" \
46 "movs.l x0, @-r2\n\t" \
47 "movs.l m1, @-r2\n\t" \
48 "movs.l m0, @-r2\n\t" \
49 "movs.l a1g, @-r2\n\t" \
50 "movs.l a0g, @-r2\n\t" \
51 "movs.l a1, @-r2\n\t" \
52 "movs.l a0, @-r2\n\t" \
72 register u32 *__ts2 __asm__ ("r2"); \
103 "mov.l %0, @r2\t! save PC\n\t" \
|
| /linux-4.1.27/sound/oss/ |
| H A D | vidc_fill.S | 27 str r4, [r2], #4
28 cmp r2, r3
41 str r4, [r2], #4
42 cmp r2, r3
53 str r4, [r2], #4
54 cmp r2, r3
67 str r4, [r2], #4
68 cmp r2, r3
80 str r4, [r2], #4
85 strlt r4, [r2], #4
86 cmp r2, r3
96 str r4, [r2], #4
99 strlt r4, [r2], #4
100 cmp r2, r3
109 1: cmp r2, r3
110 stmltia r2!, {r0, r1, r4, r5}
117 tst r2, #4
118 str r0, [r2], #4
119 tst r2, #8
120 stmia r2!, {r0, r1}
127 * r2 = buffer
130 * r2 = new buffer finish
139 ldmia r8, {r0, r1, r2, r3, r4, r5}
150 moveq r2, r3 @ DMAing A, update B
151 add r3, r2, r5 @ End of DMA buffer
158 tst r2, #4 @ Round buffer up to 4 words
159 strne r0, [r2], #4
160 tst r2, #8
161 strne r0, [r2], #4
162 strne r0, [r2], #4
163 sub r2, r2, #16
164 mov r2, r2, lsl #20
165 movs r2, r2, lsr #20
166 orreq r2, r2, #1 << 30 @ Set L bit
167 orr r2, r2, r7
174 streq r2, [ip, #IOMD_SD0ENDB]
175 strne r2, [ip, #IOMD_SD0ENDA]
182 strne r2, [ip, #IOMD_SD0ENDB]
183 streq r2, [ip, #IOMD_SD0ENDA]
211 .long 0 @ r2
|
| /linux-4.1.27/crypto/ |
| H A D | serpent_generic.c | 237 u32 r0, r1, r2, r3, r4; __serpent_setkey() local
253 r2 = le32_to_cpu(k[5]); __serpent_setkey()
257 keyiter(le32_to_cpu(k[0]), r0, r4, r2, 0, 0); __serpent_setkey() local
259 keyiter(le32_to_cpu(k[2]), r2, r1, r4, 2, 2); __serpent_setkey() local
260 keyiter(le32_to_cpu(k[3]), r3, r2, r0, 3, 3); __serpent_setkey() local
262 keyiter(le32_to_cpu(k[5]), r0, r4, r2, 5, 5); __serpent_setkey() local
264 keyiter(le32_to_cpu(k[7]), r2, r1, r4, 7, 7); __serpent_setkey() local
266 keyiter(k[0], r3, r2, r0, 8, 8); __serpent_setkey()
268 keyiter(k[2], r0, r4, r2, 10, 10); __serpent_setkey()
270 keyiter(k[4], r2, r1, r4, 12, 12); __serpent_setkey()
271 keyiter(k[5], r3, r2, r0, 13, 13); __serpent_setkey()
273 keyiter(k[7], r0, r4, r2, 15, 15); __serpent_setkey()
275 keyiter(k[9], r2, r1, r4, 17, 17); __serpent_setkey()
276 keyiter(k[10], r3, r2, r0, 18, 18); __serpent_setkey()
278 keyiter(k[12], r0, r4, r2, 20, 20); __serpent_setkey()
280 keyiter(k[14], r2, r1, r4, 22, 22); __serpent_setkey()
281 keyiter(k[15], r3, r2, r0, 23, 23); __serpent_setkey()
283 keyiter(k[17], r0, r4, r2, 25, 25); __serpent_setkey()
285 keyiter(k[19], r2, r1, r4, 27, 27); __serpent_setkey()
286 keyiter(k[20], r3, r2, r0, 28, 28); __serpent_setkey()
288 keyiter(k[22], r0, r4, r2, 30, 30); __serpent_setkey()
293 keyiter(k[-26], r2, r1, r4, 32, -18); __serpent_setkey()
294 keyiter(k[-25], r3, r2, r0, 33, -17); __serpent_setkey()
296 keyiter(k[-23], r0, r4, r2, 35, -15); __serpent_setkey()
298 keyiter(k[-21], r2, r1, r4, 37, -13); __serpent_setkey()
299 keyiter(k[-20], r3, r2, r0, 38, -12); __serpent_setkey()
301 keyiter(k[-18], r0, r4, r2, 40, -10); __serpent_setkey()
303 keyiter(k[-16], r2, r1, r4, 42, -8); __serpent_setkey()
304 keyiter(k[-15], r3, r2, r0, 43, -7); __serpent_setkey()
306 keyiter(k[-13], r0, r4, r2, 45, -5); __serpent_setkey()
308 keyiter(k[-11], r2, r1, r4, 47, -3); __serpent_setkey()
309 keyiter(k[-10], r3, r2, r0, 48, -2); __serpent_setkey()
311 keyiter(k[-8], r0, r4, r2, 50, 0); __serpent_setkey()
313 keyiter(k[-6], r2, r1, r4, 52, 2); __serpent_setkey()
314 keyiter(k[-5], r3, r2, r0, 53, 3); __serpent_setkey()
316 keyiter(k[-3], r0, r4, r2, 55, 5); __serpent_setkey()
318 keyiter(k[-1], r2, r1, r4, 57, 7); __serpent_setkey()
319 keyiter(k[0], r3, r2, r0, 58, 8); __serpent_setkey()
321 keyiter(k[2], r0, r4, r2, 60, 10); __serpent_setkey()
323 keyiter(k[4], r2, r1, r4, 62, 12); __serpent_setkey()
324 keyiter(k[5], r3, r2, r0, 63, 13); __serpent_setkey()
326 keyiter(k[7], r0, r4, r2, 65, 15); __serpent_setkey()
328 keyiter(k[9], r2, r1, r4, 67, 17); __serpent_setkey()
329 keyiter(k[10], r3, r2, r0, 68, 18); __serpent_setkey()
331 keyiter(k[12], r0, r4, r2, 70, 20); __serpent_setkey()
333 keyiter(k[14], r2, r1, r4, 72, 22); __serpent_setkey()
334 keyiter(k[15], r3, r2, r0, 73, 23); __serpent_setkey()
336 keyiter(k[17], r0, r4, r2, 75, 25); __serpent_setkey()
338 keyiter(k[19], r2, r1, r4, 77, 27); __serpent_setkey()
339 keyiter(k[20], r3, r2, r0, 78, 28); __serpent_setkey()
341 keyiter(k[22], r0, r4, r2, 80, 30); __serpent_setkey()
346 keyiter(k[-26], r2, r1, r4, 82, -18); __serpent_setkey()
347 keyiter(k[-25], r3, r2, r0, 83, -17); __serpent_setkey()
349 keyiter(k[-23], r0, r4, r2, 85, -15); __serpent_setkey()
351 keyiter(k[-21], r2, r1, r4, 87, -13); __serpent_setkey()
352 keyiter(k[-20], r3, r2, r0, 88, -12); __serpent_setkey()
354 keyiter(k[-18], r0, r4, r2, 90, -10); __serpent_setkey()
356 keyiter(k[-16], r2, r1, r4, 92, -8); __serpent_setkey()
357 keyiter(k[-15], r3, r2, r0, 93, -7); __serpent_setkey()
359 keyiter(k[-13], r0, r4, r2, 95, -5); __serpent_setkey()
361 keyiter(k[-11], r2, r1, r4, 97, -3); __serpent_setkey()
362 keyiter(k[-10], r3, r2, r0, 98, -2); __serpent_setkey()
364 keyiter(k[-8], r0, r4, r2, 100, 0); __serpent_setkey()
366 keyiter(k[-6], r2, r1, r4, 102, 2); __serpent_setkey()
367 keyiter(k[-5], r3, r2, r0, 103, 3); __serpent_setkey()
369 keyiter(k[-3], r0, r4, r2, 105, 5); __serpent_setkey()
371 keyiter(k[-1], r2, r1, r4, 107, 7); __serpent_setkey()
372 keyiter(k[0], r3, r2, r0, 108, 8); __serpent_setkey()
374 keyiter(k[2], r0, r4, r2, 110, 10); __serpent_setkey()
376 keyiter(k[4], r2, r1, r4, 112, 12); __serpent_setkey()
377 keyiter(k[5], r3, r2, r0, 113, 13); __serpent_setkey()
379 keyiter(k[7], r0, r4, r2, 115, 15); __serpent_setkey()
381 keyiter(k[9], r2, r1, r4, 117, 17); __serpent_setkey()
382 keyiter(k[10], r3, r2, r0, 118, 18); __serpent_setkey()
384 keyiter(k[12], r0, r4, r2, 120, 20); __serpent_setkey()
386 keyiter(k[14], r2, r1, r4, 122, 22); __serpent_setkey()
387 keyiter(k[15], r3, r2, r0, 123, 23); __serpent_setkey()
389 keyiter(k[17], r0, r4, r2, 125, 25); __serpent_setkey()
391 keyiter(k[19], r2, r1, r4, 127, 27); __serpent_setkey()
392 keyiter(k[20], r3, r2, r0, 128, 28); __serpent_setkey()
394 keyiter(k[22], r0, r4, r2, 130, 30); __serpent_setkey()
399 S3(r3, r4, r0, r1, r2); store_and_load_keys(r1, r2, r4, r3, 28, 24); __serpent_setkey()
400 S4(r1, r2, r4, r3, r0); store_and_load_keys(r2, r4, r3, r0, 24, 20); __serpent_setkey()
401 S5(r2, r4, r3, r0, r1); store_and_load_keys(r1, r2, r4, r0, 20, 16); __serpent_setkey()
402 S6(r1, r2, r4, r0, r3); store_and_load_keys(r4, r3, r2, r0, 16, 12); __serpent_setkey()
403 S7(r4, r3, r2, r0, r1); store_and_load_keys(r1, r2, r0, r4, 12, 8); __serpent_setkey()
404 S0(r1, r2, r0, r4, r3); store_and_load_keys(r0, r2, r4, r1, 8, 4); __serpent_setkey()
405 S1(r0, r2, r4, r1, r3); store_and_load_keys(r3, r4, r1, r0, 4, 0); __serpent_setkey()
406 S2(r3, r4, r1, r0, r2); store_and_load_keys(r2, r4, r3, r0, 0, -4); __serpent_setkey()
407 S3(r2, r4, r3, r0, r1); store_and_load_keys(r0, r1, r4, r2, -4, -8); __serpent_setkey()
408 S4(r0, r1, r4, r2, r3); store_and_load_keys(r1, r4, r2, r3, -8, -12); __serpent_setkey()
409 S5(r1, r4, r2, r3, r0); store_and_load_keys(r0, r1, r4, r3, -12, -16); __serpent_setkey()
410 S6(r0, r1, r4, r3, r2); store_and_load_keys(r4, r2, r1, r3, -16, -20); __serpent_setkey()
411 S7(r4, r2, r1, r3, r0); store_and_load_keys(r0, r1, r3, r4, -20, -24); __serpent_setkey()
412 S0(r0, r1, r3, r4, r2); store_and_load_keys(r3, r1, r4, r0, -24, -28); __serpent_setkey()
414 S1(r3, r1, r4, r0, r2); store_and_load_keys(r2, r4, r0, r3, 22, 18); __serpent_setkey()
415 S2(r2, r4, r0, r3, r1); store_and_load_keys(r1, r4, r2, r3, 18, 14); __serpent_setkey()
416 S3(r1, r4, r2, r3, r0); store_and_load_keys(r3, r0, r4, r1, 14, 10); __serpent_setkey()
417 S4(r3, r0, r4, r1, r2); store_and_load_keys(r0, r4, r1, r2, 10, 6); __serpent_setkey()
418 S5(r0, r4, r1, r2, r3); store_and_load_keys(r3, r0, r4, r2, 6, 2); __serpent_setkey()
419 S6(r3, r0, r4, r2, r1); store_and_load_keys(r4, r1, r0, r2, 2, -2); __serpent_setkey()
420 S7(r4, r1, r0, r2, r3); store_and_load_keys(r3, r0, r2, r4, -2, -6); __serpent_setkey()
421 S0(r3, r0, r2, r4, r1); store_and_load_keys(r2, r0, r4, r3, -6, -10); __serpent_setkey()
422 S1(r2, r0, r4, r3, r1); store_and_load_keys(r1, r4, r3, r2, -10, -14); __serpent_setkey()
423 S2(r1, r4, r3, r2, r0); store_and_load_keys(r0, r4, r1, r2, -14, -18); __serpent_setkey()
424 S3(r0, r4, r1, r2, r3); store_and_load_keys(r2, r3, r4, r0, -18, -22); __serpent_setkey()
426 S4(r2, r3, r4, r0, r1); store_and_load_keys(r3, r4, r0, r1, 28, 24); __serpent_setkey()
427 S5(r3, r4, r0, r1, r2); store_and_load_keys(r2, r3, r4, r1, 24, 20); __serpent_setkey()
428 S6(r2, r3, r4, r1, r0); store_and_load_keys(r4, r0, r3, r1, 20, 16); __serpent_setkey()
429 S7(r4, r0, r3, r1, r2); store_and_load_keys(r2, r3, r1, r4, 16, 12); __serpent_setkey()
430 S0(r2, r3, r1, r4, r0); store_and_load_keys(r1, r3, r4, r2, 12, 8); __serpent_setkey()
431 S1(r1, r3, r4, r2, r0); store_and_load_keys(r0, r4, r2, r1, 8, 4); __serpent_setkey()
432 S2(r0, r4, r2, r1, r3); store_and_load_keys(r3, r4, r0, r1, 4, 0); __serpent_setkey()
433 S3(r3, r4, r0, r1, r2); storekeys(r1, r2, r4, r3, 0); __serpent_setkey()
450 u32 r0, r1, r2, r3, r4; __serpent_encrypt() local
459 r2 = le32_to_cpu(s[2]); __serpent_encrypt()
462 K(r0, r1, r2, r3, 0); __serpent_encrypt()
463 S0(r0, r1, r2, r3, r4); LK(r2, r1, r3, r0, r4, 1); __serpent_encrypt()
464 S1(r2, r1, r3, r0, r4); LK(r4, r3, r0, r2, r1, 2); __serpent_encrypt()
465 S2(r4, r3, r0, r2, r1); LK(r1, r3, r4, r2, r0, 3); __serpent_encrypt()
466 S3(r1, r3, r4, r2, r0); LK(r2, r0, r3, r1, r4, 4); __serpent_encrypt()
467 S4(r2, r0, r3, r1, r4); LK(r0, r3, r1, r4, r2, 5); __serpent_encrypt()
468 S5(r0, r3, r1, r4, r2); LK(r2, r0, r3, r4, r1, 6); __serpent_encrypt()
469 S6(r2, r0, r3, r4, r1); LK(r3, r1, r0, r4, r2, 7); __serpent_encrypt()
470 S7(r3, r1, r0, r4, r2); LK(r2, r0, r4, r3, r1, 8); __serpent_encrypt()
471 S0(r2, r0, r4, r3, r1); LK(r4, r0, r3, r2, r1, 9); __serpent_encrypt()
472 S1(r4, r0, r3, r2, r1); LK(r1, r3, r2, r4, r0, 10); __serpent_encrypt()
473 S2(r1, r3, r2, r4, r0); LK(r0, r3, r1, r4, r2, 11); __serpent_encrypt()
474 S3(r0, r3, r1, r4, r2); LK(r4, r2, r3, r0, r1, 12); __serpent_encrypt()
475 S4(r4, r2, r3, r0, r1); LK(r2, r3, r0, r1, r4, 13); __serpent_encrypt()
476 S5(r2, r3, r0, r1, r4); LK(r4, r2, r3, r1, r0, 14); __serpent_encrypt()
477 S6(r4, r2, r3, r1, r0); LK(r3, r0, r2, r1, r4, 15); __serpent_encrypt()
478 S7(r3, r0, r2, r1, r4); LK(r4, r2, r1, r3, r0, 16); __serpent_encrypt()
479 S0(r4, r2, r1, r3, r0); LK(r1, r2, r3, r4, r0, 17); __serpent_encrypt()
480 S1(r1, r2, r3, r4, r0); LK(r0, r3, r4, r1, r2, 18); __serpent_encrypt()
481 S2(r0, r3, r4, r1, r2); LK(r2, r3, r0, r1, r4, 19); __serpent_encrypt()
482 S3(r2, r3, r0, r1, r4); LK(r1, r4, r3, r2, r0, 20); __serpent_encrypt()
483 S4(r1, r4, r3, r2, r0); LK(r4, r3, r2, r0, r1, 21); __serpent_encrypt()
484 S5(r4, r3, r2, r0, r1); LK(r1, r4, r3, r0, r2, 22); __serpent_encrypt()
485 S6(r1, r4, r3, r0, r2); LK(r3, r2, r4, r0, r1, 23); __serpent_encrypt()
486 S7(r3, r2, r4, r0, r1); LK(r1, r4, r0, r3, r2, 24); __serpent_encrypt()
487 S0(r1, r4, r0, r3, r2); LK(r0, r4, r3, r1, r2, 25); __serpent_encrypt()
488 S1(r0, r4, r3, r1, r2); LK(r2, r3, r1, r0, r4, 26); __serpent_encrypt()
489 S2(r2, r3, r1, r0, r4); LK(r4, r3, r2, r0, r1, 27); __serpent_encrypt()
490 S3(r4, r3, r2, r0, r1); LK(r0, r1, r3, r4, r2, 28); __serpent_encrypt()
491 S4(r0, r1, r3, r4, r2); LK(r1, r3, r4, r2, r0, 29); __serpent_encrypt()
492 S5(r1, r3, r4, r2, r0); LK(r0, r1, r3, r2, r4, 30); __serpent_encrypt()
493 S6(r0, r1, r3, r2, r4); LK(r3, r4, r1, r2, r0, 31); __serpent_encrypt()
494 S7(r3, r4, r1, r2, r0); K(r0, r1, r2, r3, 32); __serpent_encrypt()
498 d[2] = cpu_to_le32(r2); __serpent_encrypt()
515 u32 r0, r1, r2, r3, r4; __serpent_decrypt() local
519 r2 = le32_to_cpu(s[2]); __serpent_decrypt()
522 K(r0, r1, r2, r3, 32); __serpent_decrypt()
523 SI7(r0, r1, r2, r3, r4); KL(r1, r3, r0, r4, r2, 31); __serpent_decrypt()
524 SI6(r1, r3, r0, r4, r2); KL(r0, r2, r4, r1, r3, 30); __serpent_decrypt()
525 SI5(r0, r2, r4, r1, r3); KL(r2, r3, r0, r4, r1, 29); __serpent_decrypt()
526 SI4(r2, r3, r0, r4, r1); KL(r2, r0, r1, r4, r3, 28); __serpent_decrypt()
527 SI3(r2, r0, r1, r4, r3); KL(r1, r2, r3, r4, r0, 27); __serpent_decrypt()
528 SI2(r1, r2, r3, r4, r0); KL(r2, r0, r4, r3, r1, 26); __serpent_decrypt()
529 SI1(r2, r0, r4, r3, r1); KL(r1, r0, r4, r3, r2, 25); __serpent_decrypt()
530 SI0(r1, r0, r4, r3, r2); KL(r4, r2, r0, r1, r3, 24); __serpent_decrypt()
531 SI7(r4, r2, r0, r1, r3); KL(r2, r1, r4, r3, r0, 23); __serpent_decrypt()
532 SI6(r2, r1, r4, r3, r0); KL(r4, r0, r3, r2, r1, 22); __serpent_decrypt()
533 SI5(r4, r0, r3, r2, r1); KL(r0, r1, r4, r3, r2, 21); __serpent_decrypt()
534 SI4(r0, r1, r4, r3, r2); KL(r0, r4, r2, r3, r1, 20); __serpent_decrypt()
535 SI3(r0, r4, r2, r3, r1); KL(r2, r0, r1, r3, r4, 19); __serpent_decrypt()
536 SI2(r2, r0, r1, r3, r4); KL(r0, r4, r3, r1, r2, 18); __serpent_decrypt()
537 SI1(r0, r4, r3, r1, r2); KL(r2, r4, r3, r1, r0, 17); __serpent_decrypt()
538 SI0(r2, r4, r3, r1, r0); KL(r3, r0, r4, r2, r1, 16); __serpent_decrypt()
539 SI7(r3, r0, r4, r2, r1); KL(r0, r2, r3, r1, r4, 15); __serpent_decrypt()
540 SI6(r0, r2, r3, r1, r4); KL(r3, r4, r1, r0, r2, 14); __serpent_decrypt()
541 SI5(r3, r4, r1, r0, r2); KL(r4, r2, r3, r1, r0, 13); __serpent_decrypt()
542 SI4(r4, r2, r3, r1, r0); KL(r4, r3, r0, r1, r2, 12); __serpent_decrypt()
543 SI3(r4, r3, r0, r1, r2); KL(r0, r4, r2, r1, r3, 11); __serpent_decrypt()
544 SI2(r0, r4, r2, r1, r3); KL(r4, r3, r1, r2, r0, 10); __serpent_decrypt()
545 SI1(r4, r3, r1, r2, r0); KL(r0, r3, r1, r2, r4, 9); __serpent_decrypt()
546 SI0(r0, r3, r1, r2, r4); KL(r1, r4, r3, r0, r2, 8); __serpent_decrypt()
547 SI7(r1, r4, r3, r0, r2); KL(r4, r0, r1, r2, r3, 7); __serpent_decrypt()
548 SI6(r4, r0, r1, r2, r3); KL(r1, r3, r2, r4, r0, 6); __serpent_decrypt()
549 SI5(r1, r3, r2, r4, r0); KL(r3, r0, r1, r2, r4, 5); __serpent_decrypt()
550 SI4(r3, r0, r1, r2, r4); KL(r3, r1, r4, r2, r0, 4); __serpent_decrypt()
551 SI3(r3, r1, r4, r2, r0); KL(r4, r3, r0, r2, r1, 3); __serpent_decrypt()
552 SI2(r4, r3, r0, r2, r1); KL(r3, r1, r2, r0, r4, 2); __serpent_decrypt()
553 SI1(r3, r1, r2, r0, r4); KL(r4, r1, r2, r0, r3, 1); __serpent_decrypt()
554 SI0(r4, r1, r2, r0, r3); K(r2, r3, r1, r4, 0); __serpent_decrypt()
556 d[0] = cpu_to_le32(r2); __serpent_decrypt()
|
| /linux-4.1.27/arch/sh/lib64/ |
| H A D | copy_page.S | 13 r2 : destination effective address (start of page)
33 /* Copy 4096 bytes worth of data from r3 to r2.
49 alloco r2, 0x00
51 alloco r2, 0x20
55 add r2, r6, r6
58 sub r3, r2, r60
70 bge/u r2, r6, tr2 ! skip prefetch for last 4 lines
71 ldx.q r2, r22, r63 ! prefetch 4 lines hence
74 bge/u r2, r7, tr3 ! skip alloco for last 2 lines
75 alloco r2, 0x40 ! alloc destination line 2 lines ahead
78 ldx.q r2, r60, r36
79 ldx.q r2, r61, r37
80 ldx.q r2, r62, r38
81 ldx.q r2, r23, r39
82 st.q r2, 0, r36
83 st.q r2, 8, r37
84 st.q r2, 16, r38
85 st.q r2, 24, r39
86 addi r2, 32, r2
87 bgt/l r8, r2, tr1
|
| H A D | strlen.S | 18 * in the event that r2 == NULL, so we don't bother.
20 /* beqi r2, 0, tr4 */ ! Sanity check
25 ld.b r2, 0, r1
26 addi r2, 1, r2
30 or r0, r63, r2
|
| H A D | udivdi3.S | 23 shlri r2,32+14,r19
30 sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
39 sub r2,r8,r2
40 /* Can do second step of 64 : 32 div now, using r1 and the rest in r2. */
42 shlri r2,22,r21
52 sub r2,r5,r2
53 andc r2,r21,r2
56 mulu.l r2,r1,r7
58 addi r2,1,r2
62 sub r2,r3,r2
63 cmpgt r2,r5,r5
64 add r8,r5,r2
70 shlrd r2,r9,r25
77 sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
96 shlld r2,r0,r2
102 mextr4 r2,r25,r2
108 cmpgtu r5,r2,r5
109 sub r8,r5,r2
|
| H A D | strcpy.S | 28 addi r2, 8, r0
34 sub r2, r23, r0
35 sub r3, r2, r21
39 ori r2,-8,r22
46 ldlo.q r2, 0, r9
50 stlo.q r2, 0, r9
59 stlo.q r2, 0, r4
|
| H A D | copy_user_memcpy.S | 75 add r2,r4,r5
83 stlo.l r2, 0, r0
104 st.b r2,0,r0
108 stlo.q r2, 0, r0
116 nop ! ld.b r2,0,r63 ! TAKum03020
118 st.b r2,0,r0
121 st.b r2,1,r1
129 sthi.l r2, 3, r0
138 sthi.q r2, 7, r0
146 sthi.q r2, 7, r0
148 sthi.q r2, 15, r8
151 stlo.q r2, 8, r8
152 stlo.q r2, 0, r0
159 ! ld.b r2, 0, r63 ! TAKum03020
162 sub r2, r7, r22
163 sub r3, r2, r6
164 add r2, r4, r5
168 stlo.q r2, 0, r0
169 sthi.q r2, 7, r0
|
| H A D | memcpy.S | 60 add r2,r4,r5
68 stlo.l r2, 0, r0
89 st.b r2,0,r0
93 stlo.q r2, 0, r0
101 ld.b r2,0,r63
103 st.b r2,0,r0
106 st.b r2,1,r1
114 sthi.l r2, 3, r0
123 sthi.q r2, 7, r0
131 sthi.q r2, 7, r0
133 sthi.q r2, 15, r8
136 stlo.q r2, 8, r8
137 stlo.q r2, 0, r0
144 ld.b r2, 0, r63
147 sub r2, r7, r22
148 sub r3, r2, r6
149 add r2, r4, r5
153 stlo.q r2, 0, r0
154 sthi.q r2, 7, r0
|
| H A D | memset.S | 28 andi r2, 7, r22
38 ldlo.q r2, 0, r7
44 stlo.q r2, 0, r3
49 stlo.q r2, 0, r3
51 add r2, r4, r5
54 sub r2, r22, r25
|
| /linux-4.1.27/arch/cris/boot/rescue/ |
| H A D | testrescue.S | 15 moveq -1, $r2
16 move.b $r2, [R_PORT_PA_DIR]
17 moveq 0, $r2
18 move.b $r2, [R_PORT_PA_DATA]
|
| H A D | kimagerescue.S | 100 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, $r2
103 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, $r2
109 or.d $r0, $r2 ; set bit
113 and.d $r0, $r2
116 move.b $r2, [R_PORT_PA_DATA]
119 move.b $r2, [R_PORT_PB_DATA]
|
| H A D | head_v10.S | 182 movu.w [$r3+], $r2 ; ptable length
183 move.d $r2, $r8 ; save for later, length of total ptable
187 jsr checksum ; r1 source, r2 length, returns in r0
201 move.d [$r3+], $r2 ; partition length
202 sub.d $r8, $r2 ; minus the ptable length
208 move.d [$r3+], $r2 ; partition length
263 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, $r2
266 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, $r2
272 or.d $r0, $r2 ; set bit
276 and.d $r0, $r2
279 move.b $r2, [R_PORT_PA_DATA]
282 move.b $r2, [R_PORT_PB_DATA]
285 move.b $r2, [0x90000000]
328 ;; r2 - length in bytes
350 subq 1, $r2 ; Length left
|
| /linux-4.1.27/arch/ia64/scripts/ |
| H A D | check-text-align.S | 3 foo: .save rp, r2
|
| /linux-4.1.27/arch/sh/kernel/cpu/sh2/ |
| H A D | entry.S | 46 mov.l r2,@-sp
49 mov.l $cpu_mode,r2
50 mov.l @r2,r0
58 mov.l r0,@r2 ! enter kernel mode
59 mov.l $current_thread_info,r2
60 mov.l @r2,r2
63 add r2,r0
64 mov r15,r2 ! r2 = user stack top
70 mov.l @(5*4,r2),r0
73 mov.l @(4*4,r2),r0
75 mov r2,r3
90 mov r2,r8 ! copy user -> kernel stack
93 mov.l @(4,r8),r2
94 mov.l r2,@-r15
103 mov r15,r2
105 mov.l @r2+,r0 ! old R3
107 mov.l @r2+,r0 ! old R2
109 mov.l @(4,r2),r0 ! old R1
111 mov.l @r2,r0 ! old R0
113 add #8,r2
114 mov.l @r2+,r3 ! old PC
115 mov.l @r2+,r0 ! old SR
116 add #-4,r2 ! exception frame stub (sr)
117 mov.l r1,@-r2 ! TRA
118 sts.l macl, @-r2
119 sts.l mach, @-r2
120 stc.l gbr, @-r2
121 mov.l r0,@-r2 ! save old SR
122 sts.l pr,@-r2
123 mov.l r3,@-r2 ! save old PC
124 mov r2,r0
126 mov.l r0,@-r2 ! save old SP
127 mov.l r14,@-r2
128 mov.l r13,@-r2
129 mov.l r12,@-r2
130 mov.l r11,@-r2
131 mov.l r10,@-r2
132 mov.l r9,@-r2
133 mov.l r8,@-r2
134 mov.l r7,@-r2
135 mov.l r6,@-r2
136 mov.l r5,@-r2
137 mov.l r4,@-r2
141 mov.l @(OFF_R2,r15),r2
199 mov #OFF_SR,r2
200 mov.l @(r0,r2),r3
202 mov #OFF_SP,r2
203 mov.l @(r0,r2),r3
207 mov.l 1f,r2
208 mov.l @r2,r2
210 mov.l r2,@r0
215 mov.l @r15+, r2
262 mov.l $cpu_mode,r2
267 mov.l r3,@r2
270 mov.l @(OFF_SP,r0),r2
271 add #-8,r2
272 mov.l r2,@(OFF_SP,r0) ! point exception frame top
273 mov.l r1,@(4,r2) ! set sr
276 mov.l r1,@r2 ! set pc
282 mov.l @r15+,r2
|
| /linux-4.1.27/arch/arm/kvm/ |
| H A D | interrupts_head.S | 17 /* Clobbers {r2-r6} */
20 VFPFMRX r2, FPEXC
22 orr r6, r2, #FPEXC_EN
26 tst r2, #FPEXC_EX @ Check for VFP Subarchitecture
31 tst r2, #FPEXC_FP2V
33 bic r6, r2, #FPEXC_EX @ FPEXC_EX disable
37 stm \vfp_base, {r2-r5} @ Save FPEXC, FPSCR, FPINST, FPINST2
40 /* Assume FPEXC_EN is on and FPEXC_EX is off, clobbers {r2-r6} */
43 ldm \vfp_base, {r2-r5} @ Load FPEXC, FPSCR, FPINST, FPINST2
46 tst r2, #FPEXC_EX @ Check for VFP Subarchitecture
49 tst r2, #FPEXC_FP2V
52 VFPFMXR FPEXC, r2 @ FPEXC (last, in case !EN)
64 mrs r2, SP_\mode
67 push {r2, r3, r4}
76 mrs r2, ELR_hyp
77 push {r2}
81 mrs r2, SP_usr
83 push {r2, r3}
91 mrs r2, r8_fiq
99 push {r2-r9}
103 pop {r2, r3, r4}
104 msr SP_\mode, r2
114 pop {r2-r9}
115 msr r8_fiq, r2
129 pop {r2, r3}
130 msr SP_usr, r2
134 pop {r2}
135 msr ELR_hyp, r2
144 * Clobbers r1, r2, r3, r4.
148 ldm r1, {r2, r3, r4}
149 msr SP_\mode, r2
168 ldm r1, {r2-r9}
169 msr r8_fiq, r2
179 ldr r2, [vcpu, #VCPU_PC]
181 msr ELR_hyp, r2
185 ldr r2, [vcpu, #VCPU_USR_SP]
187 msr SP_usr, r2
199 * Clobbers r2, r3, r4, r5.
202 add r2, vcpu, \offset
206 stm r2, {r3, r4, r5}
211 * Expects guest's r0, r1, r2 on the stack.
215 * Clobbers r2, r3, r4, r5.
219 add r2, vcpu, #VCPU_USR_REG(3)
220 stm r2, {r3-r12}
221 add r2, vcpu, #VCPU_USR_REG(0)
222 pop {r3, r4, r5} @ r0, r1, r2
223 stm r2, {r3, r4, r5}
224 mrs r2, SP_usr
226 str r2, [vcpu, #VCPU_USR_SP]
230 mrs r2, ELR_hyp
232 str r2, [vcpu, #VCPU_PC]
248 * Clobbers r2 - r12
251 mrc p15, 0, r2, c1, c0, 0 @ SCTLR
262 push {r2-r12} @ Push CP15 registers
264 str r2, [vcpu, #CP15_OFFSET(c1_SCTLR)]
268 add r2, vcpu, #CP15_OFFSET(c2_TTBR0)
269 strd r6, r7, [r2]
270 add r2, vcpu, #CP15_OFFSET(c2_TTBR1)
271 strd r8, r9, [r2]
277 mrc p15, 0, r2, c13, c0, 1 @ CID
290 push {r2-r12} @ Push CP15 registers
292 str r2, [vcpu, #CP15_OFFSET(c13_CID)]
305 mrc p15, 0, r2, c14, c1, 0 @ CNTKCTL
311 push {r2,r4-r7}
313 str r2, [vcpu, #CP15_OFFSET(c14_CNTKCTL)]
330 pop {r2,r4-r7}
332 ldr r2, [vcpu, #CP15_OFFSET(c14_CNTKCTL)]
339 mcr p15, 0, r2, c14, c1, 0 @ CNTKCTL
345 pop {r2-r12}
347 ldr r2, [vcpu, #CP15_OFFSET(c13_CID)]
360 mcr p15, 0, r2, c13, c0, 1 @ CID
373 pop {r2-r12}
375 ldr r2, [vcpu, #CP15_OFFSET(c1_SCTLR)]
388 mcr p15, 0, r2, c1, c0, 0 @ SCTLR
405 /* Get VGIC VCTRL base into r2 */
406 ldr r2, [vcpu, #VCPU_KVM]
407 ldr r2, [r2, #KVM_VGIC_VCTRL]
408 cmp r2, #0
415 ldr r3, [r2, #GICH_HCR]
416 ldr r4, [r2, #GICH_VMCR]
417 ldr r5, [r2, #GICH_MISR]
418 ldr r6, [r2, #GICH_EISR0]
419 ldr r7, [r2, #GICH_EISR1]
420 ldr r8, [r2, #GICH_ELRSR0]
421 ldr r9, [r2, #GICH_ELRSR1]
422 ldr r10, [r2, #GICH_APR]
450 str r5, [r2, #GICH_HCR]
453 add r2, r2, #GICH_LR0
456 1: ldr r6, [r2], #4
470 /* Get VGIC VCTRL base into r2 */
471 ldr r2, [vcpu, #VCPU_KVM]
472 ldr r2, [r2, #KVM_VGIC_VCTRL]
473 cmp r2, #0
487 str r3, [r2, #GICH_HCR]
488 str r4, [r2, #GICH_VMCR]
489 str r8, [r2, #GICH_APR]
492 add r2, r2, #GICH_LR0
497 str r6, [r2], #4
511 * Clobbers r2-r5
515 ldr r2, [r4, #KVM_TIMER_ENABLED]
516 cmp r2, #0
519 mrc p15, 0, r2, c14, c3, 1 @ CNTV_CTL
520 str r2, [vcpu, #VCPU_TIMER_CNTV_CTL]
524 mrrc p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL
527 strd r2, r3, [r5]
530 mov r2, #0
531 mcrr p15, 4, r2, r2, c14 @ CNTVOFF
534 mov r2, #0 @ Clear ENABLE
535 mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
538 mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL
539 orr r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN)
540 mcr p15, 4, r2, c14, c1, 0 @ CNTHCTL
548 * Clobbers r2-r5
553 mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL
554 orr r2, r2, #CNTHCTL_PL1PCTEN
555 bic r2, r2, #CNTHCTL_PL1PCEN
556 mcr p15, 4, r2, c14, c1, 0 @ CNTHCTL
559 ldr r2, [r4, #KVM_TIMER_ENABLED]
560 cmp r2, #0
563 ldr r2, [r4, #KVM_TIMER_CNTVOFF]
565 mcrr p15, 4, rr_lo_hi(r2, r3), c14 @ CNTVOFF
569 ldrd r2, r3, [r5]
570 mcrr p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL
573 ldr r2, [vcpu, #VCPU_TIMER_CNTV_CTL]
574 and r2, r2, #3
575 mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
585 mrc p15, 4, r2, c1, c1, 3
588 orr r2, r2, r3 @ Trap CR{15}
590 bic r2, r2, r3 @ Don't trap any CRx accesses
592 mcr p15, 4, r2, c1, c1, 3
596 * (hardware reset value is 0). Keep previous value in r2.
603 mrc p15, 4, r2, c1, c1, 2
606 orr r3, r2, r3 @ Trap coproc-accesses defined in mask
608 bic r3, r2, r3 @ Don't trap defined coproc-accesses
613 tst r2, #(HCPTR_TCP(10) | HCPTR_TCP(11))
627 mrc p15, 4, r2, c1, c1, 1
630 orr r2, r2, r3 @ Trap some perfmon accesses
632 bic r2, r2, r3 @ Don't trap any perfmon accesses
634 mcr p15, 4, r2, c1, c1, 1
640 ldr r2, [vcpu, #VCPU_HCR]
642 orr r2, r2, r3
644 mov r2, #0
646 mcr p15, 4, r2, c1, c1, 0 @ HCR
|
| H A D | init.S | 32 * r2,r3 = Hypervisor pgd pointer
48 * - Phase 1: r0 = 0, r1 = 0, r2,r3 contain the boot PGD.
50 * - Phase 2: r0 = ToS, r1 = vectors, r2,r3 contain the runtime PGD.
75 mcrr p15, 4, rr_lo_hi(r2, r3), c2
80 ldr r2, =HTCR_MASK
81 bic r0, r0, r2
88 ldr r2, =VTCR_MASK
89 bic r1, r1, r2
116 ldr r2, =HSCTLR_MASK
117 bic r0, r0, r2
119 ldr r2, =(HSCTLR_EE | HSCTLR_FI | HSCTLR_I | HSCTLR_C)
120 and r1, r1, r2
121 ARM( ldr r2, =(HSCTLR_M | HSCTLR_A) )
122 THUMB( ldr r2, =(HSCTLR_M | HSCTLR_A | HSCTLR_TE) )
123 orr r1, r1, r2
145 mcrr p15, 4, rr_lo_hi(r2, r3), c2
|
| H A D | interrupts.S | 50 push {r2, r3}
54 ldrd r2, r3, [r0]
55 mcrr p15, 6, rr_lo_hi(r2, r3), c2 @ Write VTTBR
60 mov r2, #0
62 mcrr p15, 6, r2, r3, c2 @ Back to VMID #0
65 pop {r2, r3}
123 VFPFMRX r2, FPEXC @ VMRS
124 push {r2}
125 orr r2, r2, #FPEXC_EN
126 VFPFMXR FPEXC, r2 @ VMSR
148 ldrd r2, r3, [r1]
149 mcrr p15, 6, rr_lo_hi(r2, r3), c2 @ Write VTTBR
159 * guest r0, r1, r2 saved on the stack
166 mov r2, #0
168 mcrr p15, 6, r2, r3, c2 @ Write VTTBR
185 pop {r2}
186 VFPFMXR FPEXC, r2
195 mrc p15, 0, r2, c0, c0, 0
196 mcr p15, 4, r2, c0, c0, 0
199 mrc p15, 0, r2, c0, c0, 5
200 mcr p15, 4, r2, c0, c0, 5
232 * passed as r0, r1, and r2 (a maximum of 3 arguments in addition to the
270 * - r1, r2, and r3 contain arguments to the above function.
271 * - The HYP function will be called with its arguments in r0, r1 and r2.
281 push {r0-r2}
289 mrc p15, 4, r2, c5, c2, 0 @ HSR
291 str r2, [vcpu, #VCPU_HSR]
295 mrc p15, 4, r2, c5, c2, 0 @ HSR
297 str r2, [vcpu, #VCPU_HSR]
304 99: mrs r2, cpsr
305 bic r2, r2, #MODE_MASK
306 orr r2, r2, #SVC_MODE
307 THUMB( orr r2, r2, #PSR_T_BIT )
308 msr spsr_cxsf, r2
310 ldr r2, =BSYM(panic)
311 msr ELR_hyp, r2
359 push {r0, r1, r2}
375 mrrc p15, 6, r0, r2, c2
376 lsr r2, r2, #16
377 and r2, r2, #0xff
378 cmp r2, #0
382 pop {r0, r1, r2}
395 mov r1, r2
396 mov r2, r3
413 mrceq p15, 4, r2, c6, c0, 2 @ HIFAR
417 mrc p15, 4, r2, c6, c0, 0 @ HDFAR
419 2: str r2, [vcpu, #VCPU_HxFAR]
439 mrcne p15, 4, r2, c6, c0, 4 @ HPFAR
447 mcr p15, 0, r2, c7, c8, 0 @ ATS1CPR
452 ubfx r2, r0, #12, #20
453 lsl r2, r2, #4
454 orr r2, r2, r1, lsl #24
461 str r2, [r0, #VCPU_HPFAR]
469 pop {r0, r1, r2}
494 pop {r0-r2}
501 push {r0, r1, r2}
|
| /linux-4.1.27/arch/arm/boot/compressed/ |
| H A D | debug.S | 9 addruart r1, r2, r3
20 ldmia r1, {r2, r3}
21 add r2, r2, r1
22 ldr r1, [r2, r3]
|
| H A D | head-xscale.S | 21 bic r2, pc, #0x1f
22 add r3, r2, #0x10000 @ 64 kb is quite enough...
23 1: ldr r0, [r2], #32
24 teq r2, r3
|
| H A D | head-sa1100.S | 35 bic r2, pc, #0x1f
36 add r3, r2, #0x4000 @ 16 kb is quite enough...
37 1: ldr r0, [r2], #32
38 teq r2, r3
|
| H A D | head.S | 149 mov r8, r2 @ save atags pointer
157 mrs r2, cpsr @ get current mode
158 tst r2, #3 @ not user?
221 ldmia r0, {r1, r2, r3, r6, r10, r11, r12}
262 * r2 = BSS start
323 mov r2, r5
336 mov r2, r5
458 * r2 = BSS start
480 add r2, r2, r0
489 cmp r1, r2 @ if entry >= bss_start &&
497 add r2, r2, r5
507 cmp r1, r2 @ entry < bss_start ||
516 1: str r0, [r2], #4 @ clear bss
517 str r0, [r2], #4
518 str r0, [r2], #4
519 str r0, [r2], #4
520 cmp r2, r3
541 add r2, sp, #0x10000 @ 64k max
547 mov r2, r8 @ restore atags pointer
573 .word __bss_start @ r2
604 * r0, r1, r2, r3, r9, r10, r12 corrupted
693 add r2, r3, #16384
701 teq r0, r2
711 mov r2, pc
712 mov r2, r2, lsr #20
713 orr r1, r1, r2, lsl #20
714 add r0, r3, r2, lsl #2
831 * r2 = corrupted
854 ldr r2, [r12, #4] @ get mask
856 tst r1, r2 @ & mask
1037 * r0, r1, r2, r3, r9, r12 corrupted
1097 * r1, r2, r3, r9, r10, r11, r12 corrupted
1109 mov r2, #1
1120 teq r2, #0
1161 add r2, r10, r10, lsr #1 @ work out 3x current cache level
1162 mov r1, r0, lsr r2 @ extract cache type bits from clidr
1169 and r2, r1, #7 @ extract the length of the cache lines
1170 add r2, r2, #4 @ add 4 (line length offset)
1180 ARM( orr r11, r11, r7, lsl r2 ) @ factor index number into r11
1183 THUMB( lsl r6, r7, r2 )
1217 mov r2, #64*1024 @ default: 32K dcache size (*2)
1224 mov r2, #1024
1225 mov r2, r2, lsl r1 @ base dcache size *2
1227 addne r2, r2, r2, lsr #1 @ +1/2 size if M == 1
1235 add r2, r1, r2
1240 teq r1, r2
1266 @ phex corrupts {r0, r1, r2, r3}
1268 mov r2, #0
1269 strb r2, [r3, r1]
1273 and r2, r0, #15
1275 cmp r2, #10
1276 addge r2, r2, #7
1277 add r2, r2, #'0'
1278 strb r2, [r3, r1]
1281 @ puts corrupts {r0, r1, r2, r3}
1283 1: ldrb r2, [r0], #1
1284 teq r2, #0
1286 2: writeb r2, r3
1290 teq r2, #'\n'
1291 moveq r2, #'\r'
1296 @ putc corrupts {r0, r1, r2, r3}
1298 mov r2, r0
1303 @ memdump corrupts {r0, r1, r2, r3, r10, r11, r12, lr}
|
| H A D | ll_char_wr.S | 33 * r2 = white
69 mul r7, r2, r7
74 mul r7, r2, r7
88 mul r4, r2, ip
91 mul ip, r2, ip @ avoid r4
98 mul r4, r2, ip
101 mul ip, r2, ip @ avoid r4
|
| H A D | head-sharpsl.S | 123 * Return: r2 - NAND Manufacturer ID
133 mov r2, #0x90 @ Command "readid"
134 strb r2, [r1, #20] @ Save to FLASHIO
138 mov r2, #0 @ Address 0x00
139 strb r2, [r1, #20] @ Save to FLASHIO
146 ldrb r2, [r1, #20] @ NAND Manufacturer ID
|
| /linux-4.1.27/arch/m32r/mm/ |
| H A D | mmu.S | 32 st r2, @-sp
49 ;; r2: &tlb_entry_{i|d}_dat
53 seth r2, #high(tlb_entry_d_dat)
54 or3 r2, r2, #low(tlb_entry_d_dat)
57 seth r2, #high(tlb_entry_d_dat)
58 or3 r2, r2, #low(tlb_entry_d_dat)
62 add r2, r1
78 ;; r2: &tlb_entry_{i|d}_dat
86 seth r2, #high(tlb_entry_i_dat)
87 or3 r2, r2, #low(tlb_entry_i_dat)
90 seth r2, #high(tlb_entry_i_dat)
91 or3 r2, r2, #low(tlb_entry_i_dat)
95 add r2, r1
106 ;; r2: &tlb_entry_{i|d}_dat
111 ;; r2, r3: free
113 ld r3, @r2 || srli r1, #3
115 ld r3, @r2
123 st r3, @r2 || slli r1, #3
125 st r3, @r2
133 ;; r2, r3: free
137 ;; r2: pte_data
140 ld24 r2, #(-MPTB - 1)
143 not r2, r2 || slli r3, #2 ; r3: pgd offset
145 not r2, r2
148 ld r2, @r2 ; r2: pgd base addr (MPTB reg.)
149 or r3, r2 ; r3: pmd addr
155 and3 r2, r3, #0xfff
156 add3 r2, r2, #-355 ; _KERNPG_TABLE(=0x163)
157 bnez r2, 3f ; pmd_bad(*pmd) ?
158 ldi r2, #-4096
161 and r2, r3 ; r2: pte base addr
164 or r3, r2
165 seth r2, #0x8000
166 or r3, r2 ; r3: pte addr
169 ld r2, @r3 ; r2: pte data
170 and3 r3, r2, #2 ; _PAGE_PRESENT(=2) check
179 ;; r2: pte_data
182 st r2, @+r1 ; set_tlb_data(entry, pte_data);
187 ld r2, @sp+
198 ;; r2, r3: free
202 ;; r2: pte_data
205 bra 5b || ldi r2, #2
207 ldi r2, #2 ; r2: pte_data = 0 | _PAGE_PRESENT(=2)
216 st r2, @-sp
222 mvfc r2, bpc ; r2: bpc
229 mv r0, r2 ; address = bpc;
233 sll3 r2, r4, #3
236 add r2, r1 ; r2: entry
247 sll3 r2, r4, #3
250 add r2, r1 ; r2: entry
257 ; r0: address, r2: entry
292 ; r0: address, r1: pte_data, r2: entry
301 st r3, @r2
302 st r1, @(4,r2) ; set_tlb_data(entry, pte_data);
306 ld r2, @sp+
335 ldi r2, #0
340 st r2, @+r0 ; VPA <- 0
341 st r2, @+r0 ; PPA <- 0
342 st r2, @+r1 ; VPA <- 0
343 st r2, @+r1 ; PPA <- 0
|
| H A D | page.S | 26 ldi r2, #255
44 addi r2, #-1
45 bnez r2, 0b
64 ldi r2, #255
75 addi r2, #-1
76 bnez r2, 0b
|
| /linux-4.1.27/arch/nios2/boot/compressed/ |
| H A D | head.S | 26 movui r2, NIOS2_ICACHE_LINE_SIZE
28 sub r1, r1, r2
32 movui r2, NIOS2_DCACHE_LINE_SIZE
34 sub r1, r1, r2
39 movia r2, chkadr
40 beq r1, r2, finish_move /* We are running in correct address,
42 /* move code, r1: src, r2: dest, r3: last dest */
44 movia r2, _start /* Destination */
47 stw r8, 0(r2) /* stort a word to dest [r2] */
49 addi r2, r2, 4 /* inc the dest addr */
50 blt r2, r3, 1b
53 movui r2, NIOS2_DCACHE_LINE_SIZE
55 sub r1, r1, r2
62 movia r2, __bss_start /* presume nothing is between */
64 1: stb r0, 0(r2)
65 addi r2, r2, 1
66 bne r1, r2, 1b
89 movui r2, NIOS2_DCACHE_LINE_SIZE
91 sub r1, r1, r2
95 movui r2, NIOS2_ICACHE_LINE_SIZE
97 sub r1, r1, r2
|
| /linux-4.1.27/arch/s390/kernel/vdso32/ |
| H A D | clock_gettime.S | 25 chi %r2,__CLOCK_REALTIME_COARSE
27 chi %r2,__CLOCK_REALTIME
29 chi %r2,__CLOCK_MONOTONIC_COARSE
31 chi %r2,__CLOCK_MONOTONIC
45 lr %r2,%r0
51 3: alr %r0,%r2
56 5: l %r2,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */
57 srdl %r0,0(%r2) /* >> tk->shift */
58 l %r2,__VDSO_WTOM_SEC+4(%r5)
66 7: ahi %r2,1
71 8: st %r2,0(%r3) /* store tp->tv_sec */
73 lhi %r2,0
81 l %r2,__VDSO_WTOM_CRS_SEC+4(%r5)
91 l %r2,__VDSO_XTIME_CRS_SEC+4(%r5)
108 lr %r2,%r0
114 13: alr %r0,%r2
119 14: l %r2,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */
120 srdl %r0,0(%r2) /* >> tk->shift */
121 l %r2,__VDSO_XTIME_SEC+4(%r5)
129 16: ahi %r2,1
134 17: st %r2,0(%r3) /* store tp->tv_sec */
136 lhi %r2,0
|
| H A D | clock_getres.S | 24 chi %r2,__CLOCK_REALTIME
26 chi %r2,__CLOCK_MONOTONIC
29 chi %r2,__CLOCK_REALTIME_COARSE
31 chi %r2,__CLOCK_MONOTONIC_COARSE
38 2: lhi %r2,0
|
| H A D | gettimeofday.S | 28 2: ltr %r2,%r2 /* check if tv is NULL */
67 8: st %r4,0(%r2) /* store tv->tv_sec */
73 st %r0,4(%r2) /* store tv->tv_usec */
74 10: slr %r2,%r2
|
| /linux-4.1.27/arch/hexagon/lib/ |
| H A D | memset.S | 42 p0 = cmp.eq(r2, #0)
43 p1 = cmp.gtu(r2, #7)
60 loop0(1f, r2) /* byte loop */
72 p1 = cmp.eq(r2, #1)
85 p1 = cmp.eq(r2, #2)
97 p0 = cmp.gtu(r2, #7)
98 p1 = cmp.eq(r2, #4)
104 p0 = cmp.gtu(r2, #11)
110 r10 = lsr(r2, #3)
127 p1 = cmp.eq(r2, #8)
132 p0 = tstbit(r2, #2)
137 p0 = tstbit(r2, #1)
138 p1 = cmp.eq(r2, #4)
149 p1 = cmp.eq(r2, #2)
172 if (r2==#0) jump:nt .L1
176 p0 = cmp.gtu(r2,#8)
181 loop0(.L47,r2)
193 p1 = cmp.eq(r2, #1)
197 r2 = add(r2,#-1) define
207 r2 = add(r2,#-2) define
209 p0 = cmp.eq(r2, #2)
218 r2 = add(r2,#-4) define
220 p0 = cmp.eq(r2, #4)
225 p0 = cmp.gtu(r2,#127)
232 r2 = add(r2,#-8) define
238 r2 = add(r2,#-8) define
244 r2 = add(r2,#-8) define
248 r3 = lsr(r2,#5)
261 r2 = add(r2,#-32) define
265 p0 = cmp.gtu(r2,#7)
267 r8 = lsr(r2,#3)
274 r2 = add(r2,#-8) define
278 p0 = tstbit(r2,#2)
282 r2 = add(r2,#-4) define
287 p0 = tstbit(r2,#1)
291 r2 = add(r2,#-2) define
295 p0 = cmp.eq(r2,#1)
306 r2 = add(r2,#-32) define
|
| /linux-4.1.27/arch/arc/lib/ |
| H A D | strcpy-700.S | 22 or r2,r0,r1
23 bmsk_s r2,r2,1
24 brne.d r2,0,charloop
30 sub r2,r3,r8
31 bic_s r2,r2,r3
32 tst_s r2,r12
41 sub r2,r3,r8
42 bic_s r2,r2,r3
43 tst_s r2,r12
46 sub r2,r4,r8
47 bic r2,r2,r4
48 tst r2,r12
|
| H A D | memset.S | 15 or r12,r0,r2
21 brls r2,SMALL,.Ltiny
22 add r3,r2,r0
27 add_s r2,r2,r12
28 sub.ne r2,r2,4
35 lsr.f lp_count,r2,2
44 mov.f lp_count,r2
52 ; memset: @r0 = mem, @r1 = char, @r2 = size_t
56 mov r2, r1
|
| H A D | memcmp.S | 12 #define WORD2 r2
16 #define SHIFT r2
22 sub r3,r2,1
23 brls r2,r12,.Lbytewise
59 asl r2,r4,r1
61 lsr_s r2,r2,1
64 sub r0,r2,r12
73 asl_s r2,r2,r1
75 lsr_s r2,r2,1
78 sub r0,r2,r12
99 breq r2,0,.Lnil
|
| /linux-4.1.27/arch/sh/lib/ |
| H A D | memmove.S | 45 mov #3,r2
46 and r2,r1
82 and r2,r3
86 mov #4,r2
87 sub r3,r2
88 1: dt r2
115 and r2,r3
119 mov #4,r2
120 sub r3,r2
121 1: dt r2
137 mov r1,r2
138 shll16 r2
139 shll8 r2 ! Kxxx
140 or r2,r3 ! KJIH
149 mov r1,r2
150 shlr16 r2
151 shlr8 r2 ! xxxK
152 or r2,r3 ! HIJK
203 and r2,r3
207 mov #4,r2
208 sub r3,r2
209 1: dt r2
226 mov r1,r2
227 shll8 r2 ! MLKx
228 or r2,r3 ! MLKJ
239 mov r1,r2
240 shlr8 r2 ! xKLM
241 or r2,r3 ! JKLM
|
| H A D | memcpy.S | 35 mov #3,r2
36 and r2,r1
52 7: mov r4,r2
53 add #1,r2
55 cmp/hi r2,r0
57 bt/s 8b ! while (r0>r2)
69 and r2,r3
81 mov r4,r2
82 add #7,r2
84 cmp/hi r2,r0
93 add #-6,r2
101 and r2,r3
113 mov r4,r2
114 add #7,r2
124 cmp/hi r2,r0
135 cmp/hi r2,r0
145 add #-6,r2
160 mov r4,r2
161 add #3,r2
164 cmp/hi r2,r0
182 and r2,r3
195 mov r4,r2
196 add #7,r2
206 cmp/hi r2,r0
217 cmp/hi r2,r0
227 add #-6,r2
|
| H A D | copy_page.S | 20 * r0, r1, r2, r3, r4, r5, r6, r7 --- scratch
40 mov.l @r11+,r2
57 mov.l r2,@-r10
113 mov r6, r2
115 shlr2 r2
192 EX( mov.l @r5+,r2 )
206 EX( mov.l r2,@(8,r4) )
233 mov r2,r7
239 and r0,r2
306 tst r2,r2
311 dt r2
333 dt r2
|
| H A D | checksum.S | 99 mov.l @r4+, r2
103 addc r2, r6
104 mov.l @r4+, r2
109 addc r2, r6
110 mov.l @r4+, r2
113 addc r2, r6
128 mov #0, r2
130 addc r2, r6
131 mov.l @r4+, r2
136 addc r2, r6
238 mov r6,r2
242 mov r6,r2
272 mov r2, r0
290 mov r6,r2
333 2: mov r2,r6
351 4: mov r2,r6
|
| H A D | udiv_qrnnd.S | 41 /* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */
59 sts macl,r2
60 cmp/hs r2,r0
61 sub r2,r0
|
| /linux-4.1.27/arch/s390/kernel/vdso64/ |
| H A D | clock_getres.S | 23 cghi %r2,__CLOCK_REALTIME_COARSE
25 cghi %r2,__CLOCK_MONOTONIC_COARSE
28 cghi %r2,__CLOCK_REALTIME
30 cghi %r2,__CLOCK_MONOTONIC
32 cghi %r2,__CLOCK_THREAD_CPUTIME_ID
34 cghi %r2,-2 /* Per-thread CPUCLOCK with PID=0, VIRT=1 */
44 1: lghi %r2,0
|
| H A D | clock_gettime.S | 24 cghi %r2,__CLOCK_REALTIME_COARSE
26 cghi %r2,__CLOCK_REALTIME
28 cghi %r2,-3 /* Per-thread CPUCLOCK with PID=0, VIRT=1 */
30 cghi %r2,__CLOCK_MONOTONIC_COARSE
32 cghi %r2,__CLOCK_MONOTONIC
40 lgf %r2,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */
46 srlg %r1,%r1,0(%r2) /* >> tk->shift */
57 lghi %r2,0
86 lgf %r2,__VDSO_TK_SHIFT(%r5) /* Timekeeper shift */
91 srlg %r1,%r1,0(%r2) /* >> tk->shift */
103 lghi %r2,0
110 ear %r2,%a4
124 11: sar %a4,%r2
137 lghi %r2,0
|
| H A D | gettimeofday.S | 27 1: ltgr %r2,%r2 /* check if tv is NULL */
48 3: stg %r0,0(%r2) /* store tv->tv_sec */
52 stg %r0,8(%r2) /* store tv->tv_usec */
53 4: lghi %r2,0
|
| /linux-4.1.27/arch/arm/mm/ |
| H A D | copypage-xsc3.c | 44 2: ldrd r2, [r1], #8 \n\ xsc3_mc_copy_user_page()
48 strd r2, [r0], #8 \n\ xsc3_mc_copy_user_page()
49 ldrd r2, [r1], #8 \n\ xsc3_mc_copy_user_page()
52 strd r2, [r0], #8 \n\ xsc3_mc_copy_user_page()
54 ldrd r2, [r1], #8 \n\ xsc3_mc_copy_user_page()
58 strd r2, [r0], #8 \n\ xsc3_mc_copy_user_page()
59 ldrd r2, [r1], #8 \n\ xsc3_mc_copy_user_page()
63 strd r2, [r0], #8 \n\ xsc3_mc_copy_user_page()
96 mov r2, #0 \n\ xsc3_mc_clear_user_highpage()
99 strd r2, [%0], #8 \n\ xsc3_mc_clear_user_highpage()
100 strd r2, [%0], #8 \n\ xsc3_mc_clear_user_highpage()
101 strd r2, [%0], #8 \n\ xsc3_mc_clear_user_highpage()
102 strd r2, [%0], #8 \n\ xsc3_mc_clear_user_highpage()
107 : "r1", "r2", "r3"); xsc3_mc_clear_user_highpage()
|
| H A D | copypage-feroceon.c | 23 ldmia r1!, {r2 - r9} \n\ feroceon_copy_user_page()
31 stmia r0, {r2 - r9} \n\ feroceon_copy_user_page()
32 ldmia r1!, {r2 - r9} \n\ feroceon_copy_user_page()
35 stmia r0, {r2 - r9} \n\ feroceon_copy_user_page()
36 ldmia r1!, {r2 - r9} \n\ feroceon_copy_user_page()
39 stmia r0, {r2 - r9} \n\ feroceon_copy_user_page()
40 ldmia r1!, {r2 - r9} \n\ feroceon_copy_user_page()
43 stmia r0, {r2 - r9} \n\ feroceon_copy_user_page()
44 ldmia r1!, {r2 - r9} \n\ feroceon_copy_user_page()
47 stmia r0, {r2 - r9} \n\ feroceon_copy_user_page()
48 ldmia r1!, {r2 - r9} \n\ feroceon_copy_user_page()
51 stmia r0, {r2 - r9} \n\ feroceon_copy_user_page()
52 ldmia r1!, {r2 - r9} \n\ feroceon_copy_user_page()
55 stmia r0, {r2 - r9} \n\ feroceon_copy_user_page()
56 ldmia r1!, {r2 - r9} \n\ feroceon_copy_user_page()
59 stmia r0, {r2 - r9} \n\ feroceon_copy_user_page()
88 mov r2, #0 \n\ feroceon_clear_user_highpage()
96 1: stmia %0, {r2-r7, ip, lr} \n\ feroceon_clear_user_highpage()
104 : "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr"); feroceon_clear_user_highpage()
|
| H A D | copypage-v4mc.c | 49 ldmia %0!, {r2, r3, ip, lr} @ 4\n\ mc_copy_user_page()
51 stmia %1!, {r2, r3, ip, lr} @ 4\n\ mc_copy_user_page()
52 ldmia %0!, {r2, r3, ip, lr} @ 4+1\n\ mc_copy_user_page()
53 stmia %1!, {r2, r3, ip, lr} @ 4\n\ mc_copy_user_page()
54 ldmia %0!, {r2, r3, ip, lr} @ 4\n\ mc_copy_user_page()
56 stmia %1!, {r2, r3, ip, lr} @ 4\n\ mc_copy_user_page()
57 ldmia %0!, {r2, r3, ip, lr} @ 4\n\ mc_copy_user_page()
59 stmia %1!, {r2, r3, ip, lr} @ 4\n\ mc_copy_user_page()
60 ldmneia %0!, {r2, r3, ip, lr} @ 4\n\ mc_copy_user_page()
94 mov r2, #0 @ 1\n\ v4_mc_clear_user_highpage()
99 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4_mc_clear_user_highpage()
100 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4_mc_clear_user_highpage()
102 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4_mc_clear_user_highpage()
103 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4_mc_clear_user_highpage()
108 : "r1", "r2", "r3", "ip", "lr"); v4_mc_clear_user_highpage()
|
| H A D | copypage-v4wt.c | 28 mov r2, %2 @ 1\n\ v4wt_copy_user_page()
36 subs r2, r2, #1 @ 1\n\ v4wt_copy_user_page()
40 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\ v4wt_copy_user_page()
68 mov r2, #0 @ 1\n\ v4wt_clear_user_highpage()
72 1: stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4wt_clear_user_highpage()
73 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4wt_clear_user_highpage()
74 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4wt_clear_user_highpage()
75 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4wt_clear_user_highpage()
78 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache" v4wt_clear_user_highpage()
81 : "r1", "r2", "r3", "ip", "lr"); v4wt_clear_user_highpage()
|
| H A D | copypage-xscale.c | 57 2: ldrd r2, [r0], #8 \n\ mc_copy_user_page()
60 strd r2, [r1], #8 \n\ mc_copy_user_page()
61 ldrd r2, [r0], #8 \n\ mc_copy_user_page()
64 strd r2, [r1], #8 \n\ mc_copy_user_page()
67 ldrd r2, [r0], #8 \n\ mc_copy_user_page()
71 strd r2, [r1], #8 \n\ mc_copy_user_page()
72 ldrd r2, [r0], #8 \n\ mc_copy_user_page()
75 strd r2, [r1], #8 \n\ mc_copy_user_page()
115 mov r2, #0 \n\ xscale_mc_clear_user_highpage()
118 strd r2, [%0], #8 \n\ xscale_mc_clear_user_highpage()
119 strd r2, [%0], #8 \n\ xscale_mc_clear_user_highpage()
120 strd r2, [%0], #8 \n\ xscale_mc_clear_user_highpage()
121 strd r2, [%0], #8 \n\ xscale_mc_clear_user_highpage()
128 : "r1", "r2", "r3", "ip"); xscale_mc_clear_user_highpage()
|
| H A D | copypage-fa.c | 25 mov r2, %0 @ 1\n\ fa_copy_user_page()
34 subs r2, r2, #1 @ 1\n\ fa_copy_user_page()
36 mcr p15, 0, r2, c7, c10, 4 @ 1 drain WB\n\ fa_copy_user_page()
64 mov r2, #0 @ 1\n\ fa_clear_user_highpage()
68 1: stmia %0, {r2, r3, ip, lr} @ 4\n\ fa_clear_user_highpage()
71 stmia %0, {r2, r3, ip, lr} @ 4\n\ fa_clear_user_highpage()
79 : "r1", "r2", "r3", "ip", "lr"); fa_clear_user_highpage()
|
| H A D | cache-v7.S | 40 and r2, r1, r0, lsr #13
45 add r2, r2, #1 @ NumSets
52 1: sub r2, r2, #1 @ NumSets--
56 mov r6, r2, lsl r0
60 cmp r2, #0
98 ALT_SMP(mrc p15, 0, r2, c0, c0, 0) @ read main ID register
102 teq r1, r2, lsr #4 @ test for errata affected core and if so...
127 add r2, r10, r10, lsr #1 @ work out 3x current cache level
128 mov r1, r0, lsr r2 @ extract cache type bits from clidr
141 and r2, r1, #7 @ extract the length of the cache lines
142 add r2, r2, #4 @ add 4 (line length offset)
154 ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11
155 THUMB( lsl r6, r9, r2 )
273 dcache_line_size r2, r3
274 sub r3, r2, #1
282 add r12, r12, r2
286 icache_line_size r2, r3
287 sub r3, r2, #1
291 add r12, r12, r2
325 dcache_line_size r2, r3
327 sub r3, r2, #1
335 add r0, r0, r2
353 dcache_line_size r2, r3
354 sub r3, r2, #1
368 add r0, r0, r2
381 dcache_line_size r2, r3
382 sub r3, r2, #1
390 add r0, r0, r2
403 dcache_line_size r2, r3
404 sub r3, r2, #1
412 add r0, r0, r2
427 teq r2, #DMA_FROM_DEVICE
440 teq r2, #DMA_TO_DEVICE
|
| H A D | copypage-v4wb.c | 30 mov r2, %2 @ 1\n\ v4wb_copy_user_page()
40 subs r2, r2, #1 @ 1\n\ v4wb_copy_user_page()
73 mov r2, #0 @ 1\n\ v4wb_clear_user_highpage()
78 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4wb_clear_user_highpage()
79 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4wb_clear_user_highpage()
81 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4wb_clear_user_highpage()
82 stmia %0!, {r2, r3, ip, lr} @ 4\n\ v4wb_clear_user_highpage()
88 : "r1", "r2", "r3", "ip", "lr"); v4wb_clear_user_highpage()
|
| H A D | tlb-v6.S | 37 vma_vm_mm r3, r2 @ get vma->vm_mm
46 vma_vm_flags r2, r2 @ get vma->vm_flags
50 tst r2, #VM_EXEC @ Executable area ?
70 mov r2, #0
71 mcr p15, 0, r2, c7, c10, 4 @ drain write buffer
86 mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier
87 mcr p15, 0, r2, c7, c5, 4 @ prefetch flush (isb)
|
| H A D | proc-feroceon.S | 62 mov r2, #(16 << 5)
68 mov r2, r2, lsl r0 @ actual cache size
69 movne r2, r2, lsr #2 @ turned into # of sets
70 sub r2, r2, #(1 << 5)
71 stmia r1, {r2, r3}
156 mov r2, #VM_EXEC
168 tst r2, #VM_EXEC
189 1: tst r2, #VM_EXEC
198 tst r2, #VM_EXEC
261 mrs r2, cpsr
263 orr r3, r2, #PSR_I_BIT
267 msr cpsr_c, r2 @ restore interrupts
302 mrs r2, cpsr
309 orr r3, r2, #PSR_I_BIT
313 msr cpsr_c, r2 @ restore interrupts
338 mrs r2, cpsr
341 orr r3, r2, #PSR_I_BIT
345 msr cpsr_c, r2 @ restore interrupts
369 mrs r2, cpsr
372 orr r3, r2, #PSR_I_BIT
376 msr cpsr_c, r2 @ restore interrupts
388 cmp r2, #DMA_TO_DEVICE
402 cmp r2, #DMA_TO_DEVICE
449 mov r2, r0
458 1: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry
459 add r2, r2, #CACHE_DLINESIZE
481 * use r2 which is normally used to test the VM_EXEC flag, and
484 mov r2, lr @ abuse r2 to preserve lr
486 @ if r2 contains the VM_EXEC bit then the next 2 ops are done already
487 tst r2, #VM_EXEC
493 ret r2
|
| H A D | proc-v7-3level.S | 59 mmid r2, r2
60 asid r2, r2
61 orr rpgdh, rpgdh, r2, lsl #(48 - 32) @ upper 32-bits of pgd
70 #define rh r2
72 #define rl r2
81 * - pte - PTE value to store (64-bit in r2 and r3)
97 1: strd r2, r3, [r0]
|
| H A D | cache-v6.S | 206 ldrb r2, [r0] @ read for ownership
207 strb r2, [r0] @ write for ownership
218 ldrneb r2, [r1, #-1] @ read for ownership
219 strneb r2, [r1, #-1] @ write for ownership
236 ldrlo r2, [r0] @ read for ownership
237 strlo r2, [r0] @ write for ownership
253 ldr r2, [r0] @ read for ownership
274 ldrb r2, [r0] @ read for ownership
275 strb r2, [r0] @ write for ownership
287 ldrlob r2, [r0] @ read for ownership
288 strlob r2, [r0] @ write for ownership
303 teq r2, #DMA_FROM_DEVICE
308 teq r2, #DMA_TO_DEVICE
323 teq r2, #DMA_TO_DEVICE
|
| H A D | abort-lv4t.S | 6 * Params : r2 = pt_regs
72 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
76 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
87 ldreq r6, [r2, r9, lsl #2] @ { load Rm value }
90 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
94 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
104 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
108 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
116 ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
200 ldr r7, [r2, #13 << 2]
204 str r7, [r2, #13 << 2]
216 ldr r7, [r2, r9, lsr #6]
219 str r7, [r2, r9, lsr #6]
|
| H A D | proc-v7-2level.S | 42 mov r2, #0
44 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
53 mrc p15, 0, r2, c13, c0, 1 @ read current context ID
54 lsr r2, r2, #8 @ extract the PID
55 bfi r1, r2, #8, #24 @ insert into new context ID
85 orr r3, r3, r2
|
| H A D | cache-v4wt.S | 69 mov r2, #VM_EXEC
72 tst r2, #VM_EXEC
93 tst r2, #VM_EXEC
142 mov r2, #0
143 mcr p15, 0, r2, c7, c5, 0 @ invalidate I cache
185 teq r2, #DMA_TO_DEVICE
|
| H A D | cache-v4wb.S | 86 add r2, r1, #CACHE_DSIZE
88 cmp r1, r2
91 add r2, r2, #FLUSH_BASE_MINICACHE - FLUSH_BASE
92 sub r1, r2, #512 @ only 512 bytes
94 cmp r1, r2
113 tst r2, #VM_EXEC @ executable region?
124 tst r2, #VM_EXEC
239 cmp r2, #DMA_TO_DEVICE
|
| /linux-4.1.27/arch/m32r/boot/compressed/ |
| H A D | head.S | 49 ld r2, @r3
50 add r2, r12
51 st r2, @r3
63 seth r2, #high(__bss_start)
64 or3 r2, r2, #low(__bss_start)
65 add r2, r12
69 sub r3, r2
73 srli r4, #4 || addi r2, #-4
78 ld r0, @(4,r2)
80 st r1, @+r2 || addi r4, #-1
81 st r1, @+r2
82 st r1, @+r2
83 st r1, @+r2 || cmpeq r1, r4 ; R4 = 0?
87 addi r2, #4
90 stb r1, @r2 || addi r4, #-1
91 addi r2, #1
96 seth r2, #high(__bss_start)
97 or3 r2, r2, #low(__bss_start)
98 add r2, r12
102 sub r3, r2
106 addi r2, #-4 ; account for pre-inc store
109 st r1, @+r2 ; yep, zero out another longword
129 seth r2, #high(zimage_len)
130 or3 r2, r2, #low(zimage_len)
|
| /linux-4.1.27/arch/arm/kernel/ |
| H A D | iwmmxt.S | 76 XSC(mrc p15, 0, r2, c15, c1, 0)
77 PJ4(mrc p15, 0, r2, c1, c0, 2)
79 XSC(tst r2, #0x3)
80 PJ4(tst r2, #0xf)
83 XSC(orr r2, r2, #0x3)
84 XSC(mcr p15, 0, r2, c15, c1, 0)
85 PJ4(orr r2, r2, #0xf)
86 PJ4(mcr p15, 0, r2, c1, c0, 2)
90 ldr r2, [sp, #60] @ current task pc value
93 sub r2, r2, #4 @ adjust pc back
94 str r2, [sp, #60]
96 mrc p15, 0, r2, c2, c0, 0
97 mov r2, r2 @ cpwait
111 tmrc r2, wCon
114 tst r2, #0x1
127 tst r2, #0x2
180 mov r2, #0
183 tmcr wCon, r2
200 orr r2, ip, #PSR_I_BIT @ disable interrupts
201 msr cpsr_c, r2
204 add r2, r0, #TI_IWMMXT_STATE @ get task Concan save area
209 teqne r1, r2 @ or specified one?
222 mrc p15, 0, r2, c2, c0, 0
223 mov r2, r2 @ cpwait
232 mrc p15, 0, r2, c2, c0, 0
233 mov r2, r2 @ cpwait
252 orr r2, ip, #PSR_I_BIT @ disable interrupts
253 msr cpsr_c, r2
256 add r2, r0, #TI_IWMMXT_STATE @ get task Concan save area
258 teq r2, r3 @ does this task own it...
264 mov r1, r2
265 mov r2, #MMX_SIZE
270 mov r2, #3 @ save all regs
290 orr r2, ip, #PSR_I_BIT @ disable interrupts
291 msr cpsr_c, r2
294 add r2, r0, #TI_IWMMXT_STATE @ get task Concan save area
296 bic r2, r2, #0x7 @ 64-bit alignment
297 teq r2, r3 @ does this task own it...
302 mov r0, r2
303 mov r2, #MMX_SIZE
332 ldr r2, =concan_owner
334 ldr r2, [r2] @ get current Concan owner
335 teq r2, r3 @ next task owns it?
356 mrs r2, cpsr
357 orr ip, r2, #PSR_I_BIT @ disable interrupts
364 msr cpsr_c, r2 @ restore interrupts
|
| H A D | debug.S | 58 printhex: adr r2, hexbuf
59 add r3, r2, r1
68 teq r3, r2
70 mov r0, r2
81 addruart_current r3, r1, r2
83 1: waituart r2, r3
85 busyuart r2, r3
97 addruart_current r3, r1, r2
105 addruart r2, r3, ip
106 str r2, [r0]
132 mov r2, #0
133 str r2, [r0]
134 str r2, [r1]
|
| H A D | sleep.S | 58 * r2 = MPIDR value the resuming CPU will use
78 compute_mpidr_hash r0, r6, r7, r8, r2, r1
80 1: mov r2, r5 @ virtual SP
93 mov sp, r2
130 adr r2, mpidr_hash_ptr
131 ldr r3, [r2]
132 add r2, r2, r3 @ r2 = struct mpidr_hash phys address
137 ldmia r2, { r3-r6 } @ r3 = mpidr mask (r4,r5,r6) = l[0,1,2] shifts
141 ldr r2, [r0]
142 add r0, r0, r2
148 THUMB( ldmia r0!, {r1, r2, r3} )
149 THUMB( mov sp, r2 )
|
| H A D | entry-armv.S | 52 @ PABORT handler takes pt_regs in r2, fault address in r4 and psr in r5
67 @ r2 - pt_regs
168 add r2, sp, #(S_FRAME_SIZE + \stack_hole - 4)
169 SPFIX( addeq r2, r2, #4 )
178 @ r2 - sp_svc
184 stmia r7, {r2 - r6}
196 mov r2, sp
241 ldr r2, [r0, #S_PC]
242 sub r2, r2, r1
243 str r2, [r0, #S_PC]
277 mov r2, r4
294 mov r2, sp @ regs
336 mrs r2, spsr @ Save spsr_abt, abort is now safe
340 stmfd sp!, {r1 - r2}
345 ldmfd sp!, {r1 - r2}
350 msr spsr_cxsf, r2 @ Restore spsr_abt
438 mov r2, sp
461 mov r2, r4
464 @ r2 = regs->ARM_pc, which is either 2 or 4 bytes ahead of the
481 sub r4, r2, #4 @ ARM instr at LR - 4
486 @ r2 = PC value for the following instruction (:= regs->ARM_pc)
494 sub r4, r2, #2 @ First half of thumb instr at LR - 2
520 3: ldrht r0, [r2]
522 add r2, r2, #2 @ r2 is PC + 2, make it PC + 4
523 str r2, [sp, #S_PC] @ it's a 2x16bit instr, update
527 @ r2 = PC value for the following Thumb instruction (:= regs->ARM_pc)
580 * r2 = PC value to resume execution after successful emulation
698 * r2 = PC+4
727 mov r2, sp @ regs
757 * r0 = previous task_struct, r1 = previous thread_info, r2 = next thread_info
768 ldr r4, [r2, #TI_TP_VALUE]
769 ldr r5, [r2, #TI_TP_VALUE + 4]
771 ldr r6, [r2, #TI_CPU_DOMAIN]
775 ldr r7, [r2, #TI_TASK]
783 add r4, r2, #TI_CPU_SAVE
863 1: ldrexd r0, r1, [r2] @ load current val
866 strexdeq r3, r6, r7, [r2] @ store newval if eq
887 1: ldmia r2, {r0, r1} @ load current val
890 2: stmeqia r2, {r6, lr} @ store newval if eq
959 1: ldr r3, [r2] @ load current val
961 2: streq r1, [r2] @ store newval if eq
990 1: ldrex r3, [r2]
992 strexeq r3, r1, [r2]
|
| H A D | entry-header.S | 138 tst r2, #4
139 subne r2, r2, #4
148 stmdb r2!, {r1, r3-r5}
151 stmdb r2!, {r0, r3-r5}
153 stmdb r2!, {r1, r3-r5}
157 msr psp, r2
222 strex r1, r2, [r0] @ clear the exclusive monitor
256 mov r2, sp
257 ldr r1, [r2, #\offset + S_PSR] @ get calling cpsr
258 ldr lr, [r2, #\offset + S_PC]! @ get pc
262 strex r1, r2, [r2] @ clear the exclusive monitor
265 ldmdb r2, {r1 - lr}^ @ get calling r1 - lr
267 ldmdb r2, {r0 - lr}^ @ get calling r0 - lr
298 strex r2, r1, [sp, #S_LR] @ clear the exclusive monitor
317 ldmia r0, {r2 - r12}
339 mov r2, sp
340 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
347 strex r1, r2, [sp] @ clear the exclusive monitor
|
| H A D | entry-v7m.S | 28 mov r2, lr
64 ldr r2, [tsk, #TI_FLAGS]
65 tst r2, #_TIF_WORK_MASK
96 * r0 = previous task_struct, r1 = previous thread_info, r2 = next thread_info
107 add r4, r2, #TI_CPU_SAVE
|
| H A D | entry-ftrace.S | 68 ldr r2, [r0]
70 cmp r0, r2
75 ldr r2, [r1]
76 cmp r0, r2
80 ldr r2, [r1]
82 cmp r0, r2
91 mov pc, r2
124 mov r2, fp @ frame pointer
|
| H A D | head-common.S | 36 /* Determine validity of the r2 atags pointer. The heuristic requires
44 * r2 either valid atags pointer, valid dtb pointer, or zero
48 tst r2, #0x3 @ aligned?
51 ldr r5, [r2, #0]
60 ldr r5, [r2, #4]
67 1: mov r2, #0
77 * r2 = atags/dtb pointer
101 str r2, [r6] @ Save atags pointer
|
| /linux-4.1.27/arch/s390/kernel/ |
| H A D | mcount.S | 37 stmg %r2,%r14,(STACK_PTREGS_GPRS+2*8)(%r15)
39 aghik %r2,%r0,-MCOUNT_INSN_SIZE
43 lgr %r2,%r0
44 aghi %r2,-MCOUNT_INSN_SIZE
58 lg %r2,(STACK_PTREGS_GPRS+14*8)(%r15)
61 stg %r2,(STACK_PTREGS_GPRS+14*8)(%r15)
66 lmg %r2,%r15,(STACK_PTREGS_GPRS+2*8)(%r15)
72 stmg %r2,%r5,32(%r15)
78 lgr %r14,%r2
79 lmg %r2,%r5,32(%r15)
|
| H A D | sclp.S | 51 ltr %r2,%r2
55 al %r2,.LtimeS1-.LbaseS1(%r13)
56 st %r2,.LtimeS1-.LbaseS1(%r13)
68 lhi %r2,2 # return code for timeout
77 sr %r2,%r2
115 lr %r6,%r2 # save command word
118 lhi %r2,1 # error return code
122 sr %r2,%r2 # wait until no longer busy
126 sr %r2,%r2 # wait until result
128 sr %r2,%r2
151 ltr %r2,%r2 # initialization?
156 l %r2,.LwritemaskS3-.LbaseS3(%r13)# get command word
159 ltr %r2,%r2 # servc successful?
164 la %r2,.LinitmaskS3-.LinitsccbS3(%r6)
165 l %r1,0(%r2) # receive mask ok?
166 n %r1,12(%r2)
167 cl %r1,0(%r2)
169 l %r1,4(%r2) # send mask ok?
170 n %r1,8(%r2)
171 cl %r1,4(%r2)
172 sr %r2,%r2
175 lhi %r2,1 # error return code
219 ic %r0,0(%r2) # get character
220 ahi %r2,1
244 l %r2,.LwritedataS4-.LbaseS4(%r13)# write data
247 ltr %r2,%r2 # servc successful?
251 lhi %r2,1 # error return code
276 lr %r10,%r2 # save string pointer
277 lhi %r2,0
279 ltr %r2,%r2
281 lr %r2,%r10
283 ltr %r2,%r2
285 lhi %r2,1
290 lgfr %r2,%r2 # sign extend return value
|
| H A D | head_kdump.S | 28 larl %r2,.Lbase_addr # Check, if we have been
29 lg %r2,0(%r2) # already relocated:
30 clgr %r2,%r13 #
32 lghi %r2,0 # Yes: Start kdump kernel
37 lg %r2,0x418(%r4) # Get kdump base
44 agr %r8,%r2 # Copy data mover to
55 # r2: kdump base address
61 lgr %r11,%r2 # Save kdump base address
62 lgr %r12,%r2
|
| H A D | head.S | 95 la %r3,.Lorb # r2 = address of orb into r2
100 st %r2,4(%r6) # initialize CCW data addresses
101 la %r2,0x50(%r2)
106 slr %r2,%r2
128 ar %r2,%r0
130 br %r4 # r2 contains the total size
133 ahi %r2,0x640 # add 0x640 to total size
166 la %r2,IPL_BS # load start address
175 l %r2,.Linitrd # ramdisk loc. is temp
177 ltr %r2,%r2 # got anything ?
179 chi %r2,895
181 la %r2,895
188 la %r5,0(%r4,%r2)
189 lr %r3,%r2
198 ic %r0,0(%r2,%r3)
201 ahi %r2,1
204 brct %r2,.Ldelspc
207 stc %r0,0(%r2,%r3) # terminate buffer
214 l %r2,.Linitrd # addr of ramdisk
215 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12)
217 st %r2,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r12) # store size of rd
218 ltr %r2,%r2
220 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) # no ramdisk found
222 l %r2,.Linitrd
224 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
226 clc 0(3,%r2),.L_eof
235 la %r2,.Lreset
237 diag %r2,%r3,8
385 la %r2,3f+8-.LPG0(%r13)
386 l %r3,0(%r2)
388 n %r0,4(%r2)
389 cl %r0,4(%r2)
392 la %r2,4(%r2)
398 la %r2,.Lals_string-.LPG0(%r13)
|
| H A D | swsusp.S | 95 larl %r2,suspend_zero_pages
96 lg %r2,0(%r2)
100 1: mvcle %r2,%r4,0
104 lghi %r2,0
108 1: mvcle %r2,%r4,0
118 lghi %r2,0
133 lghi %r2,1
149 lg %r2,8(%r1)
155 mvcle %r2,%r4,0
157 lg %r2,8(%r1)
158 sske %r0,%r2
167 larl %r2,.Lrestart_diag308_psw
168 og %r1,0(%r2)
171 epsw %r2,%r3
172 stm %r2,%r3,0(%r1)
196 larl %r1,.Lresume_cpu /* Resume CPU address: r2 */
198 llgh %r2,0(%r1)
200 cgr %r1,%r2
201 je restore_registers /* r1 = r2 -> nothing to do */
212 larl %r2,.Lpanic_string
225 sigp %r9,%r2,SIGP_STOP /* sigp stop to current resume CPU */
231 llgh %r2,0(%r1)
233 sigp %r9,%r2,SIGP_SENSE /* sigp sense, wait for resume CPU */
277 lghi %r2,0
282 1: mvcle %r2,%r4,0
292 lghi %r2,0
300 lghi %r2,0
|
| H A D | relocate_kernel.S | 14 * %r2 = pointer to first kimage_entry_t
60 lg %r5,0(%r2) # read another word for indirection page
61 aghi %r2,8 # increment pointer
71 lgr %r2,%r5 # move it into the right register,
97 sr %r2,%r2 # erase register r2
98 sigp %r1,%r2,SIGP_SET_ARCHITECTURE # set cpuid to zero
|
| H A D | entry.S | 56 basr %r2,%r0
63 basr %r2,%r0
181 stg %r15,__THREAD_ksp(%r2) # store kernel stack of prev
182 lg %r4,__THREAD_info(%r2) # get thread_info of prev
232 stg %r2,__PT_ORIG_GPR2(%r11)
238 stg %r2,__PT_R2(%r11) # store return value
309 lgr %r2,%r11 # pass pointer to pt_regs
313 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
326 lgr %r2,%r11 # pass pointer to pt_regs
335 lgr %r2,%r11 # pass pointer to pt_regs
345 lgr %r2,%r11 # pass pointer to pt_regs
354 lgr %r2,%r11 # pass pointer to pt_regs
360 clgr %r0,%r2
362 sllg %r8,%r2,2
367 lg %r2,__PT_ORIG_GPR2(%r11)
369 stg %r2,__PT_R2(%r11) # store return value
373 lgr %r2,%r11 # pass pointer to pt_regs
391 la %r2,0(%r10)
448 lgr %r2,%r11 # pass pointer to pt_regs
458 lgr %r2,%r11 # pass pointer to pt_regs
498 lgr %r2,%r11 # pass pointer to pt_regs
623 lgr %r2,%r11 # pass pointer to pt_regs
635 lgr %r2,%r11 # pass pointer to pt_regs
669 lgr %r2,%r11 # pass pointer to pt_regs
681 STCK __CLOCK_IDLE_ENTER(%r2)
682 stpt __TIMER_IDLE_ENTER(%r2)
735 lgr %r2,%r11 # pass pointer to pt_regs
784 lg %r2,__LC_RESTART_DATA
813 lgr %r2,%r11 # pass pointer to pt_regs
950 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
951 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
954 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
955 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
959 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
960 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
963 alg %r9,__CLOCK_IDLE_ENTER(%r2)
966 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
969 slg %r9,__TIMER_IDLE_ENTER(%r2)
971 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
992 * %r2 pointer to sie control block
997 stg %r2,__SF_EMPTY(%r15) # save control block pointer
1028 lg %r2,__SF_EMPTY+24(%r15) # return exit reason code
|
| /linux-4.1.27/arch/s390/net/ |
| H A D | bpf_jit.S | 26 * Work registers: %r2,%r4,%r5,%r14
29 * %r2 = skb pointer
33 * Return value in %r2: 0 = ok
36 * %r2 = skb pointer
39 * Return value in %r2: Pointer to data
59 lgr %r2,%r7; /* Arg1 = skb pointer */ \
65 ltgr %r2,%r2; /* Set cc to (%r2 != 0) */ \
85 lgr %r2,%r7 # Arg1 = skb pointer
91 ltgr %r2,%r2 # Set cc to (%r2 != 0)
98 lgr %r2,%r7; /* Arg1 = skb pointer */ \
102 ltgr %r2,%r2; \
104 LOAD %r14,0(%r2); /* Get data from pointer */ \
|
| /linux-4.1.27/arch/hexagon/kernel/ |
| H A D | head.S | 50 r2.h = #0xffc0;
51 r2.l = #0x0000;
52 r25 = and(r2,r25); /* R25 holds PHYS_OFFSET now */
76 r2.l = #LO(stext);
81 r2.h = #HI(stext);
85 r1 = sub(r1, r2);
92 r2.h = #0xffc0;
93 r2.l = #0x0000; /* round back down to 4MB boundary */
94 r1 = and(r1,r2);
95 r2 = lsr(r1, #22) /* 4MB page number */ define
96 r2 = asl(r2, #2) /* times sizeof(PTE) (4bytes) */ define
97 r0 = add(r0,r2) /* r0 = address of correct PTE */
98 r2 = #PTE_BITS define
99 r1 = add(r1,r2) /* r1 = 4MB PTE for the first entry */
100 r2.h = #0x0040
101 r2.l = #0x0000 /* 4MB increments */
105 { r1 = add(r1, r2); } :endloop0
114 r2.h = #0xffc0;
115 r2.l = #0x0000; /* round back down to 4MB boundary */
116 r1 = and(r1,r2); /* for huge page */
117 r2 = #PTE_BITS define
118 r1 = add(r1,r2);
119 r2.h = #0x0040
120 r2.l = #0x0000 /* 4MB increments */
125 { r1 = add(r1,r2); } :endloop0
155 r2 = r25; /* phys_offset */ define
156 r2 = and(r1,r2); define
160 r2 = lsr(r2, #22) /* 4MB page number */ define
161 r2 = asl(r2, #2) /* times sizeof(PTE) (4bytes) */ define
162 r1 = add(r1,r2);
208 { r0.L = #LO(__bss_start); r1 = #0; r2.l = #LO(__bss_stop); }
209 { r0.H = #HI(__bss_start); r2.h = #HI(__bss_stop); }
211 r2 = sub(r2,r0); define
|
| /linux-4.1.27/drivers/scsi/arm/ |
| H A D | acornscsi-io.S | 30 subs r2, r2, #16
46 acornscsi_in8: adds r2, r2, #8
55 sub r2, r2, #8
57 acornscsi_in4: adds r2, r2, #4
64 sub r2, r2, #4
66 acornscsi_in2: adds r2, r2, #2
82 subs r2, r2, #16
106 acornscsi_out8: adds r2, r2, #8
120 sub r2, r2, #8
121 acornscsi_out4: adds r2, r2, #4
131 sub r2, r2, #4
132 acornscsi_out2: adds r2, r2, #2
|
| /linux-4.1.27/arch/blackfin/mach-bf561/ |
| H A D | atomic.S | 38 * Clobbers: r2:0, p0
46 safe_testset p0, r2;
48 SSYNC(r2);
53 CSYNC(r2);
55 SSYNC(r2);
70 safe_testset p0, r2;
72 SSYNC(r2);
81 CSYNC(r2);
90 * Clobbers: r2:0, p0
97 SSYNC(r2);
132 SSYNC(r2);
170 SSYNC(r2);
196 * Clobbers: r2:0, p1:0
209 GET_CPUID(p0, r2);
211 r1 <<= r2;
212 r2 = ~r1; define
216 r6 = r1 & r2;
246 SSYNC(r2);
256 * Clobbers: r2:0, p1:0
261 GET_CPUID(p0, r2);
262 r2 += 28;
264 r1 <<= r2;
265 r2 = [p1]; define
266 r2 = r1 | r2; define
267 [p1] = r2;
303 r2 = [p1]; define
304 cc = bittst( r2, 0 );
308 bitset ( r2, 0 ); /* Raise the lock bit. */
309 [p1] = r2;
312 r2 = 1; define
313 [p1] = r2;
323 SSYNC(r2);
346 r2 = 1; define
347 [p1] = r2;
363 * Clobbers: r2:0, p1:0
369 r2 = [p1]; define
370 bitclr ( r2, 0 );
371 [p1] = r2;
385 * Clobbers: r2:0, p1:0
412 SSYNC(r2);
489 r2 = r1; define
490 r2 <<= 4;
491 r2 >>= 4;
492 cc = r2 == 0;
510 SSYNC(r2);
533 r2.l = lo(RW_LOCK_BIAS);
534 r2.h = hi(RW_LOCK_BIAS);
535 cc = r1 == r2;
598 r2 = [p1]; define
599 r3 = r3 + r2;
621 r2 = [p1]; define
622 r3 = r2 & r3;
624 r3 = r2;
645 r2 = [p1]; define
646 r3 = r2 | r3;
648 r3 = r2;
669 r2 = [p1]; define
670 r3 = r2 ^ r3;
672 r3 = r2;
697 CSYNC(r2);
699 SSYNC(r2);
717 r2 = src; \ define
719 r3 = r2; \
741 * r2 = old
753 r4 = r2; \
755 r2 = src; \ define
756 cc = r2 == r4; \
759 1: r3 = r2; \
787 r2 = r1; define
789 r1 <<= r2;
801 r2 = r1; define
803 r1 <<= r2;
815 r2 = r1; define
817 r1 <<= r2;
833 r2 = 1; define
834 r2 <<= r1;
835 r0 = r0 & r2;
856 r2 = 1; define
857 r2 <<= r1;
858 r0 = r0 & r2;
880 r2 = 1; define
881 r2 <<= r1;
882 r0 = r0 & r2;
902 r2 = r1; define
904 r1 <<= r2;
913 * Clobbers: r2:0, p1:0
921 CSYNC(r2);
923 SSYNC(r2);
|
| /linux-4.1.27/arch/cris/arch-v10/lib/ |
| H A D | dram_init.S | 52 move.d CONFIG_ETRAX_DEF_R_SDRAM_TIMING, $r2
53 and.d 0x00ff0000, $r2
55 lsrq 16, $r2
57 move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
68 or.d 0x20, $r2 ; CAS latency = 3
75 or.d 0x20, $r2 ; CAS latency = 3
81 lsrq 1, $r2 ; 16 bits. Shift down value.
90 lslq 16, $r2 ; mrs data starts at bit 16
91 or.d $r2, $r1
95 move.d 10000, $r2
97 subq 1, $r2
100 move.d _sdram_commands_start, $r2
101 and.d 0x000fffff, $r2 ; Make sure commands are read from flash
105 move.b [$r2+], $r4
114 cmp.d $r2, $r3
|
| /linux-4.1.27/arch/hexagon/mm/ |
| H A D | copy_from_user.S | 44 #define bytes r2
52 /* Alignment loop. r2 has been updated. Return it. */
58 r0 = r2
67 r2 += sub(src_sav,src)
70 r0 = r2
77 r2 += sub(src_sav,src)
80 r0 = r2
87 r2 += sub(src_sav,src)
90 r0 = r2
97 r2 += sub(src_sav,src)
100 r0 = r2
|
| H A D | copy_to_user.S | 43 #define bytes r2
54 /* Alignment loop. r2 has been updated. Return it. */
56 r0 = r2
72 r2 += sub(dst_sav,dst)
75 r0 = r2
|
| /linux-4.1.27/arch/sh/kernel/cpu/sh2a/ |
| H A D | entry.S | 46 mov.l r2,@-sp
48 mov.l $cpu_mode,r2
49 bld.b #6,@(0,r2) !previus SR.MD
53 bset.b #6,@(0,r2) !set SR.MD
54 mov.l $current_thread_info,r2
55 mov.l @r2,r2
58 add r2,r0 ! r0 = kernel stack tail
59 mov r15,r2 ! r2 = user stack top
65 mov.l @(4*4,r2),r0
68 mov.l @(3*4,r2),r0
70 mov r2,r0
74 mov r2,r8 ! r8 = previus stack top
77 mov.l @r8+,r2
81 movml.l r2,@-r15
84 mov r15,r2
87 mov r2,r8 ! r8 = previous stack top
90 mov.l @r8+,r2 ! old R2
95 movml.l r2,@-r15
164 mov.l @(OFF_SR,r2),r3
166 mov.l @(OFF_SP,r2),r3
170 mov.l 1f,r2
171 mov.l @r2,r2
173 mov.l r2,@r0
210 mov.l $cpu_mode,r2
212 bst.b #6,@(0,r2) ! save CPU mode
216 mov.l @(OFF_SP,r0),r2
217 add #-8,r2
218 mov.l r2,@(OFF_SP,r0) ! point exception frame top
219 mov.l r1,@(4,r2) ! set sr
221 mov.l r1,@r2 ! set pc
|
| /linux-4.1.27/arch/nios2/kernel/ |
| H A D | head.S | 69 movui r2, NIOS2_ICACHE_LINE_SIZE
73 sub r1, r1, r2
119 movui r2, NIOS2_DCACHE_LINE_SIZE
123 sub r1, r1, r2
128 movia r2, chkadr
129 beq r1, r2,finish_move /* We are running in RAM done */
131 movia r2, _start /* Destination */
134 loop_move: /* r1: src, r2: dest, r3: last dest */
136 stw r8, 0(r2) /* store a word to dest [r2] */
137 flushd 0(r2) /* Flush cache for safety */
139 addi r2, r2, 4 /* inc the dest addr */
140 blt r2, r3, loop_move
151 movia r2, __bss_start
154 stb r0, 0(r2)
155 addi r2, r2, 1
156 bne r1, r2, 1b
160 movia r2, _current_thread /* Remember current thread */
161 stw r1, 0(r2)
|
| H A D | entry.S | 190 bgeu r2, r1, ret_invsyscall
191 slli r1, r2, 2
207 * Negate r2 to get a positive error code
215 bge r2, zero, 3f
216 sub r2, zero, r2
219 stw r2, PT_R2(sp)
237 movi r2, -ENOSYS
252 ldw r2, PT_R2(sp)
261 slli r1, r2, 2
270 * Negate r2 to get a positive error code
278 bge r2, zero, 4f
279 sub r2, zero, r2
282 stw r2, PT_R2(sp)
307 beq r2, r0, no_work_pending
310 ldw r2, PT_R2(sp) /* reload syscall number in r2 */
542 ldw r2, 0(r4) /* load current value */
543 sub r2, r2, r5 /* compare with old value */
544 bne r2, zero, cmpxchg_ret
556 movi r2, __NR_rt_sigreturn
|
| /linux-4.1.27/arch/arm/mach-omap1/ |
| H A D | sram.S | 28 mov r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000
29 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000
30 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00
39 strh r0, [r2] @ set dpll into bypass mode
44 strh r0, [r2] @ write new dpll value
52 lock: ldrh r4, [r2], #0 @ read back dpll value
|
| /linux-4.1.27/arch/s390/boot/compressed/ |
| H A D | head.S | 25 lgr %r4,%r2
26 lg %r2,.Loffset-.LPG1(%r13)
27 la %r4,0(%r2,%r4)
34 lgr %r6,%r2
37 mvcle %r2,%r4,0
|
| /linux-4.1.27/arch/cris/arch-v32/mach-a3/ |
| H A D | dram_init.S | 28 move.d 10000, $r2
30 subq 1, $r2
38 move.d 10000, $r2
40 subq 1, $r2
51 move.d 10000, $r2
53 subq 1, $r2
57 move.d sdram_commands_start, $r2
59 movu.b [$r2+], $r1
60 movu.w [$r2+], $r3
69 cmp.d sdram_commands_end, $r2
|
| /linux-4.1.27/arch/tile/lib/ |
| H A D | usercopy_32.S | 46 * the trailing NUL) in r2. On success, it returns the string length
50 { bz r2, 2f; move r3, r0 }
51 1: { lb_u r4, r1; addi r1, r1, 1; addi r2, r2, -1 }
54 bnzt r2, 1b
76 { bz r1, 2f; or r2, r0, r1 }
77 andi r2, r2, 3
78 bzt r2, .Lclear_aligned_user_asm
104 { movei r2, L2_CACHE_BYTES; add r1, r0, r1 }
105 { sub r2, zero, r2; addi r1, r1, L2_CACHE_BYTES-1 }
106 { and r0, r0, r2; and r1, r1, r2 }
124 { movei r2, L2_CACHE_BYTES; add r1, r0, r1 }
125 { sub r2, zero, r2; addi r1, r1, L2_CACHE_BYTES-1 }
126 { and r0, r0, r2; and r1, r1, r2 }
|
| H A D | usercopy_64.S | 46 * the trailing NUL) in r2. On success, it returns the string length
50 { beqz r2, 2f; move r3, r0 }
51 1: { ld1u r4, r1; addi r1, r1, 1; addi r2, r2, -1 }
54 bnezt r2, 1b
76 { beqz r1, 2f; or r2, r0, r1 }
77 andi r2, r2, 7
78 beqzt r2, .Lclear_aligned_user_asm
104 { movei r2, L2_CACHE_BYTES; add r1, r0, r1 }
105 { sub r2, zero, r2; addi r1, r1, L2_CACHE_BYTES-1 }
106 { and r0, r0, r2; and r1, r1, r2 }
124 { movei r2, L2_CACHE_BYTES; add r1, r0, r1 }
125 { sub r2, zero, r2; addi r1, r1, L2_CACHE_BYTES-1 }
126 { and r0, r0, r2; and r1, r1, r2 }
|
| H A D | memcpy_32.S | 46 * the user source in r1, and the bytes to copy in r2.
67 * the kernel source in r1, and the bytes to copy in r2.
88 /* r0 is the dest, r1 is the source, r2 is the size. */
94 { bz r2, .Ldone; andi r4, r4, 3 }
97 { move r24, r1; move r25, r2 }
101 { bnz r4, .Lcopy_unaligned_maybe_many; addli r4, r2, -256 }
105 { blzt r4, .Lcopy_8_check; slti_u r8, r2, 8 }
118 EX: { lw r3, r1; addi r1, r1, 4; slti_u r8, r2, 16 }
120 EX: { sw r0, r3; addi r0, r0, 4; addi r2, r2, -4 }
121 EX: { sw r0, r4; addi r0, r0, 4; addi r2, r2, -4 }
123 { bzt r8, .Lcopy_8_loop; slti_u r4, r2, 4 }
128 EX: { sw r0, r3; addi r0, r0, 4; addi r2, r2, -4 }
131 { bnz r2, .Lcopy_unaligned_few }
148 EX: { sw r0, r3; addi r0, r0, 4; addi r2, r2, -4 }
170 * - r2 >= (256 - 60), only the first time the loop trips.
182 { jal .Lcopy_line2; add r15, r1, r2 }
187 { bz r4, .Lcopy_8_check; slti_u r8, r2, 8 }
194 { bz r4, .Lcopy_8_check; slti_u r8, r2, 8 }
201 { bz r4, .Lcopy_8_check; slti_u r8, r2, 8 }
225 * - r2 is decremented by 64.
232 * - r4 is nonzero iff r2 >= 64.
255 { add r15, r1, r2 }
300 EX: { sw r0, r16; addi r0, r0, 4; add r16, r0, r2 } /* store(WORD_0) */
325 /* Will r2 be > 64 after we subtract 64 below? */
326 shri r4, r2, 7
332 addi r2, r2, -64
346 { slti_u r8, r2, 20; sub r4, zero, r0 }
348 { bz r4, .Ldest_is_word_aligned; add r18, r1, r2 }
359 EX: { sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }
363 { bz r3, .Lcheck_aligned_copy_size; addli r4, r2, -256 }
368 { slti_u r9, r2, 64; bz r8, .Ldest_is_L2_line_aligned }
377 * - r2 >= 4
381 EX: { lwadd_na r7, r1, 4; slti_u r8, r2, 4 + 4 }
383 { dword_align r6, r7, r1; slti_u r9, r2, 64 + 4 }
384 EX: { swadd r0, r6, 4; addi r2, r2, -4 }
391 * - r2 >= 4 (# of bytes left to store).
393 * - r9 = (r2 < 64U).
404 /* r2 >= 64 */
443 /* r16 = (r2 < 64), after we subtract 32 from r2 below. */
444 slti_u r16, r2, 64 + 32
455 EX: { swadd r0, r13, 4; addi r2, r2, -32 }
463 * - r2 >= 0 (# of bytes left to store).
468 { bz r2, .Lcopy_unaligned_done; slti_u r8, r2, 4 }
484 EX: { sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }
485 { bnzt r2, .Lcopy_unaligned_few }
500 * r2 (num remaining) is correct, but r0 (dst) and r1 (src)
508 { sub r3, r25, r2 }
519 { sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }
520 { bnzt r2, copy_from_user_fixup_loop }
525 { move r3, r2; bz r2, 2f /* should be impossible, but handle it. */ }
529 { move r0, r2; jrp lr }
534 .Lctu: { sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }
535 { bnzt r2, copy_to_user_fixup_loop }
538 { move r0, r2; jrp lr }
545 { sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }
546 { bnzt r2, memcpy_fixup_loop }
|
| H A D | atomic_asm_32.S | 18 * r2: new value to write, or for cmpxchg/add_unless, value to compare against
175 atomic_op _cmpxchg, 32, "seq r26, r22, r2; { bbns r26, 3f; move r24, r3 }"
176 atomic_op _xchg, 32, "move r24, r2"
177 atomic_op _xchg_add, 32, "add r24, r22, r2"
179 "sne r26, r22, r2; { bbns r26, 3f; add r24, r22, r3 }"
180 atomic_op _or, 32, "or r24, r22, r2"
181 atomic_op _andn, 32, "nor r2, r2, zero; and r24, r22, r2"
182 atomic_op _xor, 32, "xor r24, r22, r2"
184 atomic_op 64_cmpxchg, 64, "{ seq r26, r22, r2; seq r27, r23, r3 }; \
186 atomic_op 64_xchg, 64, "{ move r24, r2; move r25, r3 }"
187 atomic_op 64_xchg_add, 64, "{ add r24, r22, r2; add r25, r23, r3 }; \
190 "{ sne r26, r22, r2; sne r27, r23, r3 }; \
|
| /linux-4.1.27/arch/x86/crypto/ |
| H A D | aes-x86_64-asm_64.S | 52 #define prologue(FUNC,KEY,B128,B192,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11) \
54 movq r1,r2; \
73 #define epilogue(FUNC,r1,r2,r3,r4,r5,r6,r7,r8,r9) \
74 movq r1,r2; \
83 #define round(TAB,OFFSET,r1,r2,r3,r4,r5,r6,r7,r8,ra,rb,rc,rd) \
84 movzbl r2 ## H,r5 ## E; \
85 movzbl r2 ## L,r6 ## E; \
87 movw r4 ## X,r2 ## X; \
89 roll $16,r2 ## E; \
117 movzbl r2 ## H,r1 ## E; \
118 movzbl r2 ## L,r7 ## E; \
119 shrl $16,r2 ## E; \
122 movzbl r2 ## H,r1 ## E; \
123 movzbl r2 ## L,r2 ## E; \
127 xorl TAB(,r2,4),r4 ## E;
129 #define move_regs(r1,r2,r3,r4) \
131 movl r4 ## E,r2 ## E;
|
| H A D | aes-i586-asm_32.S | 58 #define r2 ecx define
157 // on exit: r2,r1,r4,r5
163 do_fcol(table, r2,r5,r4,r1, r0,r3, arg); /* idx=r0 */ \
164 do_col (table, r4,r1,r2,r5, r0,r3); /* idx=r4 */ \
166 do_col (table, r1,r2,r5,r4, r0,r3); /* idx=r1 */ \
168 do_col (table, r5,r4,r1,r2, r0,r3); /* idx=r5 */
171 // on entry: r2,r1,r4,r5
178 do_fcol(table, r0,r5,r4,r1, r2,r3, arg); /* idx=r2 */ \
179 do_col (table, r4,r1,r0,r5, r2,r3); /* idx=r4 */ \
180 restore(r2,0); \
181 do_col (table, r1,r0,r5,r4, r2,r3); /* idx=r1 */ \
182 restore(r2,1); \
183 do_col (table, r5,r4,r1,r0, r2,r3); /* idx=r5 */
192 // on exit: r2,r1,r4,r5
198 do_icol(table, r2,r1,r4,r5, r0,r3, arg); /* idx=r0 */ \
199 do_col (table, r4,r5,r2,r1, r0,r3); /* idx=r4 */ \
201 do_col (table, r1,r4,r5,r2, r0,r3); /* idx=r1 */ \
203 do_col (table, r5,r2,r1,r4, r0,r3); /* idx=r5 */
206 // on entry: r2,r1,r4,r5
213 do_icol(table, r0,r1,r4,r5, r2,r3, arg); /* idx=r2 */ \
214 do_col (table, r4,r5,r0,r1, r2,r3); /* idx=r4 */ \
215 restore(r2,0); \
216 do_col (table, r1,r4,r5,r0, r2,r3); /* idx=r1 */ \
217 restore(r2,1); \
218 do_col (table, r5,r0,r1,r4, r2,r3); /* idx=r5 */
234 mov in_blk+4(%esp),%r2
244 mov (%r2),%r0
245 mov 4(%r2),%r1
246 mov 8(%r2),%r4
247 mov 12(%r2),%r5
306 mov in_blk+4(%esp),%r2
316 mov (%r2),%r0
317 mov 4(%r2),%r1
318 mov 8(%r2),%r4
319 mov 12(%r2),%r5
|
| /linux-4.1.27/arch/sh/kernel/ |
| H A D | relocate_kernel.S | 55 mov.l r2, @-r15
70 mov.l r2, @-r15
99 mov.l @r15+, r2
113 mov.l @r15+, r2
155 mov r0,r2
157 and r1,r2
163 mov r2,r5
169 mov r2,r4
193 mov.l @(0, r2), r8
196 mov.l r1, @(0, r2)
198 mov.l @(4, r2), r8
201 mov.l r1, @(4, r2)
203 mov.l @(8, r2), r8
206 mov.l r1, @(8, r2)
208 mov.l @(12, r2), r8
211 mov.l r1, @(12, r2)
214 add #16,r2
|
| /linux-4.1.27/arch/arm/crypto/ |
| H A D | aes-armv4.S | 155 mov r11,r2
170 ldrb r2,[r12,#11]
176 orr r2,r2,r4,lsl#8
178 orr r2,r2,r5,lsl#16
180 orr r2,r2,r6,lsl#24
189 ldr r2,[r12,#8]
194 rev r2,r2
205 rev r2,r2
210 str r2,[r12,#8]
225 mov r4,r2,lsr#24
227 mov r5,r2,lsr#16
229 mov r6,r2,lsr#8
235 strb r2,[r12,#11]
253 eor r2,r2,r6
277 and r7,lr,r2,lsr#8 @ i0
279 and r8,lr,r2,lsr#16 @ i1
281 and r9,lr,r2
285 mov r2,r2,lsr#24
289 ldr r2,[r10,r2,lsl#2] @ Te0[s2>>24]
296 eor r2,r2,r5,ror#16
305 eor r2,r2,r9,ror#8
315 eor r2,r2,r5
339 and r7,lr,r2,lsr#8 @ i0
341 and r8,lr,r2,lsr#16 @ i1
343 and r9,lr,r2
347 mov r2,r2,lsr#24
351 ldrb r2,[r10,r2,lsl#2] @ Te4[s2>>24]
358 eor r2,r5,r2,lsl#24
368 eor r2,r2,r9,lsl#16
375 eor r2,r2,r5
389 teq r2,#0
406 mov r11,r2 @ key
421 ldrb r2,[r12,#11]
427 orr r2,r2,r4,lsl#8
429 orr r2,r2,r5,lsl#16
431 orr r2,r2,r6,lsl#24
439 str r2,[r11,#-8]
444 ldr r2,[r12,#8]
449 rev r2,r2
454 str r2,[r11,#-8]
482 eor r2,r2,r1 @ rk[6]=rk[2]^rk[5]
484 eor r3,r3,r2 @ rk[7]=rk[3]^rk[6]
485 str r2,[r11,#-8]
489 sub r2,r11,#176
546 eor r2,r2,r1 @ rk[8]=rk[2]^rk[7]
548 eor r3,r3,r2 @ rk[9]=rk[3]^rk[8]
549 str r2,[r11,#-16]
552 subeq r2,r11,#216
615 eor r2,r2,r1 @ rk[10]=rk[2]^rk[9]
617 eor r3,r3,r2 @ rk[11]=rk[3]^rk[10]
618 str r2,[r11,#-24]
621 subeq r2,r11,#256
671 ldr r12,[r2,#240] @ AES_set_encrypt_key preserves r2,
672 mov r11,r2 @ which is AES_KEY *key
673 mov r7,r2
674 add r8,r2,r12,lsl#4
678 ldr r2,[r7,#8]
686 str r2,[r8,#16+8]
712 and r2,r1,r9
715 eor r2,r4,r2,lsl#1 @ tp4
717 and r4,r2,r7
718 and r3,r2,r9
723 eor r4,r1,r2
728 eor r4,r4,r2,ror#16
850 mov r11,r2
865 ldrb r2,[r12,#11]
871 orr r2,r2,r4,lsl#8
873 orr r2,r2,r5,lsl#16
875 orr r2,r2,r6,lsl#24
884 ldr r2,[r12,#8]
889 rev r2,r2
900 rev r2,r2
905 str r2,[r12,#8]
920 mov r4,r2,lsr#24
922 mov r5,r2,lsr#16
924 mov r6,r2,lsr#8
930 strb r2,[r12,#11]
948 eor r2,r2,r6
972 and r7,lr,r2,lsr#8 @ i0
974 and r8,lr,r2 @ i1
976 and r9,lr,r2,lsr#16
980 mov r2,r2,lsr#24
984 ldr r2,[r10,r2,lsl#2] @ Td0[s2>>24]
991 eor r2,r2,r5,ror#8
1000 eor r2,r2,r9,ror#24
1010 eor r2,r2,r5
1045 and r7,lr,r2,lsr#8 @ i0
1047 and r8,lr,r2 @ i1
1051 and r9,lr,r2,lsr#16
1053 ARM( ldrb r2,[r10,r2,lsr#24] ) @ Td4[s2>>24]
1054 THUMB( add r2,r10,r2,lsr#24 ) @ Td4[s2>>24]
1055 THUMB( ldrb r2,[r2] )
1060 eor r2,r5,r2,lsl#16
1075 eor r2,r9,r2,lsl#8
1082 eor r2,r2,r5
|
| /linux-4.1.27/arch/m32r/kernel/ |
| H A D | head.S | 52 LDIMM (r2, __bss_start)
54 sub r3, r2 ; BSS size in bytes
57 srli r4, #4 || addi r2, #-4
62 ld r0, @(4,r2)
64 st r1, @+r2 || addi r4, #-1
65 st r1, @+r2
66 st r1, @+r2
67 st r1, @+r2 || cmpeq r1, r4 ; R4 = 0?
71 addi r2, #4
74 stb r1, @r2 || addi r4, #-1
75 addi r2, #1
81 LDIMM (r2, __bss_start)
83 sub r3, r2 ; BSS size in bytes
87 addi r2, #-4 ; account for pre-inc store
90 st r1, @+r2 ; yep, zero out another longword
95 addi r2, #4 ; account for pre-inc store
98 stb r1, @r2 ; yep, zero out another byte
99 addi r2, #1 ; bump address
113 LDIMM (r2, TOP_DATA)
115 addi r2, #-4
119 st r0, @+r2
120 cmp r2, r3
125 LDIMM (r2, start_kernel)
126 jl r2
143 LDIMM (r2, init_tlb)
144 jl r2
|
| H A D | entry.S | 33 * @(0x18,sp) - r2
254 ld r2, R2(sp)
332 LDIMM (r2, ei_vec_table)
333 add r2, r0
334 ld r2, @r2
335 beqz r2, 1f ; if (no IPI handler) goto exit
337 jl r2
350 add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt
351 bnez r2, 3f
362 add3 r2, r0, #-(M32R_IRQ_INT0) ; INT0# interrupt
363 bnez r2, 4f
374 add3 r2, r0, #-(M32R_IRQ_INT2) ; INT2# interrupt
375 bnez r2, 5f
405 push r2
410 mv r0, r2
415 pop r2
430 seth r2, #shigh(MMU_REG_BASE) /* Check status register */
431 ld r4, @(low(MESTS_offset),r2)
432 st r4, @(low(MESTS_offset),r2)
440 ld r2, @(low(MDEVA_offset),r2) ; set address
447 mvfc r2, bpc ; set address
459 * r2 : unsigned long address
530 push r2
544 pop r2
|
| /linux-4.1.27/arch/arm/mach-at91/ |
| H A D | pm_suspend.S | 81 * @r2: base address of second SDRAM Controller or 0 if not present
96 str r2, .sramc1_base
198 * @r2: base address of the sram controller
203 ldr r2, .sramc_base
221 str r3, [r2, #AT91RM9200_SDRAMC_SRR]
235 ldr r3, [r2, #AT91_DDRSDRC_MDR]
239 ldreq r3, [r2, #AT91_DDRSDRC_MDR]
242 streq r3, [r2, #AT91_DDRSDRC_MDR]
245 ldr r3, [r2, #AT91_DDRSDRC_LPR]
249 str r3, [r2, #AT91_DDRSDRC_LPR]
252 ldr r2, .sramc1_base
253 cmp r2, #0
256 ldr r3, [r2, #AT91_DDRSDRC_MDR]
260 ldreq r3, [r2, #AT91_DDRSDRC_MDR]
263 streq r3, [r2, #AT91_DDRSDRC_MDR]
266 ldr r3, [r2, #AT91_DDRSDRC_LPR]
270 str r3, [r2, #AT91_DDRSDRC_LPR]
278 str r3, [r2, #AT91_DDRSDRC_MDR]
281 str r3, [r2, #AT91_DDRSDRC_LPR]
284 ldr r2, .sramc1_base
285 cmp r2, #0
287 strne r3, [r2, #AT91_DDRSDRC_MDR]
289 strne r3, [r2, #AT91_DDRSDRC_LPR]
301 ldr r3, [r2, #AT91_SDRAMC_LPR]
305 str r3, [r2, #AT91_SDRAMC_LPR]
309 str r3, [r2, #AT91_SDRAMC_LPR]
|
| /linux-4.1.27/arch/sh/kernel/cpu/sh3/ |
| H A D | swsusp.S | 18 #define k2 r2
36 mov.l @(PBE_ADDRESS, r4), r2
44 mov.l @r2+,r1 /* 16n+0 */
47 mov.l @r2+,r1 /* 16n+4 */
50 mov.l @r2+,r1 /* 16n+8 */
53 mov.l @r2+,r1 /* 16n+12 */
74 mov.l @r15+, r2
98 mov r15, r2 ! save sp in r2
123 mov r2, r15 ! restore old sp
133 mov r2, r15 ! restore old sp
|
| /linux-4.1.27/arch/arm/mach-exynos/ |
| H A D | sleep.S | 69 ldr r2, [r0]
70 ldr r2, [r0, r2]
76 ldr r2, [r0]
77 add r0, r2, r0
85 ldr r2, [r1, #L2X0_CTRL]
86 tst r2, #0x1
90 ldr r2, [r0, #L2X0_R_DATA_LATENCY]
97 ldr r2, [r0]
98 add r0, r2, r0
101 ldr r2, [r0, #L2X0_R_AUX_CTRL]
|
| /linux-4.1.27/arch/arc/include/uapi/asm/ |
| H A D | swab.h | 53 * 8051fd9c: lsr r2,r3,24 ; get 0th Byte
57 * 8051fdb4: or r2,r2,r5 ; combine 0th and 3rd Bytes
59 * 8051fdbc: or r2,r2,r4 ; combine 0,3 Bytes with 1st Byte
60 * 8051fdc0: or r2,r2,r3 ; combine 0,3,1 Bytes with 2nd Byte
61 * 8051fdc4: st r2,[r1,20] ; Mem op : save result back to mem
|
| /linux-4.1.27/arch/unicore32/kernel/ |
| H A D | debug.S | 41 printhex: adr r2, hexbuf
42 add r3, r2, r1
52 cxor.a r3, r2
54 mov r0, r2
63 1: waituart r2, r3
65 busyuart r2, r3
|
| H A D | debug-macro.S | 55 @ We assume r1 and r2 can be clobbered.
57 movl r2, #UART_DIVISOR_DEFAULT
60 and r1, r2, #0xff00
63 and r1, r2, #0xff
|
| H A D | entry.S | 179 @ r2 - lr_<exception>, already fixed up for correct return/restart
206 @ r2 - lr_<exception>, already fixed up for correct return/restart
212 stm (r2 - r4), [r0]+
268 @ r2 - aborted context pc
281 mov r2, sp
292 ldw r2, [sp+], #S_PSR
293 priv_exit r2 @ return from exception
341 mov r0, r2 @ pass address of aborted instruction
344 mov r2, sp @ regs
355 ldw r2, [sp+], #S_PSR
356 priv_exit r2 @ return from exception
382 1: ldw.u r0, [r2]
399 * r2 = PC
416 andn r2, r1, #0x08000000
417 ctf r2, s31 @ clear 27 bit
418 mov r2, sp @ nothing stacked - regdump is at TOS
424 @ r2 pointer to register dump
431 @ r2 - aborted context pc
443 enable_irq r2
444 mov r2, sp
476 mov r0, r2 @ pass address of aborted instruction.
479 mov r2, sp @ regs
494 * r0 = previous task_struct, r1 = previous thread_info, r2 = next thread_info
511 add ip, r2, #TI_FPSTATE
519 add ip, r2, #TI_CPU_SAVE
548 mov r2, why @ 'syscall'
642 mov r2, scno
657 mov r2, scno
|
| /linux-4.1.27/arch/unicore32/boot/compressed/ |
| H A D | head.S | 29 ldm (r1, r2, r3, r5, r6, r7, r8), [r0]+
52 * r2 - BSS start
56 add r2, r2, r0
75 * r2 - BSS start
79 1002: stw.w r0, [r2]+, #4
80 csub.a r2, r3
101 add r2, sp, #0x10000 @ 64k max
108 * r2 = end of malloc space (and therefore this image)
110 * r4 >= r2 -> OK
114 csub.a r4, r2
134 * r2: free_mem_ptr_end_p
163 .word __bss_start @ r2
179 movc r2, p1.c0, #0
180 cand.a r2, #2
|
| /linux-4.1.27/arch/blackfin/mach-common/ |
| H A D | head.S | 19 r2 = r2 - r1; define
20 cc = r2 == 0;
22 r2 >>= 2;
24 p2 = r2;
99 r2 = [p0 + PDA_DF_ICPLB]; define
103 [p1 + PDA_INIT_DF_ICPLB] = r2;
125 r2.l = __ebss_l1;
126 r2.h = __ebss_l1;
132 r2.l = __ebss_b_l1;
133 r2.h = __ebss_b_l1;
139 r2.l = __ebss_l2;
140 r2.h = __ebss_l2;
145 r2.l = ___bss_stop;
146 r2.h = ___bss_stop;
|
| /linux-4.1.27/arch/arm/mach-tegra/ |
| H A D | sleep-tegra30.S | 171 cpu_to_halt_reg r2, r3
172 add r2, r2, r12 @ virtual HALT_EVENTS address for this CPU
213 str r3, [r2]
214 ldr r0, [r2]
350 mov32 r2, TEGRA_PMC_BASE
351 ldr r1, [r2, #PMC_PLLP_WB0_OVERRIDE]
353 str r1, [r2, #PMC_PLLP_WB0_OVERRIDE]
363 mov32 r2, TEGRA_PMC_BASE
364 ldr r1, [r2, #PMC_PLLP_WB0_OVERRIDE]
366 str r1, [r2, #PMC_PLLP_WB0_OVERRIDE]
407 str r1, [r2, #PMC_IO_DPD_REQ] @ DPD_OFF
464 ldr r2, [r0, #EMC_EMC_STATUS]
465 ands r2, r2, r1
471 ldr r2, [r0, #EMC_FBIO_CFG5]
473 and r2, r2, #3 @ check DRAM_TYPE
474 cmp r2, #2
478 mov32 r2, 0x80000011 @ DEV_SELECTION=2, LENGTH=LONG, CMD=1
479 str r2, [r0, #EMC_ZQ_CAL]
480 ldr r2, [r7]
481 add r2, r2, #10
482 wait_until r2, r7, r3
488 mov32 r2, 0x40000011 @ DEV_SELECTION=1, LENGTH=LONG, CMD=1
489 str r2, [r0, #EMC_ZQ_CAL]
490 ldr r2, [r7]
491 add r2, r2, #10
492 wait_until r2, r7, r3
497 mov32 r2, 0x800A00AB @ DEV_SELECTION=2, MA=10, OP=0xAB
498 str r2, [r0, #EMC_MRW]
499 ldr r2, [r7]
500 add r2, r2, #1
501 wait_until r2, r7, r3
507 mov32 r2, 0x400A00AB @ DEV_SELECTION=1, MA=10, OP=0xAB
508 str r2, [r0, #EMC_MRW]
509 ldr r2, [r7]
510 add r2, r2, #1
511 wait_until r2, r7, r3
676 cpu_to_csr_reg r2, r1
677 ldr r0, [r6, r2]
680 str r0, [r6, r2]
688 cpu_to_halt_reg r2, r1
689 str r0, [r6, r2]
691 ldr r0, [r6, r2] /* memory barrier */
717 adreq r2, tegra30_sdram_pad_address
720 adreq r2, tegra114_sdram_pad_address
723 adreq r2, tegra124_sdram_pad_address
729 ldr r0, [r2, r9] @ r0 is the addr in the pad_address
762 wait_until r1, r7, r2
783 ldr r2, [r0, #EMC_EMC_STATUS]
784 and r2, r2, r1
785 cmp r2, r1
790 mov32 r2, 0xF8F8FFFF @ clear XM2VTTGEN_DRVUP and XM2VTTGEN_DRVDN
791 and r1, r1, r2
|
| H A D | sleep-tegra20.S | 101 ldr r2, =__tegra20_cpu1_resettable_status_offset
103 strb r12, [r1, r2]
107 mov r2, #FLOW_CTRL_WAITEVENT | FLOW_CTRL_JTAG_RESUME
108 str r2, [r3, r1] @ put flow controller in wait event mode
109 ldr r2, [r3, r1]
138 * r2 = flag[0] (in SCRATCH38)
141 * r2 = flag[1] (in SCRATCH39)
152 addeq r2, r3, #PMC_SCRATCH38
154 addne r2, r3, #PMC_SCRATCH39
158 str r12, [r2] @ flag[cpu] = 1
176 addeq r2, r3, #PMC_SCRATCH38
177 addne r2, r3, #PMC_SCRATCH39
179 str r12, [r2]
191 ldr r2, =__tegra20_cpu1_resettable_status_offset
193 strb r12, [r1, r2]
205 ldr r2, =__tegra20_cpu1_resettable_status_offset
207 strb r12, [r1, r2]
219 ldr r2, =__tegra20_cpu1_resettable_status_offset
220 ldrb r12, [r1, r2]
358 adr r2, tegra20_sdram_pad_address
364 ldr r7, [r2, r5] @ r7 is the addr in the pad_address
401 ldr r2, [r0, #EMC_EMC_STATUS]
402 ands r2, r2, r1
499 mov r2, #3
500 str r2, [r1, #EMC_REQ_CTRL] @ stall incoming DRAM requests
503 ldr r2, [r1, #EMC_EMC_STATUS]
504 tst r2, #4
507 mov r2, #1
508 str r2, [r1, #EMC_SELF_REF]
510 emc_device_mask r2, r1
514 and r3, r3, r2
515 cmp r3, r2
518 adr r2, tegra20_sdram_pad_address
525 ldr r0, [r2, r5] @ r0 is the addr in the pad_address
540 adr r2, tegra20_sclk_save
541 str r0, [r2]
|
| H A D | sleep.S | 53 mrc p15, 0, r2, c1, c0, 0
54 bic r2, r2, #CR_C
55 mcr p15, 0, r2, c1, c0, 0
129 movw r2, #CR_I | CR_Z | CR_C | CR_M
130 bic r3, r3, r2
137 movweq r2, #:lower16:(TEGRA_ARM_PERIF_BASE + 0x3000)
138 movteq r2, #:upper16:(TEGRA_ARM_PERIF_BASE + 0x3000)
140 streq r3, [r2, #L2X0_CTRL]
|
| /linux-4.1.27/arch/arm/mach-ep93xx/ |
| H A D | crunch-bits.S | 83 ldr r2, [sp, #60] @ current task pc value
86 sub r2, r2, #4 @ adjust pc back
87 str r2, [sp, #60]
89 ldr r2, [r8, #0x80]
90 mov r2, r2 @ flush out enable (@@@)
213 orr r2, ip, #PSR_I_BIT @ disable interrupts
214 msr cpsr_c, r2
219 add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area
224 teqne r1, r2 @ or specified one?
228 mov r2, #0xaa
229 str r2, [r4, #0xc0]
235 ldr r2, [r4, #0x80] @ flush out enable (@@@)
236 mov r2, r2
239 mov r2, #0xaa @ disable access to crunch
240 str r2, [r4, #0xc0]
259 orr r2, ip, #PSR_I_BIT @ disable interrupts
260 msr cpsr_c, r2
263 add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area
265 teq r2, r3 @ does this task own it...
271 mov r1, r2
272 mov r2, #CRUNCH_SIZE
292 orr r2, ip, #PSR_I_BIT @ disable interrupts
293 msr cpsr_c, r2
296 add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area
298 teq r2, r3 @ does this task own it...
303 mov r0, r2
304 mov r2, #CRUNCH_SIZE
|
| /linux-4.1.27/arch/arm/common/ |
| H A D | vlock.S | 62 voting_begin r0, r1, r2
64 ldrb r2, [r0, #VLOCK_OWNER_OFFSET] @ check whether lock is held
65 cmp r2, #VLOCK_OWNER_NONE
72 voting_end r0, r1, r2 @ implies DMB
78 MANY( ldr r2, [r0, r3] )
79 FEW( ldr r2, [r0, #VLOCK_VOTING_OFFSET] )
80 cmp r2, #0
90 ldrb r2, [r0, #VLOCK_OWNER_OFFSET]
91 eor r0, r1, r2 @ zero if I won, else nonzero
95 voting_end r0, r1, r2
|
| /linux-4.1.27/arch/parisc/kernel/ |
| H A D | real2.S | 87 b,l rfi_virt2real,%r2
90 b,l save_control_regs,%r2 /* modifies r1, r2, r28 */
97 load32 PA(ric_ret), %r2
105 b,l restore_control_regs, %r2 /* modifies r1, r2, r26 */
108 b,l rfi_real2virt,%r2
140 bv 0(%r2)
154 bv 0(%r2)
191 tophys_r1 %r2
192 bv 0(%r2)
225 tovirt_r1 %r2
226 bv 0(%r2)
265 b,l rfi_virt2real,%r2
268 b,l save_control_regs,%r2 /* modifies r1, r2, r28 */
271 load32 PA(r64_ret), %r2
276 b,l restore_control_regs, %r2 /* modifies r1, r2, r26 */
279 b,l rfi_real2virt,%r2
298 bve (%r2)
300 bv %r0(%r2)
|
| H A D | syscall.S | 160 STREG %r2, TASK_PT_GR2(%r1) /* preserve rp */
163 LDREGM -FRAME_SIZE(%r30), %r2 /* get users sp back */
165 extrd,u %r2,63,1,%r19 /* W hidden in bottom bit */
167 xor %r19,%r2,%r2 /* clear bottom bit */
172 STREG %r2, TASK_PT_GR30(%r1) /* ... and save it */
197 copy %r19,%r2 /* W bit back to r2 */
217 or,= %r2,%r2,%r2
220 or,= %r2,%r2,%r2
236 ldi __NR_rt_sigreturn,%r2
237 comb,= %r2,%r20,.Lrt_sigreturn
239 ldil L%syscall_exit,%r2
241 ldo R%syscall_exit(%r2),%r2
244 ldil L%syscall_exit_rfi,%r2
246 ldo R%syscall_exit_rfi(%r2),%r2
275 ssm 0,%r2
276 STREG %r2,TASK_PT_PSW(%r1) /* Lower 8 bits only!! */
277 mfsp %sr0,%r2
278 STREG %r2,TASK_PT_SR0(%r1)
279 mfsp %sr1,%r2
280 STREG %r2,TASK_PT_SR1(%r1)
281 mfsp %sr2,%r2
282 STREG %r2,TASK_PT_SR2(%r1)
283 mfsp %sr3,%r2
284 STREG %r2,TASK_PT_SR3(%r1)
285 STREG %r2,TASK_PT_SR4(%r1)
286 STREG %r2,TASK_PT_SR5(%r1)
287 STREG %r2,TASK_PT_SR6(%r1)
288 STREG %r2,TASK_PT_SR7(%r1)
289 STREG %r2,TASK_PT_IASQ0(%r1)
290 STREG %r2,TASK_PT_IASQ1(%r1)
291 LDREG TASK_PT_GR31(%r1),%r2
292 STREG %r2,TASK_PT_IAOQ0(%r1)
293 ldo 4(%r2),%r2
294 STREG %r2,TASK_PT_IAOQ1(%r1)
295 ldo TASK_REGS(%r1),%r2
296 /* reg_save %r2 */
297 STREG %r3,PT_GR3(%r2)
298 STREG %r4,PT_GR4(%r2)
299 STREG %r5,PT_GR5(%r2)
300 STREG %r6,PT_GR6(%r2)
301 STREG %r7,PT_GR7(%r2)
302 STREG %r8,PT_GR8(%r2)
303 STREG %r9,PT_GR9(%r2)
304 STREG %r10,PT_GR10(%r2)
305 STREG %r11,PT_GR11(%r2)
306 STREG %r12,PT_GR12(%r2)
307 STREG %r13,PT_GR13(%r2)
308 STREG %r14,PT_GR14(%r2)
309 STREG %r15,PT_GR15(%r2)
310 STREG %r16,PT_GR16(%r2)
311 STREG %r17,PT_GR17(%r2)
312 STREG %r18,PT_GR18(%r2)
315 copy %r2,%r26
317 ldil L%tracesys_next,%r2
319 ldo R%tracesys_next(%r2),%r2
355 ldi __NR_rt_sigreturn,%r2
356 comb,= %r2,%r20,.Ltrace_rt_sigreturn
358 ldil L%tracesys_exit,%r2
360 ldo R%tracesys_exit(%r2),%r2
375 bl do_syscall_trace_exit,%r2
386 ldil L%tracesys_sigexit,%r2
388 ldo R%tracesys_sigexit(%r2),%r2
396 bl do_syscall_trace_exit,%r2
423 - %r2 (return pointer)
|
| H A D | entry.S | 760 BL schedule_tail, %r2
770 copy %r31, %r2
782 STREG %r2, -RP_OFFSET(%r30)
787 load32 _switch_to_ret, %r2
789 STREG %r2, TASK_PT_KPC(%r26)
790 LDREG TASK_PT_KPC(%r25), %r2
795 bv %r0(%r2)
803 LDREG -RP_OFFSET(%r30), %r2
804 bv %r0(%r2)
905 BL do_notify_resume,%r2
959 ldil L%intr_check_sig, %r2
966 ldo R%intr_check_sig(%r2), %r2
989 BL preempt_schedule_irq, %r2
1020 ldil L%intr_return, %r2
1027 ldo R%intr_return(%r2), %r2 /* return to intr_return, not here */
1103 ldil L%intr_check_sig, %r2
1107 ldo R%intr_check_sig(%r2), %r2
1653 %r2 saved in PT_REGS by gateway page
1728 BL schedule_tail, %r2
1745 STREG %r2, -RP_OFFSET(%r30)
1748 BL sys_rt_sigreturn,%r2
1751 BL sys_rt_sigreturn,%r2
1756 LDREG -RP_OFFSET(%r30), %r2
1764 * syscall, then r2 will take us to syscall_exit; otherwise r2 will
1767 bv %r0(%r2)
1816 BL do_notify_resume,%r2
1830 ldi _TIF_SYSCALL_TRACE_MASK,%r2
1831 and,COND(=) %r19,%r2,%r0
1840 LDREG TASK_PT_GR2(%r1),%r2 /* restore user rp */
1888 ldo -1(%r0),%r2 /* Set recovery cntr to -1 */
1889 mtctl %r2,%cr0 /* for immediate trap */
1890 LDREG TASK_PT_PSW(%r1),%r2 /* Get old PSW */
1928 bb,< %r2,30,pt_regs_ok /* Branch if D set */
1933 mfsp %sr0,%r2
1934 STREG %r2,TASK_PT_SR0(%r1)
1937 mfsp %sr1,%r2
1938 STREG %r2,TASK_PT_SR1(%r1)
1943 LDREG TASK_PT_GR31(%r1),%r2
1944 depi 3,31,2,%r2 /* ensure return to user mode. */
1945 STREG %r2,TASK_PT_IAOQ0(%r1)
1946 ldo 4(%r2),%r2
1947 STREG %r2,TASK_PT_IAOQ1(%r1)
1952 LDREG TASK_PT_IAOQ0(%r1),%r2
1953 depi 3,31,2,%r2 /* ensure return to user mode. */
1954 STREG %r2,TASK_PT_IAOQ0(%r1)
1955 LDREG TASK_PT_IAOQ1(%r1),%r2
1956 depi 3,31,2,%r2
1957 STREG %r2,TASK_PT_IAOQ1(%r1)
1963 BL schedule,%r2
2059 bv %r0(%r25) /* r2 */
2060 copy %r2,%r1
2133 bv %r0(%r25) /* r2 */
2134 copy %r1,%r2
|
| /linux-4.1.27/arch/arm/mach-mvebu/ |
| H A D | coherency_ll.S | 71 mov r2, #(1 << 24)
72 lsl r3, r2, r3
103 ldrex r2, [r0]
104 orr r2, r2, r3
105 strex r1, r2, [r0]
128 ldrex r2, [r0]
129 orr r2, r2, r3
130 strex r1, r2, [r0]
155 ldrex r2, [r0]
156 bic r2, r2, r3
157 strex r1, r2, [r0]
|
| /linux-4.1.27/arch/sh/kernel/cpu/sh5/ |
| H A D | entry.S | 261 st.q SP, SAVED_R2, r2
271 getcon EXPEVT, r2
304 st.q SP, SAVED_R2 , r2
314 gettr tr0, r2
319 st.q SP, SAVED_TR0 , r2
326 getcon SSR, r2
329 shlri r2, 30, r2
330 andi r2, 1, r2 /* r2 = SSR.MD */
338 bnei/u r2, 0, tr1
341 ld.q SP, SAVED_TR0, r2
348 ptabs r2, tr0
356 ld.q SP, SAVED_R2, r2
374 /* 2nd level expects r2,3,4,5,6,18,tr0 to be saved. So we must restore
392 getcon EXPEVT, r2
423 st.q SP, SAVED_R2, r2
433 getcon INTEVT, r2
556 st.q SP, SAVED_R2, r2
566 getcon EXPEVT, r2
589 st.q SP, SAVED_R2, r2
626 movi 0x80, r2
650 * (r2) INTEVT/EXPEVT
843 shlri r2, 3, r2
844 ldx.l r2, r3, r3
845 shlri r2, 2, r2
955 or SP, ZERO, r2
981 ld.q SP, FRAME_R(2), r2
1072 * (r2) fault/interrupt code, entry number (e.g. NMI = 14,
1081 * (r2) struct pt_regs *, original register's frame pointer
1085 * (SP) = r2
1092 or SP, ZERO, r2
1099 or SP, ZERO, r2
1110 or SP, ZERO, r2
1152 * (r2) fault/interrupt code, entry number (TRAP = 11)
1158 * (*r3) Syscall parms: SC#, arg0, arg1, ..., arg5 in order (Saved r2/r7)
1161 * (*r3) Syscall reply (Saved r2)
1165 * result to r2). Common bad exit point is syscall_bad (returning
1166 * ENOSYS then saved to r2).
1174 ld.q r3, FRAME_R(9), r2 /* r2 = #arg << 16 | syscall # */
1175 andi r2, 0x1ff, r2 /* r2 = syscall # */
1200 movi -(ENOSYS), r2 /* Fall-through */
1204 st.q SP, FRAME_R(9), r2 /* Expecting SP back to BASIC frame */
1205 ld.q SP, FRAME_S(FSPC), r2
1206 addi r2, 4, r2 /* Move PC, being pre-execution event */
1207 st.q SP, FRAME_S(FSPC), r2
1214 * loaded into r2 by switch_to() means we can just call it straight away
1225 ld.q SP, FRAME_S(FSPC), r2
1226 addi r2, 4, r2 /* Move PC, being pre-execution event */
1227 st.q SP, FRAME_S(FSPC), r2
1239 ld.q SP, FRAME_R(2), r2
1244 ld.q SP, FRAME_S(FSPC), r2
1245 addi r2, 4, r2 /* Move PC, being pre-execution event */
1246 st.q SP, FRAME_S(FSPC), r2
1256 getcon KCR0, r2
1257 ld.l r2, TI_FLAGS, r4
1264 or SP, ZERO, r2
1269 st.q SP, FRAME_R(2), r2
1286 ld.q SP, FRAME_R(2), r2
1301 st.q SP, FRAME_R(9), r2 /* Save return value */
1304 or SP, ZERO, r2
1309 ld.q SP, FRAME_S(FSPC), r2
1310 addi r2, 4, r2 /* Move PC, being pre-execution event */
1311 st.q SP, FRAME_S(FSPC), r2
1320 * Input r2 : new ASID
1321 * Output r2 : old ASID
1330 andi r2, 255, r2 /* mask down new ASID */
1331 shlli r2, 16, r2 /* align new ASID against SR.ASID */
1333 or r0, r2, r0 /* insert the new ASID */
1341 shlri r3, 16, r2 /* r2 = old ASID */
1369 r2 : real mode address to peek
1370 r2(out) : result quadword
1381 add.l r2, r63, r2 /* sign extend address */
1406 ld.q r2, 0, r2
1418 r2 : real mode address to poke
1430 add.l r2, r63, r2 /* sign extend address */
1455 st.q r2, 0, r3
1477 * (r2) target address
1482 * (*r2) target data
1483 * (r2) non-copied bytes
1486 * number of bytes not copied in r2.
1506 st.q SP, 0, r2
1518 /* don't restore r2-r4, pointless */
1519 /* set result=r2 to zero as the copy must have succeeded. */
1520 or r63, r63, r2
1531 ld.q SP, 0, r2
1541 sub r2, r3, r0
1556 or r4, ZERO, r2
1564 * (r2) target address
1568 * (*r2) zero-ed target data
1569 * (r2) non-zero-ed bytes
1578 st.b r2, 0, ZERO /* Fault address */
1579 addi r2, 1, r2
1584 or r3, ZERO, r2
1594 * (r2) dest address
1598 * (r2) -EFAULT (faulting)
1603 or r2, ZERO, r4
1604 movi -(EFAULT), r2 /* r2 = reply, no real fixup */
1609 or ZERO, ZERO, r2
1618 or r2, ZERO, r4
1619 movi -(EFAULT), r2 /* r2 = reply, no real fixup */
1624 or ZERO, ZERO, r2
1633 or r2, ZERO, r4
1634 movi -(EFAULT), r2 /* r2 = reply, no real fixup */
1639 or ZERO, ZERO, r2
1648 or r2, ZERO, r4
1649 movi -(EFAULT), r2 /* r2 = reply, no real fixup */
1654 or ZERO, ZERO, r2
1664 * (r2) kernel pointer to value
1668 * (r2) -EFAULT (faulting)
1673 ld.b r2, 0, r4 /* r4 = data */
1674 movi -(EFAULT), r2 /* r2 = reply, no real fixup */
1678 or ZERO, ZERO, r2
1687 ld.w r2, 0, r4 /* r4 = data */
1688 movi -(EFAULT), r2 /* r2 = reply, no real fixup */
1692 or ZERO, ZERO, r2
1701 ld.l r2, 0, r4 /* r4 = data */
1702 movi -(EFAULT), r2 /* r2 = reply, no real fixup */
1706 or ZERO, ZERO, r2
1715 ld.q r2, 0, r4 /* r4 = data */
1716 movi -(EFAULT), r2 /* r2 = reply, no real fixup */
1720 or ZERO, ZERO, r2
1745 st.q r0, 0x010, r2
1827 getcon ssr, r2
1842 st.q r0, 0x248, r2
1856 getcon SPC,r2
|
| /linux-4.1.27/arch/arc/mm/ |
| H A D | tlbex.S | 99 st_s r2, [r0, 8]
114 ld_s r2, [r0, 8]
120 ld_s r2, [r0, 8]
148 and r2, r0, 0xFF ; MMU PID bits only for comparison
149 breq r1, r2, 5f
153 lr r2, [erstatus]
154 bbit0 r2, STATUS_U_BIT, 5f
161 mov r2, 1
177 ; OUT: r0 = PTE faulted on, r1 = ptr to PTE, r2 = Faulting V-address
180 lr r2, [efa]
190 lsr r0, r2, PGDIR_SHIFT ; Bits for indexing into PGD
202 lsr r0, r2, (PAGE_SHIFT - 2)
223 lsl r2, r3, 3 ; r w x 0 0 0 (GLOBAL, kernel only)
225 or.z r2, r2, r3 ; r w x r w x (!GLOBAL, user page)
228 or r3, r3, r2
232 and r2, r0, PTE_BITS_IN_PD0 ; Extract other PTE flags: (V)alid, (G)lb
236 or r3, r3, r2 ; S | vaddr | {sasid|asid}
274 ; Get the PTE corresponding to V-addr accessed, r2 is setup with EFA
279 cmp_s r2, VMALLOC_START
280 mov_s r2, (_PAGE_PRESENT | _PAGE_EXECUTE)
281 or.hs r2, r2, _PAGE_GLOBAL
283 and r3, r0, r2 ; Mask out NON Flag bits from PTE
284 xor.f r3, r3, r2 ; check ( ( pte & flags_test ) == flags_test )
314 ; If PTE exists, it will setup, r0 = PTE, r1 = Ptr to PTE, r2 = EFA
320 cmp_s r2, VMALLOC_START
321 mov_s r2, _PAGE_PRESENT ; common bit for K/U PTE
322 or.hs r2, r2, _PAGE_GLOBAL ; kernel PTE only
331 or.nz r2, r2, _PAGE_READ ; chk for Read flag in PTE
333 or.nz r2, r2, _PAGE_WRITE ; chk for Write flag in PTE
336 ; By now, r2 setup with all the Flags we need to check in PTE
337 and r3, r0, r2 ; Mask out NON Flag bits from PTE
338 brne.d r3, r2, do_slow_path_pf ; is ((pte & flags_test) == flags_test)
|
| /linux-4.1.27/arch/blackfin/kernel/ |
| H A D | ftrace-entry.S | 37 [--sp] = r2;
66 r2 = [sp++]; define
78 [--sp] = r2;
86 r2.l = _ftrace_stub;
87 r2.h = _ftrace_stub;
88 cc = r2 == r3;
98 cc = r2 == r3;
106 r2.l = _ftrace_graph_entry_stub;
107 r2.h = _ftrace_graph_entry_stub;
109 cc = r2 == r3;
113 r2 = [sp++]; define
143 r2 = [sp++]; define
173 r2 = fp; /* unsigned long frame_pointer */ define
|
| /linux-4.1.27/firmware/av7110/ |
| H A D | Boot.S | 62 ldr r2, flag_address
68 cmp r1, r2
79 ldrh r2, [r4,#2] // get segment length
80 add r2, r2, #63 // round length to next 64 bytes
81 movs r2, r2, lsr #6 // and divide by 64
91 subs r2, r2, #1
|
| /linux-4.1.27/arch/powerpc/kernel/ |
| H A D | head_32.S | 493 * r2: ptr to linux-style pte
500 mfspr r2,SPRN_SPRG_THREAD
502 lwz r2,PGDIR(r2)
504 mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
505 rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
506 lis r2,swapper_pg_dir@ha /* if kernel address, use */
507 addi r2,r2,swapper_pg_dir@l /* kernel page table */
508 112: tophys(r2,r2)
509 rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
510 lwz r2,0(r2) /* get pmd entry */
511 rlwinm. r2,r2,0,0,19 /* extract address of pte page */
513 rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */
514 lwz r0,0(r2) /* get linux-style pte */
522 stw r0,0(r2) /* update PTE (accessed bit) */
525 rlwinm r2,r0,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */
526 and r1,r1,r2 /* writable if _RW and _DIRTY */
545 andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */
546 or r2,r2,r1
547 mtspr SPRN_SRR1,r2
549 rlwinm. r2,r2,0,31,31 /* Check for little endian access */
550 rlwimi r2,r2,1,30,30 /* change 1 -> 3 */
551 xor r1,r1,r2
567 * r2: ptr to linux-style pte
574 mfspr r2,SPRN_SPRG_THREAD
576 lwz r2,PGDIR(r2)
578 mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
579 rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
580 lis r2,swapper_pg_dir@ha /* if kernel address, use */
581 addi r2,r2,swapper_pg_dir@l /* kernel page table */
582 112: tophys(r2,r2)
583 rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
584 lwz r2,0(r2) /* get pmd entry */
585 rlwinm. r2,r2,0,0,19 /* extract address of pte page */
587 rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */
588 lwz r0,0(r2) /* get linux-style pte */
596 stw r0,0(r2) /* update PTE (accessed bit) */
599 rlwinm r2,r0,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */
600 and r1,r1,r2 /* writable if _RW and _DIRTY */
609 mfspr r2,SPRN_SRR1 /* Need to restore CR0 */
610 mtcrf 0x80,r2
614 rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */
615 slw r0,r0,r2
617 srw r0,r1,r2
619 mfspr r2,SPRN_SRR1
620 rlwimi r2,r0,31-14,14,14
621 mtspr SPRN_SRR1,r2
630 andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */
631 mtspr SPRN_SRR1,r2
633 rlwinm. r2,r2,0,31,31 /* Check for little endian access */
651 * r2: ptr to linux-style pte
658 mfspr r2,SPRN_SPRG_THREAD
660 lwz r2,PGDIR(r2)
662 mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
663 rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
664 lis r2,swapper_pg_dir@ha /* if kernel address, use */
665 addi r2,r2,swapper_pg_dir@l /* kernel page table */
666 112: tophys(r2,r2)
667 rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
668 lwz r2,0(r2) /* get pmd entry */
669 rlwinm. r2,r2,0,0,19 /* extract address of pte page */
671 rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */
672 lwz r0,0(r2) /* get linux-style pte */
680 stw r0,0(r2) /* update PTE (accessed/dirty bits) */
689 mfspr r2,SPRN_SRR1 /* Need to restore CR0 */
690 mtcrf 0x80,r2
694 rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */
695 slw r0,r0,r2
697 srw r0,r1,r2
699 mfspr r2,SPRN_SRR1
700 rlwimi r2,r0,31-14,14,14
701 mtspr SPRN_SRR1,r2
850 tophys(r2,r1)
851 lwz r2,TI_TASK(r2)
863 tophys(r4,r2)
946 lis r2,init_task@h
947 ori r2,r2,init_task@l
950 tophys(r4,r2)
|
| H A D | swsusp_asm64.S | 88 ld r11,swsusp_save_area_ptr@toc(r2)
93 SAVE_REGISTER(r2)
135 ld r11,swsusp_save_area_ptr@toc(r2)
149 ld r12,restore_pblist_ptr@toc(r2)
191 ld r11,swsusp_save_area_ptr@toc(r2)
199 srdi r2, r1, 32
204 mttbu r2
210 RESTORE_REGISTER(r2)
269 ld r11,swsusp_save_area_ptr@toc(r2)
|
| H A D | module_64.c | 36 a separate r2 value in the init and core section, and stub between
72 * of function and try to derive r2 from it). */ local_entry_offset()
101 jump, actually, to reset r2 (TOC+0x8000). */
117 * For ELFv1 we need to use this to set up the new r2 value (aka TOC
119 * new r2, but for both we need to save the old r2.
121 * We could simply patch the new r2 value and function pointer into
124 * to the TOC ptr, r2) into the stub.
128 0x3d620000, /* addis r11,r2, <high> */
130 /* Save current r2 value in magic place on the stack. */
131 0xf8410000|R2_STACK_OFFSET, /* std r2,R2_STACK_OFFSET(r1) */
134 /* Set up new r2 from function descriptor */
135 0xe84b0028, /* ld r2,40(r11) */
395 /* If we don't have a .toc, just use .stubs. We need to set r2 module_frob_arch_sections()
407 /* r2 is the TOC pointer: it actually points 0x8000 into the TOC (this
422 /* Patch stub to reference function and correct r2 value. */ create_stub()
432 /* Stub uses address relative to r2. */ create_stub()
448 stub to set up the TOC ptr (r2) for the function. */ stub_for_addr()
474 restore r2. */ restore_r2()
482 /* ld r2,R2_STACK_OFFSET(r1) */ restore_r2()
632 * Marker reloc indicates we don't have to save r2. apply_relocate_add()
648 * ld r2, ...(r12) apply_relocate_add()
649 * add r2, r2, r12 apply_relocate_add()
658 * addis r2, r12, (.TOC.-func)@ha apply_relocate_add()
659 * addi r2, r12, (.TOC.-func)@l apply_relocate_add()
|
| /linux-4.1.27/security/selinux/ss/ |
| H A D | mls_types.h | 47 #define mls_range_contains(r1, r2) \
48 (mls_level_dom(&(r2).level[0], &(r1).level[0]) && \
49 mls_level_dom(&(r1).level[1], &(r2).level[1]))
|
| /linux-4.1.27/arch/sh/boot/compressed/ |
| H A D | head_32.S | 20 mov.l 1f, r2
21 cmp/eq r2, r0
23 sub r0, r2
29 sub r2, r1
67 mov.l bss_start_addr, r2
71 cmp/eq r1,r2
|
| /linux-4.1.27/arch/nios2/include/asm/ |
| H A D | syscall.h | 25 return regs->r2; syscall_get_nr()
31 regs->r2 = regs->orig_r2; syscall_rollback()
38 return regs->r7 ? regs->r2 : 0; syscall_get_error()
44 return regs->r2; syscall_get_return_value()
52 regs->r2 = -error; syscall_set_return_value()
55 regs->r2 = val; syscall_set_return_value()
|
| /linux-4.1.27/kernel/bpf/ |
| H A D | helpers.c | 26 static u64 bpf_map_lookup_elem(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5) bpf_map_lookup_elem() argument
33 void *key = (void *) (unsigned long) r2; bpf_map_lookup_elem()
54 static u64 bpf_map_update_elem(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5) bpf_map_update_elem() argument
57 void *key = (void *) (unsigned long) r2; bpf_map_update_elem()
75 static u64 bpf_map_delete_elem(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5) bpf_map_delete_elem() argument
78 void *key = (void *) (unsigned long) r2; bpf_map_delete_elem()
93 static u64 bpf_get_prandom_u32(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5) bpf_get_prandom_u32() argument
104 static u64 bpf_get_smp_processor_id(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5) bpf_get_smp_processor_id() argument
|
| /linux-4.1.27/arch/powerpc/include/asm/ |
| H A D | current.h | 33 * We keep `current' in r2 for speed.
35 register struct task_struct *current asm ("r2");
|
| H A D | code-patching.h | 64 * addis r2,r12,XXXX ppc_function_entry()
65 * addi r2,r2,XXXX ppc_function_entry()
69 * lis r2,XXXX ppc_function_entry()
70 * addi r2,r2,XXXX ppc_function_entry()
|
| H A D | kgdb.h | 31 asm(".long 0x7d821008"); /* twge r2, r2 */ arch_kgdb_breakpoint()
|
| /linux-4.1.27/arch/ia64/kernel/ |
| H A D | mca_asm.S | 62 GET_THIS_PADDR(r2, ia64_cpu_info) // load phys addr of cpu_info into r2
64 addl r17=O(PTCE_STRIDE),r2
65 addl r2=O(PTCE_BASE),r2
67 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
68 ld4 r19=[r2],4 // r19=ptce_count[0]
71 ld4 r20=[r2] // r20=ptce_count[1]
110 GET_THIS_PADDR(r2, ia64_mca_pal_base)
112 ld8 r16=[r2]
142 LOAD_PHYSICAL(p0,r2,1f) // return address
147 GET_IA64_MCA_DATA(r2)
150 add r3=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET+SOS(PROC_STATE_PARAM), r2
189 GET_THIS_PADDR(r2, ia64_mca_pal_pte)
191 ld8 r18=[r2] // load PAL PTE
193 GET_THIS_PADDR(r2, ia64_mca_pal_base)
195 ld8 r16=[r2] // load PAL vaddr
223 GET_THIS_PADDR(r2, ia64_mca_tr_reload)
228 st8 [r2] =r18
235 LOAD_PHYSICAL(p0,r2,1f) // return address
241 LOAD_PHYSICAL(p0,r2,1f) // return address
246 GET_IA64_MCA_DATA(r2)
248 mov r7=r2
251 VIRTUAL_MODE_ENTER(r2, r3, ia64_os_mca_virtual_begin, r4)
253 // This code returns to SAL via SOS r2, in general SAL has no unwind
263 mov r2=r7 // see GET_IA64_MCA_DATA above
269 DATA_PA_TO_VA(r2,r7)
271 add out0=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_PT_REGS_OFFSET, r2
272 add out1=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SWITCH_STACK_OFFSET, r2
273 add out2=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET, r2
277 PHYSICAL_MODE_ENTER(r2, r3, ia64_os_mca_virtual_end, r4)
285 LOAD_PHYSICAL(p0,r2,1f) // return address
290 LOAD_PHYSICAL(p0,r2,1f) // return address
338 LOAD_PHYSICAL(p0,r2,1f) // return address
344 LOAD_PHYSICAL(p0,r2,1f) // return address
350 LOAD_PHYSICAL(p0,r2,1f) // return address
355 GET_IA64_MCA_DATA(r2)
357 mov r7=r2
360 VIRTUAL_MODE_ENTER(r2, r3, ia64_os_init_virtual_begin, r4)
362 // This code returns to SAL via SOS r2, in general SAL has no unwind
372 mov r2=r7 // see GET_IA64_MCA_DATA above
378 DATA_PA_TO_VA(r2,r7)
380 add out0=IA64_MCA_CPU_INIT_STACK_OFFSET+MCA_PT_REGS_OFFSET, r2
381 add out1=IA64_MCA_CPU_INIT_STACK_OFFSET+MCA_SWITCH_STACK_OFFSET, r2
382 add out2=IA64_MCA_CPU_INIT_STACK_OFFSET+MCA_SOS_OFFSET, r2
386 PHYSICAL_MODE_ENTER(r2, r3, ia64_os_init_virtual_end, r4)
392 LOAD_PHYSICAL(p0,r2,1f) // return address
399 LOAD_PHYSICAL(p0,r2,1f) // return address
411 #define temp1 r2 /* careful, it overlaps with input registers */
426 // r2 contains the return address, r3 contains either
458 mov b0=r2 // save return address
626 add r2=32*2,r17
635 fc r2
643 add r2=32*8,r2
652 fc r2
660 add r2=32*8,r2
669 fc r2
677 add r2=32*8,r2
686 fc r2
707 // r2 contains the return address, r3 contains either
719 mov b0=r2 // save return address
905 // r2 contains the return address, r3 contains either
918 mov b0=r2 // save return address
952 // r2 contains the return address, r3 contains either
971 mov b0=r2 // save return address
1014 // r2 contains the return address, r3 contains either
1021 mov b0=r2 // save return address
|
| H A D | minstate.h | 33 * r2 = points to &pt_regs.r16
140 .mem.offset 0,0; st8.spill [r16]=r2,16; \
143 adds r2=IA64_PT_REGS_R16_OFFSET,r1; \
157 * r2: points to &pt_regs.r16
167 .mem.offset 0,0; st8.spill [r2]=r16,16; \
170 .mem.offset 0,0; st8.spill [r2]=r18,16; \
173 .mem.offset 0,0; st8.spill [r2]=r20,16; \
177 .mem.offset 0,0; st8.spill [r2]=r22,16; \
181 .mem.offset 0,0; st8.spill [r2]=r24,16; \
184 .mem.offset 0,0; st8.spill [r2]=r26,16; \
187 .mem.offset 0,0; st8.spill [r2]=r28,16; \
190 .mem.offset 0,0; st8.spill [r2]=r30,16; \
194 st8 [r2]=r8,8; /* ar.ccv */ \
197 stf.spill [r2]=f6,32; \
200 stf.spill [r2]=f8,32; \
203 stf.spill [r2]=f10; \
|
| H A D | relocate_kernel.S | 28 mov r2=ip
36 dep r2=0,r2,61,3 //to physical address
39 add r3=1f-.reloc_entry, r2
43 add sp=(memory_stack_end - 16 - .reloc_entry),r2
44 add r8=(register_stack - .reloc_entry),r2
64 GET_THIS_PADDR(r2, ia64_cpu_info) // load phys addr of cpu_info into r2
66 addl r17=O(PTCE_STRIDE),r2
67 addl r2=O(PTCE_BASE),r2
69 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
70 ld4 r19=[r2],4 // r19=ptce_count[0]
73 ld4 r20=[r2] // r20=ptce_count[1]
215 st8 [in0]=r2, 8 // r2
|
| H A D | entry.S | 114 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
123 (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
145 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
154 (p6) st8 [r2]=in4 // store TLS in r13 (tp)
251 adds r2=16+128,sp
258 lfetch.fault.excl.nt1 [r2],128
261 lfetch.fault.excl [r2]
265 add r2=16+3*128,sp
273 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
276 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
282 add r2=SW(F2)+16,sp // r2 = &sw->f2
288 stf.spill [r2]=f2,32
300 stf.spill [r2]=f4,32
312 stf.spill [r2]=f12,32
317 stf.spill [r2]=f14,32
322 stf.spill [r2]=f16,32
325 stf.spill [r2]=f18,32
328 stf.spill [r2]=f20,32
331 stf.spill [r2]=f22,32
334 stf.spill [r2]=f24,32
337 stf.spill [r2]=f26,32
340 stf.spill [r2]=f28,32
343 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
347 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
351 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
354 st8 [r2]=r20 // save ar.bspstore
372 adds r2=SW(AR_BSPSTORE)+16,sp
378 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
381 ld8 r21=[r2],16 // restore b0
384 ld8 r23=[r2],16 // restore b2
387 ld8 r25=[r2],16 // restore b4
390 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
393 ld8 r28=[r2] // restore pr
508 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
543 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
549 .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
558 ld8 r3=[r2] // load pt_regs.r8
562 adds r3=16,r2 // r3=&pt_regs.r10
624 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
626 ld4 r2=[r2]
629 and r2=_TIF_SYSCALL_TRACEAUDIT,r2
631 cmp.ne p6,p0=r2,r0
639 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
660 * r2: cleared
711 RSM_PSR_I(p0, r2, r18) // disable interrupts
721 RSM_PSR_I(pUStk, r2, r18)
728 adds r2=PT(LOADRS)+16,r12
733 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
737 adds r2=PT(LOADRS)+16,r12
742 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
747 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
755 ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
763 ld8 r29=[r2],16 // M0|1 load cr.ipsr
768 ld8 r30=[r2],16 // M0|1 load cr.ifs
775 ld8 r30=[r2],16 // M0|1 load cr.ifs
780 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
784 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
788 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
792 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
804 ld8.fill r12=[r2] // M0|1 restore r12 (sp)
877 adds r2=PT(B6)+16,r12
881 ld8 r28=[r2],8 // load b6
892 ld8 r29=[r2],16 // load b7
896 ld8 r31=[r2],16 // load ar.ssd
899 ld8.fill r9=[r2],16
902 ld8.fill r11=[r2],PT(R18)-PT(R11)
905 ld8.fill r18=[r2],16
908 ld8.fill r20=[r2],16
916 ld8.fill r22=[r2],24
920 ld8.fill r25=[r2],16
924 ld8.fill r27=[r2],16
927 ld8.fill r29=[r2],16
930 ld8.fill r31=[r2],PT(F9)-PT(R31)
933 ldf.fill f9=[r2],PT(F6)-PT(F9)
936 ldf.fill f6=[r2],PT(F7)-PT(F6)
938 ldf.fill f7=[r2],PT(F11)-PT(F7)
944 ldf.fill f11=[r2]
945 BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...)
997 ld8.fill r2=[r17]
1147 (pLvSys)mov r2=r0
1164 add r2=-8,r2
1167 st8 [r2]=r8
1185 adds r2=PT(R8)+16,r12
1188 ld8 r8=[r2]
1202 ld8 r3=[r2] // load pt_regs.r8
1267 alloc r2=ar.pfs,8,0,1,0
1413 movl r2 = ftrace_stub
1417 cmp.eq p7,p0 = r2, r3
1445 movl r2 = _mcount_ret_helper
1447 mov b6 = r2
|
| H A D | fsys.S | 153 // r2,r3 = temp r4-r7 preserved
193 add r2 = TI_FLAGS+IA64_TASK_SIZE,r16
198 ld4 r2 = [r2] // process work pending flags
204 and r2 = TIF_ALLWORK_MASK,r2
209 cmp.ne p6, p0 = 0, r2 // Fallback if work is scheduled
220 ld4 r2 = [r29] // itc_jitter value
229 (p8) cmp.ne p13,p0 = r2,r0 // need itc_jitter compensation, set p13
235 MOV_FROM_ITC(p8, p6, r2, r10) // CPU_TIMER. 36 clocks latency!!!
236 (p9) ld8 r2 = [r30] // MMIO_TIMER. Could also have latency issues..
241 (p13) sub r3 = r25,r2 // Diff needed before comparison (thanks davidm)
244 sub r10 = r2,r24 // current_cycle - last_cycle
249 (p7) cmpxchg8.rel r3 = [r19],r2,ar.ccv
264 getf.sig r2 = f8
268 shr.u r2 = r2,r23 // shift by factor
270 add r8 = r8,r2 // Add xtime.nsecs
276 movl r2 = 1000000000
282 cmp.ge p6,p0 = r8,r2
286 (p6) sub r8 = r8,r2
297 (p14) getf.sig r2 = f8
300 (p14) shr.u r21 = r2, 4
336 add r2=TI_FLAGS+IA64_TASK_SIZE,r16
341 ld4 r2=[r2] // M r2 = thread_info->flags
358 and r2 = TIF_ALLWORK_MASK,r2
360 cmp.ne p8,p0=0,r2
371 and r2 = TIF_ALLWORK_MASK,r2
373 cmp.ne p8,p0=0,r2
472 mov r2=r16 // A get task addr to addl-addressable register
477 addl r22=IA64_RBS_OFFSET,r2 // A compute base of RBS
478 add r3=TI_FLAGS+IA64_TASK_SIZE,r2 // A
505 addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r2 // A compute base of memory stack
513 add r16=TI_AC_STAMP+IA64_TASK_SIZE,r2
514 add r17=TI_AC_LEAVE+IA64_TASK_SIZE,r2
|
| /linux-4.1.27/arch/cris/arch-v32/mm/ |
| H A D | mmu.S | 99 movem $r2, [$sp]
108 move.d [$r1], $r2 ; Get last_refill_cause
109 cmp.d $r0, $r2 ; rw_mm_cause == last_refill_cause ?
111 moveq 1, $r2
114 move.d $r2, [$acr] ; refill_count = 1
133 movem [$sp], $r2 ; Restore r0-r2 in delay slot
145 moveq 1, $r2
147 move.d $r2, [$acr] ; refill_count = 1
153 move.d [$acr], $r2 ; Get refill_count
154 cmpq 4, $r2 ; refill_count > 4 ?
156 addq 1, $r2 ; refill_count++
158 move.d $r2, [$acr]
165 movem [$sp], $r2 ; Restore r0-r2
178 movem [$sp], $r2 ; Restore r0-r2
|
| /linux-4.1.27/arch/arm/mach-prima2/ |
| H A D | sleep.S | 43 ldr r2, [r5, #DENALI_CTL_22_OFF]
44 orr r2, r2, #0x1
49 str r2, [r5, #DENALI_CTL_22_OFF]
|
| /linux-4.1.27/arch/arm/mach-shmobile/ |
| H A D | headsmp-scu.S | 33 ldr r2, [r0, #8] @ SCU Power Status Register
36 bic r2, r2, r3 @ Clear bits of our CPU (Run Mode)
37 str r2, [r0, #8] @ write back
|
| /linux-4.1.27/tools/perf/arch/s390/util/ |
| H A D | dwarf-regs.c | 15 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
|
| /linux-4.1.27/arch/unicore32/lib/ |
| H A D | backtrace.S | 65 1003: ldw r2, [sv_pc+], #-4 @ if stmfd sp, {args} exists,
67 cxor.a r3, r2 >> #14 @ instruction
75 mov r2, frame
137 mov r2, reg
138 csub.a r2, #8
140 sub r2, r2, #3
144 add r2, r2, #0x10 @ so r2 need add 16
|
| /linux-4.1.27/arch/avr32/kernel/ |
| H A D | entry-avr32b.S | 107 lsr r2, r0, PGDIR_SHIFT
108 ld.w r3, r1[r2 << 2]
114 ld.w r2, r3[r1 << 2]
116 bld r2, _PAGE_BIT_PRESENT
120 sbr r2, _PAGE_BIT_ACCESSED
121 st.w r3[r1 << 2], r2
124 andl r2, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
125 mtsr SYSREG_TLBELO, r2
129 clz r2, r0
132 mov r2, 0 /* so start at 0 */
135 1: bfins r1, r2, SYSREG_DRP_OFFSET, SYSREG_DRP_SIZE
173 ld.w r3, r1[r2 << 2]
177 st.w r1[r2 << 2], r3
261 mov lr, r2 /* syscall_return */
286 2: mov r2, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
287 tst r1, r2
384 ld.w r2, r1[TSK_active_mm]
385 ld.w r3, r2[MM_pgd]
393 mfsr r2, SYSREG_RAR_EX
492 lsr r2, r1, PGDIR_SHIFT
493 ld.w r0, r0[r2 << 2]
500 add r2, r0, r1 << 2
501 ld.w r3, r2[0]
504 st.w r2[0], r3
550 ld.w r2, r0[TI_preempt_count]
551 cp.w r2, 0
593 1: mov r2, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
594 tst r1, r2
628 lddsp r2, sp[REG_SR]
629 bfextu r3, r2, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE
634 mov r2, _TIF_DBGWORK_MASK
635 tst r1, r2
685 mfsr r2, SYSREG_SR
686 mov r1, r2
687 bfins r2, r3, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE
688 mtsr SYSREG_SR, r2
804 ld.w r2, r0[TI_preempt_count]
805 cp.w r2, 0
|
| H A D | switch_to.S | 21 stm --r11, r0,r1,r2,r3,r4,r5,r6,r7,sp,lr
34 ldm r10++, r0,r1,r2,r3,r4,r5,r6,r7,sp,pc
|
| /linux-4.1.27/arch/tile/kernel/ |
| H A D | mcount_64.S | 38 { st r29, r2; addli r29, r29, REGSIZE }
53 { ld r2, r29; addli r29, r29, REGSIZE }
86 { move r0, lr; moveli r2, hw2_last(function_trace_op) }
87 { move r1, r10; shl16insli r2, r2, hw1(function_trace_op) }
88 { movei r3, 0; shl16insli r2, r2, hw0(function_trace_op) }
89 ld r2,r2
|
| H A D | entry.S | 31 { move r2, lr; lnk r1 }
38 { move r2, lr; lnk r1 }
62 IRQ_ENABLE_LOAD(r2, r3)
64 IRQ_ENABLE_APPLY(r2, r3) /* unmask, but still with ICS set */
|
| /linux-4.1.27/arch/arm/probes/kprobes/ |
| H A D | test-arm.c | 63 TEST_RR( op "cs" s " r2, r",3, VAL1,", r",2, val, ", lsr #4") \ kprobe_arm_test_cases()
112 TEST_R( op "cs" s " r2, r",3, val, ", lsr #4") \ kprobe_arm_test_cases()
162 TEST_UNSUPPORTED(__inst_arm(0xe151021f) " @ cmp r1, pc, lsl r2") kprobe_arm_test_cases()
163 TEST_UNSUPPORTED(__inst_arm(0xe17f0211) " @ cmn pc, r1, lsl r2") kprobe_arm_test_cases()
164 TEST_UNSUPPORTED(__inst_arm(0xe1a0121f) " @ mov r1, pc, lsl r2") kprobe_arm_test_cases()
165 TEST_UNSUPPORTED(__inst_arm(0xe1a0f211) " @ mov pc, r1, lsl r2") kprobe_arm_test_cases()
166 TEST_UNSUPPORTED(__inst_arm(0xe042131f) " @ sub r1, r2, pc, lsl r3") kprobe_arm_test_cases()
167 TEST_UNSUPPORTED(__inst_arm(0xe1cf1312) " @ bic r1, pc, r2, lsl r3") kprobe_arm_test_cases()
168 TEST_UNSUPPORTED(__inst_arm(0xe081f312) " @ add pc, r1, r2, lsl r3") kprobe_arm_test_cases()
172 TEST_UNSUPPORTED("movs pc, r1, lsl r2") kprobe_arm_test_cases()
175 TEST_UNSUPPORTED("adds pc, lr, r1, lsl r2") kprobe_arm_test_cases()
258 TEST_UNSUPPORTED(__inst_arm(0xe16f2050) " @ qdsub r2, r0, pc") kprobe_arm_test_cases()
259 TEST_UNSUPPORTED(__inst_arm(0xe161205f) " @ qdsub r2, pc, r1") kprobe_arm_test_cases()
271 TEST_UNSUPPORTED(__inst_arm(0xe10f3281) " @ smlabb pc, r1, r2, r3") kprobe_arm_test_cases()
275 TEST_UNSUPPORTED(__inst_arm(0xe10f32a1) " @ smlatb pc, r1, r2, r3") kprobe_arm_test_cases()
279 TEST_UNSUPPORTED(__inst_arm(0xe10f32c1) " @ smlabt pc, r1, r2, r3") kprobe_arm_test_cases()
283 TEST_UNSUPPORTED(__inst_arm(0xe10f32e1) " @ smlatt pc, r1, r2, r3") kprobe_arm_test_cases()
288 TEST_UNSUPPORTED(__inst_arm(0xe12f3281) " @ smlawb pc, r1, r2, r3") kprobe_arm_test_cases()
292 TEST_UNSUPPORTED(__inst_arm(0xe12f32c1) " @ smlawt pc, r1, r2, r3") kprobe_arm_test_cases()
293 TEST_UNSUPPORTED(__inst_arm(0xe12032cf) " @ smlawt r0, pc, r2, r3") kprobe_arm_test_cases()
295 TEST_UNSUPPORTED(__inst_arm(0xe120f2c1) " @ smlawt r0, r1, r2, pc") kprobe_arm_test_cases()
300 TEST_UNSUPPORTED(__inst_arm(0xe12f02a1) " @ smulwb pc, r1, r2") kprobe_arm_test_cases()
304 TEST_UNSUPPORTED(__inst_arm(0xe12f02e1) " @ smulwt pc, r1, r2") kprobe_arm_test_cases()
309 TEST_UNSUPPORTED(__inst_arm(0xe14f1382) " @ smlalbb pc, r1, r2, r3") kprobe_arm_test_cases()
310 TEST_UNSUPPORTED(__inst_arm(0xe141f382) " @ smlalbb r1, pc, r2, r3") kprobe_arm_test_cases()
314 TEST_UNSUPPORTED(__inst_arm(0xe14f13a2) " @ smlaltb pc, r1, r2, r3") kprobe_arm_test_cases()
315 TEST_UNSUPPORTED(__inst_arm(0xe141f3a2) " @ smlaltb r1, pc, r2, r3") kprobe_arm_test_cases()
319 TEST_UNSUPPORTED(__inst_arm(0xe14f13c2) " @ smlalbt pc, r1, r2, r3") kprobe_arm_test_cases()
320 TEST_UNSUPPORTED(__inst_arm(0xe141f3c2) " @ smlalbt r1, pc, r2, r3") kprobe_arm_test_cases()
324 TEST_UNSUPPORTED(__inst_arm(0xe14f13e2) " @ smlalbb pc, r1, r2, r3") kprobe_arm_test_cases()
325 TEST_UNSUPPORTED(__inst_arm(0xe140f3e2) " @ smlalbb r0, pc, r2, r3") kprobe_arm_test_cases()
327 TEST_UNSUPPORTED(__inst_arm(0xe1401fe2) " @ smlalbb r0, r1, r2, pc") kprobe_arm_test_cases()
332 TEST_UNSUPPORTED(__inst_arm(0xe16f0281) " @ smulbb pc, r1, r2") kprobe_arm_test_cases()
336 TEST_UNSUPPORTED(__inst_arm(0xe16f02a1) " @ smultb pc, r1, r2") kprobe_arm_test_cases()
340 TEST_UNSUPPORTED(__inst_arm(0xe16f02c1) " @ smultb pc, r1, r2") kprobe_arm_test_cases()
344 TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2") kprobe_arm_test_cases()
345 TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2") kprobe_arm_test_cases()
354 TEST_UNSUPPORTED(__inst_arm(0xe00f0291) " @ mul pc, r1, r2") kprobe_arm_test_cases()
355 TEST_UNSUPPORTED(__inst_arm(0xe000029f) " @ mul r0, pc, r2") kprobe_arm_test_cases()
360 TEST_UNSUPPORTED(__inst_arm(0xe01f0291) " @ muls pc, r1, r2") kprobe_arm_test_cases()
365 TEST_UNSUPPORTED(__inst_arm(0xe02f3291) " @ mla pc, r1, r2, r3") kprobe_arm_test_cases()
369 TEST_UNSUPPORTED(__inst_arm(0xe03f3291) " @ mlas pc, r1, r2, r3") kprobe_arm_test_cases()
375 TEST_UNSUPPORTED(__inst_arm(0xe041f392) " @ umaal pc, r1, r2, r3") kprobe_arm_test_cases()
376 TEST_UNSUPPORTED(__inst_arm(0xe04f0392) " @ umaal r0, pc, r2, r3") kprobe_arm_test_cases()
385 TEST_UNSUPPORTED(__inst_arm(0xe06f3291) " @ mls pc, r1, r2, r3") kprobe_arm_test_cases()
386 TEST_UNSUPPORTED(__inst_arm(0xe060329f) " @ mls r0, pc, r2, r3") kprobe_arm_test_cases()
388 TEST_UNSUPPORTED(__inst_arm(0xe060f291) " @ mls r0, r1, r2, pc") kprobe_arm_test_cases()
397 TEST_UNSUPPORTED(__inst_arm(0xe081f392) " @ umull pc, r1, r2, r3") kprobe_arm_test_cases()
398 TEST_UNSUPPORTED(__inst_arm(0xe08f1392) " @ umull r1, pc, r2, r3") kprobe_arm_test_cases()
402 TEST_UNSUPPORTED(__inst_arm(0xe091f392) " @ umulls pc, r1, r2, r3") kprobe_arm_test_cases()
403 TEST_UNSUPPORTED(__inst_arm(0xe09f1392) " @ umulls r1, pc, r2, r3") kprobe_arm_test_cases()
408 TEST_UNSUPPORTED(__inst_arm(0xe0af1392) " @ umlal pc, r1, r2, r3") kprobe_arm_test_cases()
409 TEST_UNSUPPORTED(__inst_arm(0xe0a1f392) " @ umlal r1, pc, r2, r3") kprobe_arm_test_cases()
413 TEST_UNSUPPORTED(__inst_arm(0xe0bf1392) " @ umlals pc, r1, r2, r3") kprobe_arm_test_cases()
414 TEST_UNSUPPORTED(__inst_arm(0xe0b1f392) " @ umlals r1, pc, r2, r3") kprobe_arm_test_cases()
419 TEST_UNSUPPORTED(__inst_arm(0xe0c1f392) " @ smull pc, r1, r2, r3") kprobe_arm_test_cases()
420 TEST_UNSUPPORTED(__inst_arm(0xe0cf1392) " @ smull r1, pc, r2, r3") kprobe_arm_test_cases()
424 TEST_UNSUPPORTED(__inst_arm(0xe0d1f392) " @ smulls pc, r1, r2, r3") kprobe_arm_test_cases()
425 TEST_UNSUPPORTED(__inst_arm(0xe0df1392) " @ smulls r1, pc, r2, r3") kprobe_arm_test_cases()
430 TEST_UNSUPPORTED(__inst_arm(0xe0ef1392) " @ smlal pc, r1, r2, r3") kprobe_arm_test_cases()
431 TEST_UNSUPPORTED(__inst_arm(0xe0e1f392) " @ smlal r1, pc, r2, r3") kprobe_arm_test_cases()
435 TEST_UNSUPPORTED(__inst_arm(0xe0ff1392) " @ smlals pc, r1, r2, r3") kprobe_arm_test_cases()
436 TEST_UNSUPPORTED(__inst_arm(0xe0f0f392) " @ smlals r0, pc, r2, r3") kprobe_arm_test_cases()
438 TEST_UNSUPPORTED(__inst_arm(0xe0f01f92) " @ smlals r0, r1, r2, pc") kprobe_arm_test_cases()
451 TEST_UNSUPPORTED(__inst_arm(0xe102f091) " @ swp pc, r1, [r2]") kprobe_arm_test_cases()
452 TEST_UNSUPPORTED(__inst_arm(0xe102009f) " @ swp r0, pc, [r2]") kprobe_arm_test_cases()
461 TEST_UNSUPPORTED(__inst_arm(0xe142f091) " @ swpb pc, r1, [r2]") kprobe_arm_test_cases()
470 TEST_UNSUPPORTED("ldrex r2, [sp]") kprobe_arm_test_cases()
473 TEST_UNSUPPORTED("strexd r0, r2, r3, [sp]") kprobe_arm_test_cases()
474 TEST_UNSUPPORTED("ldrexd r2, r3, [sp]") kprobe_arm_test_cases()
475 TEST_UNSUPPORTED("strexb r0, r2, [sp]") kprobe_arm_test_cases()
476 TEST_UNSUPPORTED("ldrexb r2, [sp]") kprobe_arm_test_cases()
477 TEST_UNSUPPORTED("strexh r0, r2, [sp]") kprobe_arm_test_cases()
478 TEST_UNSUPPORTED("ldrexh r2, [sp]") kprobe_arm_test_cases()
498 TEST_PR( "ldrh r2, [r",3, 24,"], r",4, 48,"") kprobe_arm_test_cases()
520 TEST_P( "ldrh r2, [r",3, 24,"], #48") kprobe_arm_test_cases()
530 TEST_PR( "ldrsb r2, [r",3, 24,"], r",4, 48,"") kprobe_arm_test_cases()
539 TEST_P( "ldrsb r2, [r",3, 24,"], #48") kprobe_arm_test_cases()
549 TEST_PR( "ldrsh r2, [r",3, 24,"], r",4, 48,"") kprobe_arm_test_cases()
558 TEST_P( "ldrsh r2, [r",3, 24,"], #48") kprobe_arm_test_cases()
565 TEST_UNSUPPORTED("strht r1, [r2], r3") kprobe_arm_test_cases()
566 TEST_UNSUPPORTED("ldrht r1, [r2], r3") kprobe_arm_test_cases()
567 TEST_UNSUPPORTED("strht r1, [r2], #48") kprobe_arm_test_cases()
568 TEST_UNSUPPORTED("ldrht r1, [r2], #48") kprobe_arm_test_cases()
569 TEST_UNSUPPORTED("ldrsbt r1, [r2], r3") kprobe_arm_test_cases()
570 TEST_UNSUPPORTED("ldrsbt r1, [r2], #48") kprobe_arm_test_cases()
571 TEST_UNSUPPORTED("ldrsht r1, [r2], r3") kprobe_arm_test_cases()
572 TEST_UNSUPPORTED("ldrsht r1, [r2], #48") kprobe_arm_test_cases()
590 TEST_PR( "ldrd r2, [r",5, 24,"], r",4,48,"") kprobe_arm_test_cases()
612 TEST_P( "ldrd r2, [r",5, 24,"], #48") kprobe_arm_test_cases()
674 TEST_P( "ldr"byte" r2, [r",3, 24,"], #48") \ kprobe_arm_test_cases()
680 TEST_PR( "ldr"byte" r2, [r",3, 24,"], r",4, 48,"") \ kprobe_arm_test_cases()
691 TEST_UNSUPPORTED( "str pc, [sp, r2]") kprobe_arm_test_cases()
696 TEST_UNSUPPORTED( "str sp, [sp, r2]") kprobe_arm_test_cases()
719 TEST_UNSUPPORTED("ldrt r1, [r2], r3") kprobe_arm_test_cases()
720 TEST_UNSUPPORTED("strt r2, [r3], #4") kprobe_arm_test_cases()
1140 TEST_P( "stmdb r",13,16*4,"!, {r2-r12,lr}") kprobe_arm_test_cases()
1147 TEST_BF_P("ldmia r",13,4*4, "!, {r2-r12,pc}") kprobe_arm_test_cases()
|
| /linux-4.1.27/arch/cris/arch-v32/mach-fs/ |
| H A D | dram_init.S | 42 move.d CONFIG_ETRAX_SDRAM_COMMAND, $r2
77 move.d 10000, $r2
79 subq 1, $r2
82 lapc _sdram_commands_start, $r2
85 move.b [$r2+], $r6 ; Load command
92 cmp.d $r2, $r3 ; Last command?
|
| /linux-4.1.27/arch/blackfin/lib/ |
| H A D | divsi3.S | 50 r2 = r1 >> 15; define
51 cc = r2;
53 r2 = r1 << 16; define
54 cc = r2 <= r0;
139 r2 = r2 + r1; define
141 r0 = -r2;
142 if !cc r0 = r2;
|
| /linux-4.1.27/arch/avr32/boot/u-boot/ |
| H A D | head.S | 26 lddpc r2, bss_start_addr
30 1: st.d r2++, r0
31 cp r2, r3
|
| /linux-4.1.27/arch/arc/kernel/ |
| H A D | head.S | 59 ; Don't clobber r0-r2 yet. It might have bootloader provided info
87 ; r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2
89 ; r2 = pointer to uboot provided cmdline or external DTB in mem
92 st r2, [@uboot_arg]
|
| /linux-4.1.27/arch/ia64/include/asm/ |
| H A D | spinlock.h | 159 "fetchadd4.rel r2 = [%0], -1;;\n" arch_read_lock_flags()
163 "ld4 r2 = [%0];;\n" arch_read_lock_flags()
164 "cmp4.lt p7,p0 = r2, r0\n" arch_read_lock_flags()
169 "fetchadd4.acq r2 = [%0], 1;;\n" arch_read_lock_flags()
170 "cmp4.lt p7,p0 = r2, r0\n" arch_read_lock_flags()
173 : "p6", "p7", "r2", "memory"); arch_read_lock_flags()
215 "ld4 r2 = [%0];;\n" arch_write_lock_flags()
216 "cmp4.eq p0,p7 = r0, r2\n" arch_write_lock_flags()
221 "cmpxchg4.acq r2 = [%0], r29, ar.ccv;;\n" arch_write_lock_flags()
222 "cmp4.eq p0,p7 = r0, r2\n" arch_write_lock_flags()
225 : "ar.ccv", "p6", "p7", "r2", "r29", "memory"); arch_write_lock_flags()
|
| H A D | paravirt_privop.h | 185 * r2, r3
194 * r2, r3: scratch
211 "movl r2 = %[op_addr]\n"/* get function pointer address */ \
216 "ld8 r2 = [r2]\n" /* load function descriptor address */ \
222 "ld8 r3 = [r2], 8\n" /* load entry address */ \
228 "ld8 gp = [r2]\n" /* load gp value */ \
247 "r2", "r3", /*"r8",*/ "r9", "r10", "r11", "r14", \
251 "r2","r3", /*"r8",*/ "r9", "r10", "r11", "r14", \
255 "r2", "r3", /*"r8", "r9",*/ "r10", "r11", "r14", \
259 "r2", "r3", /*"r8", "r9", "r10", "r11", "r14",*/ \
|
| /linux-4.1.27/arch/x86/crypto/sha-mb/ |
| H A D | sha1_x8_avx2.S | 69 # TRANSPOSE8 r0, r1, r2, r3, r4, r5, r6, r7, t0, t1
71 # Input looks like: {r0 r1 r2 r3 r4 r5 r6 r7}
74 # r2 = {c7 c6 c5 c4 c3 c2 c1 c0}
81 # Output looks like: {r0 r1 r2 r3 r4 r5 r6 r7}
84 # r2 = {h2 g2 f2 e2 d2 c2 b2 a2}
92 .macro TRANSPOSE8 r0 r1 r2 r3 r4 r5 r6 r7 t0 t1
96 vshufps $0x44, \r3, \r2, \t1 # t1 = {d5 d4 c5 c4 d1 d0 c1 c0}
97 vshufps $0xEE, \r3, \r2, \r2 # r2 = {d7 d6 c7 c6 d3 d2 c3 c2}
99 vshufps $0x88, \r2, \r0, \r1 # r1 = {d6 c6 b6 a6 d2 c2 b2 a2}
100 vshufps $0xDD, \r2, \r0, \r0 # r0 = {d7 c7 b7 a7 d3 c3 b3 a3}
103 # use r2 in place of t0
105 vshufps $0x44, \r5, \r4, \r2 # r2 = {f5 f4 e5 e4 f1 f0 e1 e0}
109 vshufps $0xDD, \t1, \r2, \r7 # r7 = {h5 g5 f5 e5 h1 g1 f1 e1}
112 vshufps $0x88, \t1, \r2, \t1 # t1 = {h4 g4 f4 e4 h0 g0 f0 e0}
115 vperm2f128 $0x02, \r1, \r5, \r2 # h2...a2
|
| /linux-4.1.27/arch/sparc/include/asm/ |
| H A D | sfp-machine_32.h | 78 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \
82 : "=r" (r2), \
93 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \
97 : "=r" (r2), \
108 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
117 "addx %r2,%3,%%g1\n\t" \
130 r3 = _t1; r2 = _t2; \
133 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
142 "subx %r2,%3,%%g1\n\t" \
155 r3 = _t1; r2 = _t2; \
|
| /linux-4.1.27/drivers/ata/ |
| H A D | pata_hpt3x3.c | 40 u32 r1, r2; hpt3x3_set_piomode() local
44 pci_read_config_dword(pdev, 0x48, &r2); hpt3x3_set_piomode()
48 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */ hpt3x3_set_piomode()
51 pci_write_config_dword(pdev, 0x48, r2); hpt3x3_set_piomode()
70 u32 r1, r2; hpt3x3_set_dmamode() local
75 pci_read_config_dword(pdev, 0x48, &r2); hpt3x3_set_dmamode()
79 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */ hpt3x3_set_dmamode()
82 r2 |= (0x01 << dn); /* Ultra mode */ hpt3x3_set_dmamode()
84 r2 |= (0x10 << dn); /* MWDMA */ hpt3x3_set_dmamode()
87 pci_write_config_dword(pdev, 0x48, r2); hpt3x3_set_dmamode()
|
| /linux-4.1.27/scripts/ |
| H A D | sortextable.c | 160 static uint16_t (*r2)(const uint16_t *); variable
249 r2 = r2le; do_file()
257 r2 = r2be; do_file()
265 || r2(&ehdr->e_type) != ET_EXEC do_file()
272 switch (r2(&ehdr->e_machine)) { do_file()
275 r2(&ehdr->e_machine), fname); do_file()
299 if (r2(&ehdr->e_ehsize) != sizeof(Elf32_Ehdr) do_file()
300 || r2(&ehdr->e_shentsize) != sizeof(Elf32_Shdr)) { do_file()
309 if (r2(&ghdr->e_ehsize) != sizeof(Elf64_Ehdr) do_file()
310 || r2(&ghdr->e_shentsize) != sizeof(Elf64_Shdr)) { do_file()
|
| /linux-4.1.27/include/linux/ |
| H A D | ioport.h | 172 /* True iff r1 completely contains r2 */ resource_contains()
173 static inline bool resource_contains(struct resource *r1, struct resource *r2) resource_contains() argument
175 if (resource_type(r1) != resource_type(r2)) resource_contains()
177 if (r1->flags & IORESOURCE_UNSET || r2->flags & IORESOURCE_UNSET) resource_contains()
179 return r1->start <= r2->start && r1->end >= r2->end; resource_contains()
244 /* True if any part of r1 overlaps r2 */ resource_overlaps()
245 static inline bool resource_overlaps(struct resource *r1, struct resource *r2) resource_overlaps() argument
247 return (r1->start <= r2->end && r1->end >= r2->start); resource_overlaps()
|
| /linux-4.1.27/arch/arm/mach-omap2/ |
| H A D | sleep34xx.S | 90 ldr r2, [r3] @ value for offset
91 str r1, [r2, r3] @ write to l2dis_3630
113 mov r2, #4 @ set some flags in r2, r6
388 ldr r2, es3_sdrc_fix_sz
389 mov r2, r2, ror #2
393 subs r2, r2, #0x1 @ num_words--
402 ldr r2, [r1]
403 and r2, r2, #0x3
404 cmp r2, #0x0 @ Check if previous power state of CORE is OFF
408 mov r2, #OMAP36XX_RTA_DISABLE
409 str r2, [r1]
420 ldr r2, [r1]
421 and r2, r2, #0x3
422 cmp r2, #0x0 @ Check if target power state was OFF or RET
445 mov r2, #4 @ set some flags in r2, r6
454 mov r2, #4 @ set some flags in r2, r6
468 mov r2, #4 @ set some flags in r2, r6
|
| /linux-4.1.27/arch/cris/arch-v32/kernel/ |
| H A D | head.S | 109 | REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
130 | REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
140 move $r2, $s0 ; mm_cfg, virtual memory configuration.
149 move $r2, $s0 ; mm_cfg, virtual memory configuration.
205 move.d __vmlinux_end, $r2
206 move.d $r2, $r4
210 cmp.d $r2, $r1
308 move.d [$r0+], $r2 ; fetch jffs2 size -> r2
314 move.d [$acr], $r2 ; fetch cramfs size -> r2
323 move.d $r2, [$r3] ; store size at romfs_length
325 add.d $r2, $r0 ; copy from end and downwards
326 add.d $r2, $r1
328 lsrq 1, $r2 ; Size is in bytes, we copy words.
329 addq 1, $r2
335 subq 1, $r2
|
| /linux-4.1.27/drivers/md/persistent-data/ |
| H A D | dm-btree-spine.c | 140 int r2 = unlock_block(s->info, s->nodes[i]); exit_ro_spine() local
141 if (r2 < 0) exit_ro_spine()
142 r = r2; exit_ro_spine()
197 int r2 = unlock_block(s->info, s->nodes[i]); exit_shadow_spine() local
198 if (r2 < 0) exit_shadow_spine()
199 r = r2; exit_shadow_spine()
|
| H A D | dm-space-map-metadata.c | 253 static int combine_errors(int r1, int r2) combine_errors() argument
255 return r1 ? r1 : r2; combine_errors()
384 int r, r2; sm_metadata_set_count() local
395 r2 = out(smm); sm_metadata_set_count()
397 return combine_errors(r, r2); sm_metadata_set_count()
402 int r, r2 = 0; sm_metadata_inc_block() local
411 r2 = out(smm); sm_metadata_inc_block()
414 return combine_errors(r, r2); sm_metadata_inc_block()
419 int r, r2 = 0; sm_metadata_dec_block() local
428 r2 = out(smm); sm_metadata_dec_block()
431 return combine_errors(r, r2); sm_metadata_dec_block()
436 int r, r2 = 0; sm_metadata_new_block_() local
451 r2 = out(smm); sm_metadata_new_block_()
457 return combine_errors(r, r2); sm_metadata_new_block_()
|
| /linux-4.1.27/arch/mips/kernel/ |
| H A D | cevt-r4k.c | 44 static inline int handle_perf_irq(int r2) handle_perf_irq() argument
51 * happened (!r2) then don't check for a timer interrupt. handle_perf_irq()
55 !r2; handle_perf_irq()
60 const int r2 = cpu_has_mips_r2_r6; c0_compare_interrupt() local
70 if (handle_perf_irq(r2)) c0_compare_interrupt()
78 if (!r2 || (read_c0_cause() & CAUSEF_TI)) { c0_compare_interrupt()
|
| /linux-4.1.27/include/drm/ |
| H A D | drm_rect.h | 137 * @r2: second rectangle
143 const struct drm_rect *r2) drm_rect_equals()
145 return r1->x1 == r2->x1 && r1->x2 == r2->x2 && drm_rect_equals()
146 r1->y1 == r2->y1 && r1->y2 == r2->y2; drm_rect_equals()
142 drm_rect_equals(const struct drm_rect *r1, const struct drm_rect *r2) drm_rect_equals() argument
|
| /linux-4.1.27/arch/powerpc/platforms/powermac/ |
| H A D | sleep.S | 66 stw r2,SL_R2(r1)
188 mfspr r2,SPRN_HID0
189 rlwinm r2,r2,0,10,7 /* clear doze, nap */
190 oris r2,r2,HID0_SLEEP@h
193 mtspr SPRN_HID0,r2
202 mfmsr r2
203 oris r2,r2,MSR_POW@h
205 mtmsr r2
372 lwz r2,SL_R2(r1)
|
| /linux-4.1.27/arch/arm/vfp/ |
| H A D | vfphw.S | 58 mov r2, \arg2
75 @ r2 = PC value to resume execution after successful emulation
82 DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10
180 sub r2, r2, #4 @ Retry current instruction - if Thumb
181 str r2, [sp, #S_PC] @ mode it's two 16-bit instructions,
215 mov r2, sp @ nothing stacked - regdump is at TOS
221 @ r2 pointer to register dump
233 VFPFSTMIA r0, r2 @ save the working registers
234 VFPFMRX r2, FPSCR @ current status
242 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
309 tbl_branch r2, r3, #3
|
| /linux-4.1.27/arch/ia64/lib/ |
| H A D | idiv32.S | 44 mov r2 = 0xffdd // r2 = -34 + 65535 (fp reg format bias)
58 setf.exp f7 = r2 // f7 = 2^-34
|
| /linux-4.1.27/arch/arm/mach-s3c24xx/ |
| H A D | sleep-s3c2412.S | 37 ldr r2, =S3C2410_SRCPND
62 ldrne r9, [r2]
63 strne r9, [r2]
|
| /linux-4.1.27/arch/s390/include/asm/ |
| H A D | sfp-machine.h | 75 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \
96 (r2) = __r2; \
101 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \
122 (r2) = __r2; \
|
| /linux-4.1.27/arch/arm64/kernel/ |
| H A D | kuser32.S | 41 .inst 0xe1b20f9f // 1: ldrexd r0, r1, [r2]
44 .inst 0x01a23e96 // stlexdeq r3, r6, [r2]
59 .inst 0xe1923f9f // 1: ldrex r3, [r2]
61 .inst 0x01823e91 // stlexeq r3, r1, [r2]
|
| /linux-4.1.27/arch/avr32/include/uapi/asm/ |
| H A D | sigcontext.h | 29 unsigned long r2; member in struct:sigcontext
|
| /linux-4.1.27/arch/cris/boot/compressed/ |
| H A D | head_v10.S | 72 move.d _edata, $r2 ; end destination
75 cmp.d $r2, $r1
86 move.d _end, $r2
88 cmp.d $r2, $r1
|
| /linux-4.1.27/arch/arm/mach-sa1100/ |
| H A D | sleep.S | 67 * r2 = &MSC2
83 ldr r2, =MSC2
93 ldr r5, [r2]
122 str r5, [r2]
|
| /linux-4.1.27/tools/perf/arch/arm/include/ |
| H A D | perf_regs.h | 25 return "r2"; perf_reg_name()
|
| /linux-4.1.27/tools/testing/selftests/powerpc/pmu/ebb/ |
| H A D | ebb_handler.S | 10 /* ppc-asm.h defines most of the reg aliases, but not r1/r2. */
12 #define r2 2 define
89 0: addis r2,r12,(.TOC.-0b)@ha; \
90 addi r2,r2,(.TOC.-0b)@l;
96 LOAD_REG_IMMEDIATE(r2, name) \
97 ld r2,8(r2);
253 /* r2 may be changed here but we don't care */
|
| /linux-4.1.27/arch/parisc/math-emu/ |
| H A D | fpudispatch.c | 290 u_int r1,r2,t; /* operand register offsets */ decode_0c() local
531 r2 = extru(ir, fpr2pos, 5) * sizeof(double)/sizeof(u_int); decode_0c()
532 if (r2 == 0) decode_0c()
533 r2 = fpzeroreg; decode_0c()
559 &fpregs[r2],extru(ir,fptpos,5), decode_0c()
566 &fpregs[r2],extru(ir,fptpos,5), decode_0c()
590 &fpregs[r2],extru(ir,fptpos,5), decode_0c()
597 &fpregs[r2],extru(ir,fptpos,5), decode_0c()
628 r2 = extru(ir,fpr2pos,5) * sizeof(double)/sizeof(u_int); decode_0c()
629 if (r2 == 0) decode_0c()
630 r2 = fpzeroreg; decode_0c()
640 return(sgl_fadd(&fpregs[r1],&fpregs[r2], decode_0c()
643 return(dbl_fadd(&fpregs[r1],&fpregs[r2], decode_0c()
652 return(sgl_fsub(&fpregs[r1],&fpregs[r2], decode_0c()
655 return(dbl_fsub(&fpregs[r1],&fpregs[r2], decode_0c()
664 return(sgl_fmpy(&fpregs[r1],&fpregs[r2], decode_0c()
667 return(dbl_fmpy(&fpregs[r1],&fpregs[r2], decode_0c()
676 return(sgl_fdiv(&fpregs[r1],&fpregs[r2], decode_0c()
679 return(dbl_fdiv(&fpregs[r1],&fpregs[r2], decode_0c()
688 return(sgl_frem(&fpregs[r1],&fpregs[r2], decode_0c()
691 return(dbl_frem(&fpregs[r1],&fpregs[r2], decode_0c()
709 u_int r1,r2,t; /* operand register offsets */ decode_0e() local
945 r2 = (extru(ir,fpr2pos,5)<<1); decode_0e()
947 r2 = ((extru(ir,fpr2pos,5)<<1)|(extru(ir,fpxr2pos,1))); decode_0e()
949 if (r2 == 0) decode_0e()
950 r2 = fpzeroreg; decode_0e()
963 &fpregs[r2],extru(ir,fptpos,5), decode_0e()
970 &fpregs[r2],extru(ir,fptpos,5), decode_0e()
995 &fpregs[r2],extru(ir,fptpos,5), decode_0e()
1002 &fpregs[r2],extru(ir,fptpos,5), decode_0e()
1020 r2 = (extru(ir,fpr2pos,5)<<1); decode_0e()
1022 r2 = ((extru(ir,fpr2pos,5)<<1)|(extru(ir,fpxr2pos,1))); decode_0e()
1023 if (r2 == 0) decode_0e()
1024 r2 = fpzeroreg; decode_0e()
1036 return(sgl_fadd(&fpregs[r1],&fpregs[r2], decode_0e()
1039 return(dbl_fadd(&fpregs[r1],&fpregs[r2], decode_0e()
1045 return(sgl_fsub(&fpregs[r1],&fpregs[r2], decode_0e()
1048 return(dbl_fsub(&fpregs[r1],&fpregs[r2], decode_0e()
1069 * impyu(&fpregs[r1],&fpregs[r2], decode_0e()
1081 &fpregs[r2],&fpregs[t],status)); decode_0e()
1084 &fpregs[r2],&fpregs[t],status)); decode_0e()
1090 return(sgl_fdiv(&fpregs[r1],&fpregs[r2], decode_0e()
1093 return(dbl_fdiv(&fpregs[r1],&fpregs[r2], decode_0e()
1099 return(sgl_frem(&fpregs[r1],&fpregs[r2], decode_0e()
1102 return(dbl_frem(&fpregs[r1],&fpregs[r2], decode_0e()
|
| /linux-4.1.27/lib/mpi/ |
| H A D | longlong.h | 198 "mov %|r2, %3, lsr #16 @ BBBB\n" \
200 "bic %0, %3, %|r2, lsl #16 @ bbbb\n" \
201 "mul %1, %|r1, %|r2 @ aaaa * BBBB\n" \
202 "mul %|r2, %|r0, %|r2 @ AAAA * BBBB\n" \
206 "addcs %|r2, %|r2, #65536\n" \
208 "adc %0, %|r2, %|r0, lsr #16" \
213 : "r0", "r1", "r2")
217 "umull %r1, %r0, %r2, %r3" \
596 "addu.ci %0,%r2,%r3" \
605 "subu.ci %0,%r2,%r3" \
914 "s r2,r2\n" \
916 "m r2,%3\n" \
917 "m r2,%3\n" \
918 "m r2,%3\n" \
919 "m r2,%3\n" \
920 "m r2,%3\n" \
921 "m r2,%3\n" \
922 "m r2,%3\n" \
923 "m r2,%3\n" \
924 "m r2,%3\n" \
925 "m r2,%3\n" \
926 "m r2,%3\n" \
927 "m r2,%3\n" \
928 "m r2,%3\n" \
929 "m r2,%3\n" \
930 "m r2,%3\n" \
931 "m r2,%3\n" \
932 "cas %0,r2,r0\n" \
938 : "r2"); \
970 "addx %r2,%3,%0" \
980 "subx %r2,%3,%0" \
|
| /linux-4.1.27/arch/unicore32/include/asm/ |
| H A D | tlbflush.h | 140 "ldw r2, =_stext\n" flush_pmd_entry()
141 "add r2, r2, r1 >> #20\n" flush_pmd_entry()
142 "ldw r1, [r2+], #0x0000\n" flush_pmd_entry()
143 "ldw r1, [r2+], #0x1000\n" flush_pmd_entry()
144 "ldw r1, [r2+], #0x2000\n" flush_pmd_entry()
145 "ldw r1, [r2+], #0x3000\n" flush_pmd_entry()
146 : : "r" (pmd) : "r1", "r2"); flush_pmd_entry()
|
| /linux-4.1.27/include/net/ |
| H A D | geneve.h | 32 u8 r2:1; member in struct:geneve_opt
36 u8 r2:1; member in struct:geneve_opt
|
| /linux-4.1.27/arch/cris/include/arch-v32/arch/ |
| H A D | elf.h | 24 (_r)->r5 = 0; (_r)->r4 = 0; (_r)->r3 = 0; (_r)->r2 = 0; \
44 pr_reg[2] = regs->r2; \
|
| /linux-4.1.27/arch/arm/mach-shmobile/include/mach/ |
| H A D | zboot_macros.h | 69 LDR r2, 4f variable
73 CMP r2, r3 variable
|
| /linux-4.1.27/tools/testing/selftests/powerpc/switch_endian/ |
| H A D | switch_endian_test.S | 16 ld r15, pattern@TOC(%r2)
75 ld r4, message@got(%r2)
|
| /linux-4.1.27/arch/openrisc/kernel/ |
| H A D | head.S | 79 #define EXCEPTION_STORE_GPR2 l.sw 0x64(r0),r2
80 #define EXCEPTION_LOAD_GPR2 l.lwz r2,0x64(r0)
456 CLEAR_GPR(r2)
592 CLEAR_GPR(r2)
824 l.and r2, r3, r6 // r2 <- r3 % NSETS_MASK
831 l.mtspr r2,r5,SPR_DTLBMR_BASE(0) // set DTLBMR
845 l.mtspr r2,r5,SPR_DTLBTR_BASE(0) // set DTLBTR
911 l.and r2, r3, r6 // r2 <- r3 % NSETS_MASK
918 l.mtspr r2,r5,SPR_ITLBMR_BASE(0) // set ITLBMR
938 l.mtspr r2,r5,SPR_ITLBTR_BASE(0) // set ITLBTR
979 l.mfspr r2,r0,SPR_EEAR_BASE
984 l.srli r4,r2,0x18 // >> PAGE_SHIFT + (PAGE_SHIFT - 2)
1012 l.srli r5,r2,0xd // >> PAGE_SHIFT, r2 == EEAR
1016 l.lwz r2,0x0(r3) // this is pte at last
1020 l.andi r4,r2,0x1
1027 l.and r4,r2,r3 // apply the mask
1041 l.mfspr r2,r0,SPR_EEAR_BASE
1043 l.and r4,r2,r3 // apply PAGE_MASK to EA (__PHX__ do we really need this?)
1080 l.mfspr r2,r0,SPR_EEAR_BASE
1087 l.srli r4,r2,0x18 // >> PAGE_SHIFT + (PAGE_SHIFT - 2)
1118 l.srli r5,r2,0xd // >> PAGE_SHIFT, r2 == EEAR
1122 l.lwz r2,0x0(r3) // this is pte at last
1127 l.andi r4,r2,0x1
1134 l.and r4,r2,r3 // apply the mask
1135 l.andi r3,r2,0x7c0 // _PAGE_EXEC | _PAGE_SRE | _PAGE_SWE | _PAGE_URE | _PAGE_UWE
1136 // l.andi r3,r2,0x400 // _PAGE_EXEC
1162 l.mfspr r2,r0,SPR_EEAR_BASE
1164 l.and r4,r2,r3 // apply PAGE_MASK to EA (__PHX__ do we really need this?)
1211 // r2 EEA
1213 tophys(r6,r2)
1248 // r2 is EEA
1263 l.addi r6,r2,0x4 // this is 0xaaaabbbb
1284 l.slli r4,r2,4 // old jump position: EEA shifted left 4
1314 l.addi r6,r2,0x4 // this is 0xaaaabbbb
1346 l.slli r4,r2,4 // old jump position: EEA shifted left 4
1368 tophys (r4,r2) // may not be needed (due to shifts down_
1369 l.addi r4,r4,(0x8 - 0x8) // jump target = r2 + 0x8 (compensate for 0x8)
|