1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 *		http://www.samsung.com
4 *
5 * Common Header for EXYNOS machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
13#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
14
15#include <linux/of.h>
16#include <linux/platform_data/cpuidle-exynos.h>
17
18#define EXYNOS3250_SOC_ID	0xE3472000
19#define EXYNOS3_SOC_MASK	0xFFFFF000
20
21#define EXYNOS4210_CPU_ID	0x43210000
22#define EXYNOS4212_CPU_ID	0x43220000
23#define EXYNOS4412_CPU_ID	0xE4412200
24#define EXYNOS4_CPU_MASK	0xFFFE0000
25
26#define EXYNOS5250_SOC_ID	0x43520000
27#define EXYNOS5410_SOC_ID	0xE5410000
28#define EXYNOS5420_SOC_ID	0xE5420000
29#define EXYNOS5440_SOC_ID	0xE5440000
30#define EXYNOS5800_SOC_ID	0xE5422000
31#define EXYNOS5_SOC_MASK	0xFFFFF000
32
33extern unsigned long samsung_cpu_id;
34
35#define IS_SAMSUNG_CPU(name, id, mask)		\
36static inline int is_samsung_##name(void)	\
37{						\
38	return ((samsung_cpu_id & mask) == (id & mask));	\
39}
40
41IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
42IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
43IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
44IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
45IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
46IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
47IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
48IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
49IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
50
51#if defined(CONFIG_SOC_EXYNOS3250)
52# define soc_is_exynos3250()	is_samsung_exynos3250()
53#else
54# define soc_is_exynos3250()	0
55#endif
56
57#if defined(CONFIG_CPU_EXYNOS4210)
58# define soc_is_exynos4210()	is_samsung_exynos4210()
59#else
60# define soc_is_exynos4210()	0
61#endif
62
63#if defined(CONFIG_SOC_EXYNOS4212)
64# define soc_is_exynos4212()	is_samsung_exynos4212()
65#else
66# define soc_is_exynos4212()	0
67#endif
68
69#if defined(CONFIG_SOC_EXYNOS4412)
70# define soc_is_exynos4412()	is_samsung_exynos4412()
71#else
72# define soc_is_exynos4412()	0
73#endif
74
75#define EXYNOS4210_REV_0	(0x0)
76#define EXYNOS4210_REV_1_0	(0x10)
77#define EXYNOS4210_REV_1_1	(0x11)
78
79#if defined(CONFIG_SOC_EXYNOS5250)
80# define soc_is_exynos5250()	is_samsung_exynos5250()
81#else
82# define soc_is_exynos5250()	0
83#endif
84
85#if defined(CONFIG_SOC_EXYNOS5410)
86# define soc_is_exynos5410()	is_samsung_exynos5410()
87#else
88# define soc_is_exynos5410()	0
89#endif
90
91#if defined(CONFIG_SOC_EXYNOS5420)
92# define soc_is_exynos5420()	is_samsung_exynos5420()
93#else
94# define soc_is_exynos5420()	0
95#endif
96
97#if defined(CONFIG_SOC_EXYNOS5440)
98# define soc_is_exynos5440()	is_samsung_exynos5440()
99#else
100# define soc_is_exynos5440()	0
101#endif
102
103#if defined(CONFIG_SOC_EXYNOS5800)
104# define soc_is_exynos5800()	is_samsung_exynos5800()
105#else
106# define soc_is_exynos5800()	0
107#endif
108
109#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
110			  soc_is_exynos4412())
111#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
112			  soc_is_exynos5420() || soc_is_exynos5800())
113
114extern u32 cp15_save_diag;
115extern u32 cp15_save_power;
116
117extern void __iomem *sysram_ns_base_addr;
118extern void __iomem *sysram_base_addr;
119extern void __iomem *pmu_base_addr;
120void exynos_sysram_init(void);
121
122enum {
123	FW_DO_IDLE_SLEEP,
124	FW_DO_IDLE_AFTR,
125};
126
127void exynos_firmware_init(void);
128
129/* CPU BOOT mode flag for Exynos3250 SoC bootloader */
130#define C2_STATE	(1 << 3)
131
132void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);
133void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);
134
135extern u32 exynos_get_eint_wake_mask(void);
136
137#ifdef CONFIG_PM_SLEEP
138extern void __init exynos_pm_init(void);
139#else
140static inline void exynos_pm_init(void) {}
141#endif
142
143extern void exynos_cpu_resume(void);
144extern void exynos_cpu_resume_ns(void);
145
146extern struct smp_operations exynos_smp_ops;
147
148extern void exynos_cpu_power_down(int cpu);
149extern void exynos_cpu_power_up(int cpu);
150extern int  exynos_cpu_power_state(int cpu);
151extern void exynos_cluster_power_down(int cluster);
152extern void exynos_cluster_power_up(int cluster);
153extern int  exynos_cluster_power_state(int cluster);
154extern void exynos_cpu_save_register(void);
155extern void exynos_cpu_restore_register(void);
156extern void exynos_pm_central_suspend(void);
157extern int exynos_pm_central_resume(void);
158extern void exynos_enter_aftr(void);
159
160extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
161
162extern void exynos_set_delayed_reset_assertion(bool enable);
163
164extern void s5p_init_cpu(void __iomem *cpuid_addr);
165extern unsigned int samsung_rev(void);
166extern void __iomem *cpu_boot_reg_base(void);
167
168static inline void pmu_raw_writel(u32 val, u32 offset)
169{
170	__raw_writel(val, pmu_base_addr + offset);
171}
172
173static inline u32 pmu_raw_readl(u32 offset)
174{
175	return __raw_readl(pmu_base_addr + offset);
176}
177
178#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
179