1/* linux/arch/arm/mach-s3c64xx/mach-anw6410.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 *	Ben Dooks <ben@simtec.co.uk>
6 *	http://armlinux.simtec.co.uk/
7 * Copyright 2009 Kwangwoo Lee
8 * 	Kwangwoo Lee <kwangwoo.lee@gmail.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14*/
15
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/interrupt.h>
19#include <linux/list.h>
20#include <linux/timer.h>
21#include <linux/init.h>
22#include <linux/serial_core.h>
23#include <linux/serial_s3c.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/i2c.h>
27#include <linux/fb.h>
28#include <linux/gpio.h>
29#include <linux/delay.h>
30#include <linux/dm9000.h>
31
32#include <video/platform_lcd.h>
33#include <video/samsung_fimd.h>
34
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <asm/mach/irq.h>
38
39#include <mach/hardware.h>
40#include <mach/map.h>
41
42#include <asm/irq.h>
43#include <asm/mach-types.h>
44
45#include <linux/platform_data/i2c-s3c2410.h>
46#include <plat/fb.h>
47
48#include <plat/devs.h>
49#include <plat/cpu.h>
50#include <mach/regs-gpio.h>
51#include <mach/gpio-samsung.h>
52#include <plat/samsung-time.h>
53
54#include "common.h"
55#include "regs-modem.h"
56
57/* DM9000 */
58#define ANW6410_PA_DM9000	(0x18000000)
59
60/* A hardware buffer to control external devices is mapped at 0x30000000.
61 * It can not be read. So current status must be kept in anw6410_extdev_status.
62 */
63#define ANW6410_VA_EXTDEV	S3C_ADDR(0x02000000)
64#define ANW6410_PA_EXTDEV	(0x30000000)
65
66#define ANW6410_EN_DM9000	(1<<11)
67#define ANW6410_EN_LCD		(1<<14)
68
69static __u32 anw6410_extdev_status;
70
71static struct s3c2410_uartcfg anw6410_uartcfgs[] __initdata = {
72	[0] = {
73		.hwport	     = 0,
74		.flags	     = 0,
75		.ucon	     = 0x3c5,
76		.ulcon	     = 0x03,
77		.ufcon	     = 0x51,
78	},
79	[1] = {
80		.hwport	     = 1,
81		.flags	     = 0,
82		.ucon	     = 0x3c5,
83		.ulcon	     = 0x03,
84		.ufcon	     = 0x51,
85	},
86};
87
88/* framebuffer and LCD setup. */
89static void __init anw6410_lcd_mode_set(void)
90{
91	u32 tmp;
92
93	/* set the LCD type */
94	tmp = __raw_readl(S3C64XX_SPCON);
95	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
96	tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
97	__raw_writel(tmp, S3C64XX_SPCON);
98
99	/* remove the LCD bypass */
100	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
101	tmp &= ~MIFPCON_LCD_BYPASS;
102	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
103}
104
105/* GPF1 = LCD panel power
106 * GPF4 = LCD backlight control
107 */
108static void anw6410_lcd_power_set(struct plat_lcd_data *pd,
109				   unsigned int power)
110{
111	if (power) {
112		anw6410_extdev_status |= (ANW6410_EN_LCD << 16);
113		__raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
114
115		gpio_direction_output(S3C64XX_GPF(1), 1);
116		gpio_direction_output(S3C64XX_GPF(4), 1);
117	} else {
118		anw6410_extdev_status &= ~(ANW6410_EN_LCD << 16);
119		__raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
120
121		gpio_direction_output(S3C64XX_GPF(1), 0);
122		gpio_direction_output(S3C64XX_GPF(4), 0);
123	}
124}
125
126static struct plat_lcd_data anw6410_lcd_power_data = {
127	.set_power	= anw6410_lcd_power_set,
128};
129
130static struct platform_device anw6410_lcd_powerdev = {
131	.name			= "platform-lcd",
132	.dev.parent		= &s3c_device_fb.dev,
133	.dev.platform_data	= &anw6410_lcd_power_data,
134};
135
136static struct s3c_fb_pd_win anw6410_fb_win0 = {
137	.max_bpp	= 32,
138	.default_bpp	= 16,
139	.xres		= 800,
140	.yres		= 480,
141};
142
143static struct fb_videomode anw6410_lcd_timing = {
144	.left_margin	= 8,
145	.right_margin	= 13,
146	.upper_margin	= 7,
147	.lower_margin	= 5,
148	.hsync_len	= 3,
149	.vsync_len	= 1,
150	.xres		= 800,
151	.yres		= 480,
152};
153
154/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
155static struct s3c_fb_platdata anw6410_lcd_pdata __initdata = {
156	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
157	.vtiming	= &anw6410_lcd_timing,
158	.win[0]		= &anw6410_fb_win0,
159	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
160	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
161};
162
163/* DM9000AEP 10/100 ethernet controller */
164static void __init anw6410_dm9000_enable(void)
165{
166	anw6410_extdev_status |= (ANW6410_EN_DM9000 << 16);
167	__raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
168}
169
170static struct resource anw6410_dm9000_resource[] = {
171	[0] = DEFINE_RES_MEM(ANW6410_PA_DM9000, 4),
172	[1] = DEFINE_RES_MEM(ANW6410_PA_DM9000 + 4, 501),
173	[2] = DEFINE_RES_NAMED(IRQ_EINT(15), 1, NULL, IORESOURCE_IRQ \
174					| IRQF_TRIGGER_HIGH),
175};
176
177static struct dm9000_plat_data anw6410_dm9000_pdata = {
178	.flags	  = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
179	/* dev_addr can be set to provide hwaddr. */
180};
181
182static struct platform_device anw6410_device_eth = {
183	.name	= "dm9000",
184	.id	= -1,
185	.num_resources	= ARRAY_SIZE(anw6410_dm9000_resource),
186	.resource	= anw6410_dm9000_resource,
187	.dev	= {
188		.platform_data  = &anw6410_dm9000_pdata,
189	},
190};
191
192static struct map_desc anw6410_iodesc[] __initdata = {
193	{
194		.virtual	= (unsigned long)ANW6410_VA_EXTDEV,
195		.pfn		= __phys_to_pfn(ANW6410_PA_EXTDEV),
196		.length		= SZ_64K,
197		.type		= MT_DEVICE,
198	},
199};
200
201static struct platform_device *anw6410_devices[] __initdata = {
202	&s3c_device_fb,
203	&anw6410_lcd_powerdev,
204	&anw6410_device_eth,
205};
206
207static void __init anw6410_map_io(void)
208{
209	s3c64xx_init_io(anw6410_iodesc, ARRAY_SIZE(anw6410_iodesc));
210	s3c64xx_set_xtal_freq(12000000);
211	s3c24xx_init_uarts(anw6410_uartcfgs, ARRAY_SIZE(anw6410_uartcfgs));
212	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
213
214	anw6410_lcd_mode_set();
215}
216
217static void __init anw6410_machine_init(void)
218{
219	s3c_fb_set_platdata(&anw6410_lcd_pdata);
220
221	gpio_request(S3C64XX_GPF(1), "panel power");
222	gpio_request(S3C64XX_GPF(4), "LCD backlight");
223
224	anw6410_dm9000_enable();
225
226	platform_add_devices(anw6410_devices, ARRAY_SIZE(anw6410_devices));
227}
228
229MACHINE_START(ANW6410, "A&W6410")
230	/* Maintainer: Kwangwoo Lee <kwangwoo.lee@gmail.com> */
231	.atag_offset	= 0x100,
232
233	.init_irq	= s3c6410_init_irq,
234	.map_io		= anw6410_map_io,
235	.init_machine	= anw6410_machine_init,
236	.init_time	= samsung_timer_init,
237	.restart	= s3c64xx_restart,
238MACHINE_END
239