1/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c 2 * 3 * Copyright 2008 Openmoko, Inc. 4 * Copyright 2008 Simtec Electronics 5 * Ben Dooks <ben@simtec.co.uk> 6 * http://armlinux.simtec.co.uk/ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12*/ 13 14#include <linux/kernel.h> 15#include <linux/types.h> 16#include <linux/interrupt.h> 17#include <linux/list.h> 18#include <linux/timer.h> 19#include <linux/init.h> 20#include <linux/input.h> 21#include <linux/serial_core.h> 22#include <linux/serial_s3c.h> 23#include <linux/platform_device.h> 24#include <linux/io.h> 25#include <linux/i2c.h> 26#include <linux/leds.h> 27#include <linux/fb.h> 28#include <linux/gpio.h> 29#include <linux/delay.h> 30#include <linux/smsc911x.h> 31#include <linux/regulator/fixed.h> 32#include <linux/regulator/machine.h> 33#include <linux/pwm_backlight.h> 34#include <linux/platform_data/s3c-hsotg.h> 35 36#ifdef CONFIG_SMDK6410_WM1190_EV1 37#include <linux/mfd/wm8350/core.h> 38#include <linux/mfd/wm8350/pmic.h> 39#endif 40 41#ifdef CONFIG_SMDK6410_WM1192_EV1 42#include <linux/mfd/wm831x/core.h> 43#include <linux/mfd/wm831x/pdata.h> 44#endif 45 46#include <video/platform_lcd.h> 47#include <video/samsung_fimd.h> 48 49#include <asm/mach/arch.h> 50#include <asm/mach/map.h> 51#include <asm/mach/irq.h> 52 53#include <mach/hardware.h> 54#include <mach/map.h> 55 56#include <asm/irq.h> 57#include <asm/mach-types.h> 58 59#include <mach/regs-gpio.h> 60#include <mach/gpio-samsung.h> 61#include <linux/platform_data/ata-samsung_cf.h> 62#include <linux/platform_data/i2c-s3c2410.h> 63#include <plat/fb.h> 64#include <plat/gpio-cfg.h> 65 66#include <plat/devs.h> 67#include <plat/cpu.h> 68#include <plat/adc.h> 69#include <linux/platform_data/touchscreen-s3c2410.h> 70#include <plat/keypad.h> 71#include <plat/backlight.h> 72#include <plat/samsung-time.h> 73 74#include "common.h" 75#include "regs-modem.h" 76#include "regs-srom.h" 77#include "regs-sys.h" 78 79#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK 80#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 81#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 82 83static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = { 84 [0] = { 85 .hwport = 0, 86 .flags = 0, 87 .ucon = UCON, 88 .ulcon = ULCON, 89 .ufcon = UFCON, 90 }, 91 [1] = { 92 .hwport = 1, 93 .flags = 0, 94 .ucon = UCON, 95 .ulcon = ULCON, 96 .ufcon = UFCON, 97 }, 98 [2] = { 99 .hwport = 2, 100 .flags = 0, 101 .ucon = UCON, 102 .ulcon = ULCON, 103 .ufcon = UFCON, 104 }, 105 [3] = { 106 .hwport = 3, 107 .flags = 0, 108 .ucon = UCON, 109 .ulcon = ULCON, 110 .ufcon = UFCON, 111 }, 112}; 113 114/* framebuffer and LCD setup. */ 115 116/* GPF15 = LCD backlight control 117 * GPF13 => Panel power 118 * GPN5 = LCD nRESET signal 119 * PWM_TOUT1 => backlight brightness 120 */ 121 122static void smdk6410_lcd_power_set(struct plat_lcd_data *pd, 123 unsigned int power) 124{ 125 if (power) { 126 gpio_direction_output(S3C64XX_GPF(13), 1); 127 128 /* fire nRESET on power up */ 129 gpio_direction_output(S3C64XX_GPN(5), 0); 130 msleep(10); 131 gpio_direction_output(S3C64XX_GPN(5), 1); 132 msleep(1); 133 } else { 134 gpio_direction_output(S3C64XX_GPF(13), 0); 135 } 136} 137 138static struct plat_lcd_data smdk6410_lcd_power_data = { 139 .set_power = smdk6410_lcd_power_set, 140}; 141 142static struct platform_device smdk6410_lcd_powerdev = { 143 .name = "platform-lcd", 144 .dev.parent = &s3c_device_fb.dev, 145 .dev.platform_data = &smdk6410_lcd_power_data, 146}; 147 148static struct s3c_fb_pd_win smdk6410_fb_win0 = { 149 .max_bpp = 32, 150 .default_bpp = 16, 151 .xres = 800, 152 .yres = 480, 153 .virtual_y = 480 * 2, 154 .virtual_x = 800, 155}; 156 157static struct fb_videomode smdk6410_lcd_timing = { 158 .left_margin = 8, 159 .right_margin = 13, 160 .upper_margin = 7, 161 .lower_margin = 5, 162 .hsync_len = 3, 163 .vsync_len = 1, 164 .xres = 800, 165 .yres = 480, 166}; 167 168/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ 169static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = { 170 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 171 .vtiming = &smdk6410_lcd_timing, 172 .win[0] = &smdk6410_fb_win0, 173 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 174 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 175}; 176 177/* 178 * Configuring Ethernet on SMDK6410 179 * 180 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6. 181 * The constant address below corresponds to nCS1 182 * 183 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet" 184 * 2) CFG6 needs to be switched to "LAN9115" side 185 */ 186 187static struct resource smdk6410_smsc911x_resources[] = { 188 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K), 189 [1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \ 190 | IRQ_TYPE_LEVEL_LOW), 191}; 192 193static struct smsc911x_platform_config smdk6410_smsc911x_pdata = { 194 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 195 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 196 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY, 197 .phy_interface = PHY_INTERFACE_MODE_MII, 198}; 199 200 201static struct platform_device smdk6410_smsc911x = { 202 .name = "smsc911x", 203 .id = -1, 204 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources), 205 .resource = &smdk6410_smsc911x_resources[0], 206 .dev = { 207 .platform_data = &smdk6410_smsc911x_pdata, 208 }, 209}; 210 211#ifdef CONFIG_REGULATOR 212static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = { 213 REGULATOR_SUPPLY("PVDD", "0-001b"), 214 REGULATOR_SUPPLY("AVDD", "0-001b"), 215}; 216 217static struct regulator_init_data smdk6410_b_pwr_5v_data = { 218 .constraints = { 219 .always_on = 1, 220 }, 221 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers), 222 .consumer_supplies = smdk6410_b_pwr_5v_consumers, 223}; 224 225static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = { 226 .supply_name = "B_PWR_5V", 227 .microvolts = 5000000, 228 .init_data = &smdk6410_b_pwr_5v_data, 229 .gpio = -EINVAL, 230}; 231 232static struct platform_device smdk6410_b_pwr_5v = { 233 .name = "reg-fixed-voltage", 234 .id = -1, 235 .dev = { 236 .platform_data = &smdk6410_b_pwr_5v_pdata, 237 }, 238}; 239#endif 240 241static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = { 242 .setup_gpio = s3c64xx_ide_setup_gpio, 243}; 244 245static uint32_t smdk6410_keymap[] __initdata = { 246 /* KEY(row, col, keycode) */ 247 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), 248 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), 249 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), 250 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) 251}; 252 253static struct matrix_keymap_data smdk6410_keymap_data __initdata = { 254 .keymap = smdk6410_keymap, 255 .keymap_size = ARRAY_SIZE(smdk6410_keymap), 256}; 257 258static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = { 259 .keymap_data = &smdk6410_keymap_data, 260 .rows = 2, 261 .cols = 8, 262}; 263 264static struct map_desc smdk6410_iodesc[] = {}; 265 266static struct platform_device *smdk6410_devices[] __initdata = { 267#ifdef CONFIG_SMDK6410_SD_CH0 268 &s3c_device_hsmmc0, 269#endif 270#ifdef CONFIG_SMDK6410_SD_CH1 271 &s3c_device_hsmmc1, 272#endif 273 &s3c_device_i2c0, 274 &s3c_device_i2c1, 275 &s3c_device_fb, 276 &s3c_device_ohci, 277 &samsung_device_pwm, 278 &s3c_device_usb_hsotg, 279 &s3c64xx_device_iisv4, 280 &samsung_device_keypad, 281 282#ifdef CONFIG_REGULATOR 283 &smdk6410_b_pwr_5v, 284#endif 285 &smdk6410_lcd_powerdev, 286 287 &smdk6410_smsc911x, 288 &s3c_device_adc, 289 &s3c_device_cfcon, 290 &s3c_device_rtc, 291 &s3c_device_ts, 292 &s3c_device_wdt, 293}; 294 295#ifdef CONFIG_REGULATOR 296/* ARM core */ 297static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = { 298 REGULATOR_SUPPLY("vddarm", NULL), 299}; 300 301/* VDDARM, BUCK1 on J5 */ 302static struct regulator_init_data smdk6410_vddarm = { 303 .constraints = { 304 .name = "PVDD_ARM", 305 .min_uV = 1000000, 306 .max_uV = 1300000, 307 .always_on = 1, 308 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, 309 }, 310 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers), 311 .consumer_supplies = smdk6410_vddarm_consumers, 312}; 313 314/* VDD_INT, BUCK2 on J5 */ 315static struct regulator_init_data smdk6410_vddint = { 316 .constraints = { 317 .name = "PVDD_INT", 318 .min_uV = 1000000, 319 .max_uV = 1200000, 320 .always_on = 1, 321 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, 322 }, 323}; 324 325/* VDD_HI, LDO3 on J5 */ 326static struct regulator_init_data smdk6410_vddhi = { 327 .constraints = { 328 .name = "PVDD_HI", 329 .always_on = 1, 330 }, 331}; 332 333/* VDD_PLL, LDO2 on J5 */ 334static struct regulator_init_data smdk6410_vddpll = { 335 .constraints = { 336 .name = "PVDD_PLL", 337 .always_on = 1, 338 }, 339}; 340 341/* VDD_UH_MMC, LDO5 on J5 */ 342static struct regulator_init_data smdk6410_vdduh_mmc = { 343 .constraints = { 344 .name = "PVDD_UH+PVDD_MMC", 345 .always_on = 1, 346 }, 347}; 348 349/* VCCM3BT, LDO8 on J5 */ 350static struct regulator_init_data smdk6410_vccmc3bt = { 351 .constraints = { 352 .name = "PVCCM3BT", 353 .always_on = 1, 354 }, 355}; 356 357/* VCCM2MTV, LDO11 on J5 */ 358static struct regulator_init_data smdk6410_vccm2mtv = { 359 .constraints = { 360 .name = "PVCCM2MTV", 361 .always_on = 1, 362 }, 363}; 364 365/* VDD_LCD, LDO12 on J5 */ 366static struct regulator_init_data smdk6410_vddlcd = { 367 .constraints = { 368 .name = "PVDD_LCD", 369 .always_on = 1, 370 }, 371}; 372 373/* VDD_OTGI, LDO9 on J5 */ 374static struct regulator_init_data smdk6410_vddotgi = { 375 .constraints = { 376 .name = "PVDD_OTGI", 377 .always_on = 1, 378 }, 379}; 380 381/* VDD_OTG, LDO14 on J5 */ 382static struct regulator_init_data smdk6410_vddotg = { 383 .constraints = { 384 .name = "PVDD_OTG", 385 .always_on = 1, 386 }, 387}; 388 389/* VDD_ALIVE, LDO15 on J5 */ 390static struct regulator_init_data smdk6410_vddalive = { 391 .constraints = { 392 .name = "PVDD_ALIVE", 393 .always_on = 1, 394 }, 395}; 396 397/* VDD_AUDIO, VLDO_AUDIO on J5 */ 398static struct regulator_init_data smdk6410_vddaudio = { 399 .constraints = { 400 .name = "PVDD_AUDIO", 401 .always_on = 1, 402 }, 403}; 404#endif 405 406#ifdef CONFIG_SMDK6410_WM1190_EV1 407/* S3C64xx internal logic & PLL */ 408static struct regulator_init_data wm8350_dcdc1_data = { 409 .constraints = { 410 .name = "PVDD_INT+PVDD_PLL", 411 .min_uV = 1200000, 412 .max_uV = 1200000, 413 .always_on = 1, 414 .apply_uV = 1, 415 }, 416}; 417 418/* Memory */ 419static struct regulator_init_data wm8350_dcdc3_data = { 420 .constraints = { 421 .name = "PVDD_MEM", 422 .min_uV = 1800000, 423 .max_uV = 1800000, 424 .always_on = 1, 425 .state_mem = { 426 .uV = 1800000, 427 .mode = REGULATOR_MODE_NORMAL, 428 .enabled = 1, 429 }, 430 .initial_state = PM_SUSPEND_MEM, 431 }, 432}; 433 434/* USB, EXT, PCM, ADC/DAC, USB, MMC */ 435static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { 436 REGULATOR_SUPPLY("DVDD", "0-001b"), 437}; 438 439static struct regulator_init_data wm8350_dcdc4_data = { 440 .constraints = { 441 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV", 442 .min_uV = 3000000, 443 .max_uV = 3000000, 444 .always_on = 1, 445 }, 446 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers), 447 .consumer_supplies = wm8350_dcdc4_consumers, 448}; 449 450/* OTGi/1190-EV1 HPVDD & AVDD */ 451static struct regulator_init_data wm8350_ldo4_data = { 452 .constraints = { 453 .name = "PVDD_OTGI+HPVDD+AVDD", 454 .min_uV = 1200000, 455 .max_uV = 1200000, 456 .apply_uV = 1, 457 .always_on = 1, 458 }, 459}; 460 461static struct { 462 int regulator; 463 struct regulator_init_data *initdata; 464} wm1190_regulators[] = { 465 { WM8350_DCDC_1, &wm8350_dcdc1_data }, 466 { WM8350_DCDC_3, &wm8350_dcdc3_data }, 467 { WM8350_DCDC_4, &wm8350_dcdc4_data }, 468 { WM8350_DCDC_6, &smdk6410_vddarm }, 469 { WM8350_LDO_1, &smdk6410_vddalive }, 470 { WM8350_LDO_2, &smdk6410_vddotg }, 471 { WM8350_LDO_3, &smdk6410_vddlcd }, 472 { WM8350_LDO_4, &wm8350_ldo4_data }, 473}; 474 475static int __init smdk6410_wm8350_init(struct wm8350 *wm8350) 476{ 477 int i; 478 479 /* Configure the IRQ line */ 480 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP); 481 482 /* Instantiate the regulators */ 483 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++) 484 wm8350_register_regulator(wm8350, 485 wm1190_regulators[i].regulator, 486 wm1190_regulators[i].initdata); 487 488 return 0; 489} 490 491static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = { 492 .init = smdk6410_wm8350_init, 493 .irq_high = 1, 494 .irq_base = IRQ_BOARD_START, 495}; 496#endif 497 498#ifdef CONFIG_SMDK6410_WM1192_EV1 499static struct gpio_led wm1192_pmic_leds[] = { 500 { 501 .name = "PMIC:red:power", 502 .gpio = GPIO_BOARD_START + 3, 503 .default_state = LEDS_GPIO_DEFSTATE_ON, 504 }, 505}; 506 507static struct gpio_led_platform_data wm1192_pmic_led = { 508 .num_leds = ARRAY_SIZE(wm1192_pmic_leds), 509 .leds = wm1192_pmic_leds, 510}; 511 512static struct platform_device wm1192_pmic_led_dev = { 513 .name = "leds-gpio", 514 .id = -1, 515 .dev = { 516 .platform_data = &wm1192_pmic_led, 517 }, 518}; 519 520static int wm1192_pre_init(struct wm831x *wm831x) 521{ 522 int ret; 523 524 /* Configure the IRQ line */ 525 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP); 526 527 ret = platform_device_register(&wm1192_pmic_led_dev); 528 if (ret != 0) 529 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret); 530 531 return 0; 532} 533 534static struct wm831x_backlight_pdata wm1192_backlight_pdata = { 535 .isink = 1, 536 .max_uA = 27554, 537}; 538 539static struct regulator_init_data wm1192_dcdc3 = { 540 .constraints = { 541 .name = "PVDD_MEM+PVDD_GPS", 542 .always_on = 1, 543 }, 544}; 545 546static struct regulator_consumer_supply wm1192_ldo1_consumers[] = { 547 REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */ 548}; 549 550static struct regulator_init_data wm1192_ldo1 = { 551 .constraints = { 552 .name = "PVDD_LCD+PVDD_EXT", 553 .always_on = 1, 554 }, 555 .consumer_supplies = wm1192_ldo1_consumers, 556 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers), 557}; 558 559static struct wm831x_status_pdata wm1192_led7_pdata = { 560 .name = "LED7:green:", 561}; 562 563static struct wm831x_status_pdata wm1192_led8_pdata = { 564 .name = "LED8:green:", 565}; 566 567static struct wm831x_pdata smdk6410_wm1192_pdata = { 568 .pre_init = wm1192_pre_init, 569 570 .backlight = &wm1192_backlight_pdata, 571 .dcdc = { 572 &smdk6410_vddarm, /* DCDC1 */ 573 &smdk6410_vddint, /* DCDC2 */ 574 &wm1192_dcdc3, 575 }, 576 .gpio_base = GPIO_BOARD_START, 577 .ldo = { 578 &wm1192_ldo1, /* LDO1 */ 579 &smdk6410_vdduh_mmc, /* LDO2 */ 580 NULL, /* LDO3 NC */ 581 &smdk6410_vddotgi, /* LDO4 */ 582 &smdk6410_vddotg, /* LDO5 */ 583 &smdk6410_vddhi, /* LDO6 */ 584 &smdk6410_vddaudio, /* LDO7 */ 585 &smdk6410_vccm2mtv, /* LDO8 */ 586 &smdk6410_vddpll, /* LDO9 */ 587 &smdk6410_vccmc3bt, /* LDO10 */ 588 &smdk6410_vddalive, /* LDO11 */ 589 }, 590 .status = { 591 &wm1192_led7_pdata, 592 &wm1192_led8_pdata, 593 }, 594}; 595#endif 596 597static struct i2c_board_info i2c_devs0[] __initdata = { 598 { I2C_BOARD_INFO("24c08", 0x50), }, 599 { I2C_BOARD_INFO("wm8580", 0x1b), }, 600 601#ifdef CONFIG_SMDK6410_WM1192_EV1 602 { I2C_BOARD_INFO("wm8312", 0x34), 603 .platform_data = &smdk6410_wm1192_pdata, 604 .irq = S3C_EINT(12), 605 }, 606#endif 607 608#ifdef CONFIG_SMDK6410_WM1190_EV1 609 { I2C_BOARD_INFO("wm8350", 0x1a), 610 .platform_data = &smdk6410_wm8350_pdata, 611 .irq = S3C_EINT(12), 612 }, 613#endif 614}; 615 616static struct i2c_board_info i2c_devs1[] __initdata = { 617 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */ 618}; 619 620/* LCD Backlight data */ 621static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = { 622 .no = S3C64XX_GPF(15), 623 .func = S3C_GPIO_SFN(2), 624}; 625 626static struct platform_pwm_backlight_data smdk6410_bl_data = { 627 .pwm_id = 1, 628 .enable_gpio = -1, 629}; 630 631static struct s3c_hsotg_plat smdk6410_hsotg_pdata; 632 633static void __init smdk6410_map_io(void) 634{ 635 u32 tmp; 636 637 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc)); 638 s3c64xx_set_xtal_freq(12000000); 639 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs)); 640 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); 641 642 /* set the LCD type */ 643 644 tmp = __raw_readl(S3C64XX_SPCON); 645 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; 646 tmp |= S3C64XX_SPCON_LCD_SEL_RGB; 647 __raw_writel(tmp, S3C64XX_SPCON); 648 649 /* remove the lcd bypass */ 650 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); 651 tmp &= ~MIFPCON_LCD_BYPASS; 652 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); 653} 654 655static void __init smdk6410_machine_init(void) 656{ 657 u32 cs1; 658 659 s3c_i2c0_set_platdata(NULL); 660 s3c_i2c1_set_platdata(NULL); 661 s3c_fb_set_platdata(&smdk6410_lcd_pdata); 662 s3c_hsotg_set_platdata(&smdk6410_hsotg_pdata); 663 664 samsung_keypad_set_platdata(&smdk6410_keypad_data); 665 666 s3c24xx_ts_set_platdata(NULL); 667 668 /* configure nCS1 width to 16 bits */ 669 670 cs1 = __raw_readl(S3C64XX_SROM_BW) & 671 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); 672 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | 673 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | 674 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << 675 S3C64XX_SROM_BW__NCS1__SHIFT; 676 __raw_writel(cs1, S3C64XX_SROM_BW); 677 678 /* set timing for nCS1 suitable for ethernet chip */ 679 680 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | 681 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | 682 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | 683 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | 684 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) | 685 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | 686 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); 687 688 gpio_request(S3C64XX_GPN(5), "LCD power"); 689 gpio_request(S3C64XX_GPF(13), "LCD power"); 690 691 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); 692 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); 693 694 s3c_ide_set_platdata(&smdk6410_ide_pdata); 695 696 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); 697 698 samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data); 699} 700 701MACHINE_START(SMDK6410, "SMDK6410") 702 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 703 .atag_offset = 0x100, 704 705 .init_irq = s3c6410_init_irq, 706 .map_io = smdk6410_map_io, 707 .init_machine = smdk6410_machine_init, 708 .init_time = samsung_timer_init, 709 .restart = s3c64xx_restart, 710MACHINE_END 711