1/* 2 * arch/arm/plat-orion/common.c 3 * 4 * Marvell Orion SoC common setup code used by multiple mach-/common.c 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11#include <linux/kernel.h> 12#include <linux/init.h> 13#include <linux/platform_device.h> 14#include <linux/dma-mapping.h> 15#include <linux/serial_8250.h> 16#include <linux/ata_platform.h> 17#include <linux/clk.h> 18#include <linux/clkdev.h> 19#include <linux/mv643xx_eth.h> 20#include <linux/mv643xx_i2c.h> 21#include <net/dsa.h> 22#include <linux/platform_data/dma-mv_xor.h> 23#include <linux/platform_data/usb-ehci-orion.h> 24#include <mach/bridge-regs.h> 25#include <plat/common.h> 26 27/* Create a clkdev entry for a given device/clk */ 28void __init orion_clkdev_add(const char *con_id, const char *dev_id, 29 struct clk *clk) 30{ 31 struct clk_lookup *cl; 32 33 cl = clkdev_alloc(clk, con_id, dev_id); 34 if (cl) 35 clkdev_add(cl); 36} 37 38/* Create clkdev entries for all orion platforms except kirkwood. 39 Kirkwood has gated clocks for some of its peripherals, so creates 40 its own clkdev entries. For all the other orion devices, create 41 clkdev entries to the tclk. */ 42void __init orion_clkdev_init(struct clk *tclk) 43{ 44 orion_clkdev_add(NULL, "orion_spi.0", tclk); 45 orion_clkdev_add(NULL, "orion_spi.1", tclk); 46 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); 47 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); 48 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); 49 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); 50 orion_clkdev_add(NULL, "orion_wdt", tclk); 51 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); 52} 53 54/* Fill in the resources structure and link it into the platform 55 device structure. There is always a memory region, and nearly 56 always an interrupt.*/ 57static void fill_resources(struct platform_device *device, 58 struct resource *resources, 59 resource_size_t mapbase, 60 resource_size_t size, 61 unsigned int irq) 62{ 63 device->resource = resources; 64 device->num_resources = 1; 65 resources[0].flags = IORESOURCE_MEM; 66 resources[0].start = mapbase; 67 resources[0].end = mapbase + size; 68 69 if (irq != NO_IRQ) { 70 device->num_resources++; 71 resources[1].flags = IORESOURCE_IRQ; 72 resources[1].start = irq; 73 resources[1].end = irq; 74 } 75} 76 77/***************************************************************************** 78 * UART 79 ****************************************************************************/ 80static unsigned long __init uart_get_clk_rate(struct clk *clk) 81{ 82 clk_prepare_enable(clk); 83 return clk_get_rate(clk); 84} 85 86static void __init uart_complete( 87 struct platform_device *orion_uart, 88 struct plat_serial8250_port *data, 89 struct resource *resources, 90 void __iomem *membase, 91 resource_size_t mapbase, 92 unsigned int irq, 93 struct clk *clk) 94{ 95 data->mapbase = mapbase; 96 data->membase = membase; 97 data->irq = irq; 98 data->uartclk = uart_get_clk_rate(clk); 99 orion_uart->dev.platform_data = data; 100 101 fill_resources(orion_uart, resources, mapbase, 0xff, irq); 102 platform_device_register(orion_uart); 103} 104 105/***************************************************************************** 106 * UART0 107 ****************************************************************************/ 108static struct plat_serial8250_port orion_uart0_data[] = { 109 { 110 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 111 .iotype = UPIO_MEM, 112 .regshift = 2, 113 }, { 114 }, 115}; 116 117static struct resource orion_uart0_resources[2]; 118 119static struct platform_device orion_uart0 = { 120 .name = "serial8250", 121 .id = PLAT8250_DEV_PLATFORM, 122}; 123 124void __init orion_uart0_init(void __iomem *membase, 125 resource_size_t mapbase, 126 unsigned int irq, 127 struct clk *clk) 128{ 129 uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, 130 membase, mapbase, irq, clk); 131} 132 133/***************************************************************************** 134 * UART1 135 ****************************************************************************/ 136static struct plat_serial8250_port orion_uart1_data[] = { 137 { 138 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 139 .iotype = UPIO_MEM, 140 .regshift = 2, 141 }, { 142 }, 143}; 144 145static struct resource orion_uart1_resources[2]; 146 147static struct platform_device orion_uart1 = { 148 .name = "serial8250", 149 .id = PLAT8250_DEV_PLATFORM1, 150}; 151 152void __init orion_uart1_init(void __iomem *membase, 153 resource_size_t mapbase, 154 unsigned int irq, 155 struct clk *clk) 156{ 157 uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, 158 membase, mapbase, irq, clk); 159} 160 161/***************************************************************************** 162 * UART2 163 ****************************************************************************/ 164static struct plat_serial8250_port orion_uart2_data[] = { 165 { 166 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 167 .iotype = UPIO_MEM, 168 .regshift = 2, 169 }, { 170 }, 171}; 172 173static struct resource orion_uart2_resources[2]; 174 175static struct platform_device orion_uart2 = { 176 .name = "serial8250", 177 .id = PLAT8250_DEV_PLATFORM2, 178}; 179 180void __init orion_uart2_init(void __iomem *membase, 181 resource_size_t mapbase, 182 unsigned int irq, 183 struct clk *clk) 184{ 185 uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, 186 membase, mapbase, irq, clk); 187} 188 189/***************************************************************************** 190 * UART3 191 ****************************************************************************/ 192static struct plat_serial8250_port orion_uart3_data[] = { 193 { 194 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 195 .iotype = UPIO_MEM, 196 .regshift = 2, 197 }, { 198 }, 199}; 200 201static struct resource orion_uart3_resources[2]; 202 203static struct platform_device orion_uart3 = { 204 .name = "serial8250", 205 .id = 3, 206}; 207 208void __init orion_uart3_init(void __iomem *membase, 209 resource_size_t mapbase, 210 unsigned int irq, 211 struct clk *clk) 212{ 213 uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, 214 membase, mapbase, irq, clk); 215} 216 217/***************************************************************************** 218 * SoC RTC 219 ****************************************************************************/ 220static struct resource orion_rtc_resource[2]; 221 222void __init orion_rtc_init(unsigned long mapbase, 223 unsigned long irq) 224{ 225 orion_rtc_resource[0].start = mapbase; 226 orion_rtc_resource[0].end = mapbase + SZ_32 - 1; 227 orion_rtc_resource[0].flags = IORESOURCE_MEM; 228 orion_rtc_resource[1].start = irq; 229 orion_rtc_resource[1].end = irq; 230 orion_rtc_resource[1].flags = IORESOURCE_IRQ; 231 232 platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2); 233} 234 235/***************************************************************************** 236 * GE 237 ****************************************************************************/ 238static __init void ge_complete( 239 struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, 240 struct resource *orion_ge_resource, unsigned long irq, 241 struct platform_device *orion_ge_shared, 242 struct platform_device *orion_ge_mvmdio, 243 struct mv643xx_eth_platform_data *eth_data, 244 struct platform_device *orion_ge) 245{ 246 orion_ge_resource->start = irq; 247 orion_ge_resource->end = irq; 248 eth_data->shared = orion_ge_shared; 249 orion_ge->dev.platform_data = eth_data; 250 251 platform_device_register(orion_ge_shared); 252 if (orion_ge_mvmdio) 253 platform_device_register(orion_ge_mvmdio); 254 platform_device_register(orion_ge); 255} 256 257/***************************************************************************** 258 * GE00 259 ****************************************************************************/ 260static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; 261 262static struct resource orion_ge00_shared_resources[] = { 263 { 264 .name = "ge00 base", 265 }, 266}; 267 268static struct platform_device orion_ge00_shared = { 269 .name = MV643XX_ETH_SHARED_NAME, 270 .id = 0, 271 .dev = { 272 .platform_data = &orion_ge00_shared_data, 273 }, 274}; 275 276static struct resource orion_ge_mvmdio_resources[] = { 277 { 278 .name = "ge00 mvmdio base", 279 }, { 280 .name = "ge00 mvmdio err irq", 281 }, 282}; 283 284static struct platform_device orion_ge_mvmdio = { 285 .name = "orion-mdio", 286 .id = -1, 287}; 288 289static struct resource orion_ge00_resources[] = { 290 { 291 .name = "ge00 irq", 292 .flags = IORESOURCE_IRQ, 293 }, 294}; 295 296static struct platform_device orion_ge00 = { 297 .name = MV643XX_ETH_NAME, 298 .id = 0, 299 .num_resources = 1, 300 .resource = orion_ge00_resources, 301 .dev = { 302 .coherent_dma_mask = DMA_BIT_MASK(32), 303 }, 304}; 305 306void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, 307 unsigned long mapbase, 308 unsigned long irq, 309 unsigned long irq_err, 310 unsigned int tx_csum_limit) 311{ 312 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, 313 mapbase + 0x2000, SZ_16K - 1, NO_IRQ); 314 fill_resources(&orion_ge_mvmdio, orion_ge_mvmdio_resources, 315 mapbase + 0x2004, 0x84 - 1, irq_err); 316 orion_ge00_shared_data.tx_csum_limit = tx_csum_limit; 317 ge_complete(&orion_ge00_shared_data, 318 orion_ge00_resources, irq, &orion_ge00_shared, 319 &orion_ge_mvmdio, 320 eth_data, &orion_ge00); 321} 322 323/***************************************************************************** 324 * GE01 325 ****************************************************************************/ 326static struct mv643xx_eth_shared_platform_data orion_ge01_shared_data; 327 328static struct resource orion_ge01_shared_resources[] = { 329 { 330 .name = "ge01 base", 331 } 332}; 333 334static struct platform_device orion_ge01_shared = { 335 .name = MV643XX_ETH_SHARED_NAME, 336 .id = 1, 337 .dev = { 338 .platform_data = &orion_ge01_shared_data, 339 }, 340}; 341 342static struct resource orion_ge01_resources[] = { 343 { 344 .name = "ge01 irq", 345 .flags = IORESOURCE_IRQ, 346 }, 347}; 348 349static struct platform_device orion_ge01 = { 350 .name = MV643XX_ETH_NAME, 351 .id = 1, 352 .num_resources = 1, 353 .resource = orion_ge01_resources, 354 .dev = { 355 .coherent_dma_mask = DMA_BIT_MASK(32), 356 }, 357}; 358 359void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, 360 unsigned long mapbase, 361 unsigned long irq, 362 unsigned long irq_err, 363 unsigned int tx_csum_limit) 364{ 365 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, 366 mapbase + 0x2000, SZ_16K - 1, NO_IRQ); 367 orion_ge01_shared_data.tx_csum_limit = tx_csum_limit; 368 ge_complete(&orion_ge01_shared_data, 369 orion_ge01_resources, irq, &orion_ge01_shared, 370 NULL, 371 eth_data, &orion_ge01); 372} 373 374/***************************************************************************** 375 * GE10 376 ****************************************************************************/ 377static struct mv643xx_eth_shared_platform_data orion_ge10_shared_data; 378 379static struct resource orion_ge10_shared_resources[] = { 380 { 381 .name = "ge10 base", 382 } 383}; 384 385static struct platform_device orion_ge10_shared = { 386 .name = MV643XX_ETH_SHARED_NAME, 387 .id = 2, 388 .dev = { 389 .platform_data = &orion_ge10_shared_data, 390 }, 391}; 392 393static struct resource orion_ge10_resources[] = { 394 { 395 .name = "ge10 irq", 396 .flags = IORESOURCE_IRQ, 397 }, 398}; 399 400static struct platform_device orion_ge10 = { 401 .name = MV643XX_ETH_NAME, 402 .id = 2, 403 .num_resources = 1, 404 .resource = orion_ge10_resources, 405 .dev = { 406 .coherent_dma_mask = DMA_BIT_MASK(32), 407 }, 408}; 409 410void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, 411 unsigned long mapbase, 412 unsigned long irq, 413 unsigned long irq_err) 414{ 415 fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, 416 mapbase + 0x2000, SZ_16K - 1, NO_IRQ); 417 ge_complete(&orion_ge10_shared_data, 418 orion_ge10_resources, irq, &orion_ge10_shared, 419 NULL, 420 eth_data, &orion_ge10); 421} 422 423/***************************************************************************** 424 * GE11 425 ****************************************************************************/ 426static struct mv643xx_eth_shared_platform_data orion_ge11_shared_data; 427 428static struct resource orion_ge11_shared_resources[] = { 429 { 430 .name = "ge11 base", 431 }, 432}; 433 434static struct platform_device orion_ge11_shared = { 435 .name = MV643XX_ETH_SHARED_NAME, 436 .id = 3, 437 .dev = { 438 .platform_data = &orion_ge11_shared_data, 439 }, 440}; 441 442static struct resource orion_ge11_resources[] = { 443 { 444 .name = "ge11 irq", 445 .flags = IORESOURCE_IRQ, 446 }, 447}; 448 449static struct platform_device orion_ge11 = { 450 .name = MV643XX_ETH_NAME, 451 .id = 3, 452 .num_resources = 1, 453 .resource = orion_ge11_resources, 454 .dev = { 455 .coherent_dma_mask = DMA_BIT_MASK(32), 456 }, 457}; 458 459void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, 460 unsigned long mapbase, 461 unsigned long irq, 462 unsigned long irq_err) 463{ 464 fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, 465 mapbase + 0x2000, SZ_16K - 1, NO_IRQ); 466 ge_complete(&orion_ge11_shared_data, 467 orion_ge11_resources, irq, &orion_ge11_shared, 468 NULL, 469 eth_data, &orion_ge11); 470} 471 472/***************************************************************************** 473 * Ethernet switch 474 ****************************************************************************/ 475static struct resource orion_switch_resources[] = { 476 { 477 .start = 0, 478 .end = 0, 479 .flags = IORESOURCE_IRQ, 480 }, 481}; 482 483static struct platform_device orion_switch_device = { 484 .name = "dsa", 485 .id = 0, 486 .num_resources = 0, 487 .resource = orion_switch_resources, 488}; 489 490void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq) 491{ 492 int i; 493 494 if (irq != NO_IRQ) { 495 orion_switch_resources[0].start = irq; 496 orion_switch_resources[0].end = irq; 497 orion_switch_device.num_resources = 1; 498 } 499 500 d->netdev = &orion_ge00.dev; 501 for (i = 0; i < d->nr_chips; i++) 502 d->chip[i].host_dev = &orion_ge_mvmdio.dev; 503 orion_switch_device.dev.platform_data = d; 504 505 platform_device_register(&orion_switch_device); 506} 507 508/***************************************************************************** 509 * I2C 510 ****************************************************************************/ 511static struct mv64xxx_i2c_pdata orion_i2c_pdata = { 512 .freq_n = 3, 513 .timeout = 1000, /* Default timeout of 1 second */ 514}; 515 516static struct resource orion_i2c_resources[2]; 517 518static struct platform_device orion_i2c = { 519 .name = MV64XXX_I2C_CTLR_NAME, 520 .id = 0, 521 .dev = { 522 .platform_data = &orion_i2c_pdata, 523 }, 524}; 525 526static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { 527 .freq_n = 3, 528 .timeout = 1000, /* Default timeout of 1 second */ 529}; 530 531static struct resource orion_i2c_1_resources[2]; 532 533static struct platform_device orion_i2c_1 = { 534 .name = MV64XXX_I2C_CTLR_NAME, 535 .id = 1, 536 .dev = { 537 .platform_data = &orion_i2c_1_pdata, 538 }, 539}; 540 541void __init orion_i2c_init(unsigned long mapbase, 542 unsigned long irq, 543 unsigned long freq_m) 544{ 545 orion_i2c_pdata.freq_m = freq_m; 546 fill_resources(&orion_i2c, orion_i2c_resources, mapbase, 547 SZ_32 - 1, irq); 548 platform_device_register(&orion_i2c); 549} 550 551void __init orion_i2c_1_init(unsigned long mapbase, 552 unsigned long irq, 553 unsigned long freq_m) 554{ 555 orion_i2c_1_pdata.freq_m = freq_m; 556 fill_resources(&orion_i2c_1, orion_i2c_1_resources, mapbase, 557 SZ_32 - 1, irq); 558 platform_device_register(&orion_i2c_1); 559} 560 561/***************************************************************************** 562 * SPI 563 ****************************************************************************/ 564static struct resource orion_spi_resources; 565 566static struct platform_device orion_spi = { 567 .name = "orion_spi", 568 .id = 0, 569}; 570 571static struct resource orion_spi_1_resources; 572 573static struct platform_device orion_spi_1 = { 574 .name = "orion_spi", 575 .id = 1, 576}; 577 578/* Note: The SPI silicon core does have interrupts. However the 579 * current Linux software driver does not use interrupts. */ 580 581void __init orion_spi_init(unsigned long mapbase) 582{ 583 fill_resources(&orion_spi, &orion_spi_resources, 584 mapbase, SZ_512 - 1, NO_IRQ); 585 platform_device_register(&orion_spi); 586} 587 588void __init orion_spi_1_init(unsigned long mapbase) 589{ 590 fill_resources(&orion_spi_1, &orion_spi_1_resources, 591 mapbase, SZ_512 - 1, NO_IRQ); 592 platform_device_register(&orion_spi_1); 593} 594 595/***************************************************************************** 596 * Watchdog 597 ****************************************************************************/ 598static struct resource orion_wdt_resource[] = { 599 DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04), 600 DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04), 601}; 602 603static struct platform_device orion_wdt_device = { 604 .name = "orion_wdt", 605 .id = -1, 606 .num_resources = ARRAY_SIZE(orion_wdt_resource), 607 .resource = orion_wdt_resource, 608}; 609 610void __init orion_wdt_init(void) 611{ 612 platform_device_register(&orion_wdt_device); 613} 614 615/***************************************************************************** 616 * XOR 617 ****************************************************************************/ 618static u64 orion_xor_dmamask = DMA_BIT_MASK(32); 619 620/***************************************************************************** 621 * XOR0 622 ****************************************************************************/ 623static struct resource orion_xor0_shared_resources[] = { 624 { 625 .name = "xor 0 low", 626 .flags = IORESOURCE_MEM, 627 }, { 628 .name = "xor 0 high", 629 .flags = IORESOURCE_MEM, 630 }, { 631 .name = "irq channel 0", 632 .flags = IORESOURCE_IRQ, 633 }, { 634 .name = "irq channel 1", 635 .flags = IORESOURCE_IRQ, 636 }, 637}; 638 639static struct mv_xor_channel_data orion_xor0_channels_data[2]; 640 641static struct mv_xor_platform_data orion_xor0_pdata = { 642 .channels = orion_xor0_channels_data, 643}; 644 645static struct platform_device orion_xor0_shared = { 646 .name = MV_XOR_NAME, 647 .id = 0, 648 .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), 649 .resource = orion_xor0_shared_resources, 650 .dev = { 651 .dma_mask = &orion_xor_dmamask, 652 .coherent_dma_mask = DMA_BIT_MASK(64), 653 .platform_data = &orion_xor0_pdata, 654 }, 655}; 656 657void __init orion_xor0_init(unsigned long mapbase_low, 658 unsigned long mapbase_high, 659 unsigned long irq_0, 660 unsigned long irq_1) 661{ 662 orion_xor0_shared_resources[0].start = mapbase_low; 663 orion_xor0_shared_resources[0].end = mapbase_low + 0xff; 664 orion_xor0_shared_resources[1].start = mapbase_high; 665 orion_xor0_shared_resources[1].end = mapbase_high + 0xff; 666 667 orion_xor0_shared_resources[2].start = irq_0; 668 orion_xor0_shared_resources[2].end = irq_0; 669 orion_xor0_shared_resources[3].start = irq_1; 670 orion_xor0_shared_resources[3].end = irq_1; 671 672 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask); 673 dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask); 674 675 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask); 676 dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask); 677 678 platform_device_register(&orion_xor0_shared); 679} 680 681/***************************************************************************** 682 * XOR1 683 ****************************************************************************/ 684static struct resource orion_xor1_shared_resources[] = { 685 { 686 .name = "xor 1 low", 687 .flags = IORESOURCE_MEM, 688 }, { 689 .name = "xor 1 high", 690 .flags = IORESOURCE_MEM, 691 }, { 692 .name = "irq channel 0", 693 .flags = IORESOURCE_IRQ, 694 }, { 695 .name = "irq channel 1", 696 .flags = IORESOURCE_IRQ, 697 }, 698}; 699 700static struct mv_xor_channel_data orion_xor1_channels_data[2]; 701 702static struct mv_xor_platform_data orion_xor1_pdata = { 703 .channels = orion_xor1_channels_data, 704}; 705 706static struct platform_device orion_xor1_shared = { 707 .name = MV_XOR_NAME, 708 .id = 1, 709 .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), 710 .resource = orion_xor1_shared_resources, 711 .dev = { 712 .dma_mask = &orion_xor_dmamask, 713 .coherent_dma_mask = DMA_BIT_MASK(64), 714 .platform_data = &orion_xor1_pdata, 715 }, 716}; 717 718void __init orion_xor1_init(unsigned long mapbase_low, 719 unsigned long mapbase_high, 720 unsigned long irq_0, 721 unsigned long irq_1) 722{ 723 orion_xor1_shared_resources[0].start = mapbase_low; 724 orion_xor1_shared_resources[0].end = mapbase_low + 0xff; 725 orion_xor1_shared_resources[1].start = mapbase_high; 726 orion_xor1_shared_resources[1].end = mapbase_high + 0xff; 727 728 orion_xor1_shared_resources[2].start = irq_0; 729 orion_xor1_shared_resources[2].end = irq_0; 730 orion_xor1_shared_resources[3].start = irq_1; 731 orion_xor1_shared_resources[3].end = irq_1; 732 733 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask); 734 dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask); 735 736 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask); 737 dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask); 738 739 platform_device_register(&orion_xor1_shared); 740} 741 742/***************************************************************************** 743 * EHCI 744 ****************************************************************************/ 745static struct orion_ehci_data orion_ehci_data; 746static u64 ehci_dmamask = DMA_BIT_MASK(32); 747 748 749/***************************************************************************** 750 * EHCI0 751 ****************************************************************************/ 752static struct resource orion_ehci_resources[2]; 753 754static struct platform_device orion_ehci = { 755 .name = "orion-ehci", 756 .id = 0, 757 .dev = { 758 .dma_mask = &ehci_dmamask, 759 .coherent_dma_mask = DMA_BIT_MASK(32), 760 .platform_data = &orion_ehci_data, 761 }, 762}; 763 764void __init orion_ehci_init(unsigned long mapbase, 765 unsigned long irq, 766 enum orion_ehci_phy_ver phy_version) 767{ 768 orion_ehci_data.phy_version = phy_version; 769 fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, 770 irq); 771 772 platform_device_register(&orion_ehci); 773} 774 775/***************************************************************************** 776 * EHCI1 777 ****************************************************************************/ 778static struct resource orion_ehci_1_resources[2]; 779 780static struct platform_device orion_ehci_1 = { 781 .name = "orion-ehci", 782 .id = 1, 783 .dev = { 784 .dma_mask = &ehci_dmamask, 785 .coherent_dma_mask = DMA_BIT_MASK(32), 786 .platform_data = &orion_ehci_data, 787 }, 788}; 789 790void __init orion_ehci_1_init(unsigned long mapbase, 791 unsigned long irq) 792{ 793 fill_resources(&orion_ehci_1, orion_ehci_1_resources, 794 mapbase, SZ_4K - 1, irq); 795 796 platform_device_register(&orion_ehci_1); 797} 798 799/***************************************************************************** 800 * EHCI2 801 ****************************************************************************/ 802static struct resource orion_ehci_2_resources[2]; 803 804static struct platform_device orion_ehci_2 = { 805 .name = "orion-ehci", 806 .id = 2, 807 .dev = { 808 .dma_mask = &ehci_dmamask, 809 .coherent_dma_mask = DMA_BIT_MASK(32), 810 .platform_data = &orion_ehci_data, 811 }, 812}; 813 814void __init orion_ehci_2_init(unsigned long mapbase, 815 unsigned long irq) 816{ 817 fill_resources(&orion_ehci_2, orion_ehci_2_resources, 818 mapbase, SZ_4K - 1, irq); 819 820 platform_device_register(&orion_ehci_2); 821} 822 823/***************************************************************************** 824 * SATA 825 ****************************************************************************/ 826static struct resource orion_sata_resources[2] = { 827 { 828 .name = "sata base", 829 }, { 830 .name = "sata irq", 831 }, 832}; 833 834static struct platform_device orion_sata = { 835 .name = "sata_mv", 836 .id = 0, 837 .dev = { 838 .coherent_dma_mask = DMA_BIT_MASK(32), 839 }, 840}; 841 842void __init orion_sata_init(struct mv_sata_platform_data *sata_data, 843 unsigned long mapbase, 844 unsigned long irq) 845{ 846 orion_sata.dev.platform_data = sata_data; 847 fill_resources(&orion_sata, orion_sata_resources, 848 mapbase, 0x5000 - 1, irq); 849 850 platform_device_register(&orion_sata); 851} 852 853/***************************************************************************** 854 * Cryptographic Engines and Security Accelerator (CESA) 855 ****************************************************************************/ 856static struct resource orion_crypto_resources[] = { 857 { 858 .name = "regs", 859 }, { 860 .name = "crypto interrupt", 861 }, { 862 .name = "sram", 863 .flags = IORESOURCE_MEM, 864 }, 865}; 866 867static struct platform_device orion_crypto = { 868 .name = "mv_crypto", 869 .id = -1, 870}; 871 872void __init orion_crypto_init(unsigned long mapbase, 873 unsigned long srambase, 874 unsigned long sram_size, 875 unsigned long irq) 876{ 877 fill_resources(&orion_crypto, orion_crypto_resources, 878 mapbase, 0xffff, irq); 879 orion_crypto.num_resources = 3; 880 orion_crypto_resources[2].start = srambase; 881 orion_crypto_resources[2].end = srambase + sram_size - 1; 882 883 platform_device_register(&orion_crypto); 884} 885