1/*
2 * Copyright (C) 2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __ASM_ESR_H
19#define __ASM_ESR_H
20
21#define ESR_ELx_EC_UNKNOWN	(0x00)
22#define ESR_ELx_EC_WFx		(0x01)
23/* Unallocated EC: 0x02 */
24#define ESR_ELx_EC_CP15_32	(0x03)
25#define ESR_ELx_EC_CP15_64	(0x04)
26#define ESR_ELx_EC_CP14_MR	(0x05)
27#define ESR_ELx_EC_CP14_LS	(0x06)
28#define ESR_ELx_EC_FP_ASIMD	(0x07)
29#define ESR_ELx_EC_CP10_ID	(0x08)
30/* Unallocated EC: 0x09 - 0x0B */
31#define ESR_ELx_EC_CP14_64	(0x0C)
32/* Unallocated EC: 0x0d */
33#define ESR_ELx_EC_ILL		(0x0E)
34/* Unallocated EC: 0x0F - 0x10 */
35#define ESR_ELx_EC_SVC32	(0x11)
36#define ESR_ELx_EC_HVC32	(0x12)
37#define ESR_ELx_EC_SMC32	(0x13)
38/* Unallocated EC: 0x14 */
39#define ESR_ELx_EC_SVC64	(0x15)
40#define ESR_ELx_EC_HVC64	(0x16)
41#define ESR_ELx_EC_SMC64	(0x17)
42#define ESR_ELx_EC_SYS64	(0x18)
43/* Unallocated EC: 0x19 - 0x1E */
44#define ESR_ELx_EC_IMP_DEF	(0x1f)
45#define ESR_ELx_EC_IABT_LOW	(0x20)
46#define ESR_ELx_EC_IABT_CUR	(0x21)
47#define ESR_ELx_EC_PC_ALIGN	(0x22)
48/* Unallocated EC: 0x23 */
49#define ESR_ELx_EC_DABT_LOW	(0x24)
50#define ESR_ELx_EC_DABT_CUR	(0x25)
51#define ESR_ELx_EC_SP_ALIGN	(0x26)
52/* Unallocated EC: 0x27 */
53#define ESR_ELx_EC_FP_EXC32	(0x28)
54/* Unallocated EC: 0x29 - 0x2B */
55#define ESR_ELx_EC_FP_EXC64	(0x2C)
56/* Unallocated EC: 0x2D - 0x2E */
57#define ESR_ELx_EC_SERROR	(0x2F)
58#define ESR_ELx_EC_BREAKPT_LOW	(0x30)
59#define ESR_ELx_EC_BREAKPT_CUR	(0x31)
60#define ESR_ELx_EC_SOFTSTP_LOW	(0x32)
61#define ESR_ELx_EC_SOFTSTP_CUR	(0x33)
62#define ESR_ELx_EC_WATCHPT_LOW	(0x34)
63#define ESR_ELx_EC_WATCHPT_CUR	(0x35)
64/* Unallocated EC: 0x36 - 0x37 */
65#define ESR_ELx_EC_BKPT32	(0x38)
66/* Unallocated EC: 0x39 */
67#define ESR_ELx_EC_VECTOR32	(0x3A)
68/* Unallocted EC: 0x3B */
69#define ESR_ELx_EC_BRK64	(0x3C)
70/* Unallocated EC: 0x3D - 0x3F */
71#define ESR_ELx_EC_MAX		(0x3F)
72
73#define ESR_ELx_EC_SHIFT	(26)
74#define ESR_ELx_EC_MASK		(UL(0x3F) << ESR_ELx_EC_SHIFT)
75
76#define ESR_ELx_IL		(UL(1) << 25)
77#define ESR_ELx_ISS_MASK	(ESR_ELx_IL - 1)
78#define ESR_ELx_ISV		(UL(1) << 24)
79#define ESR_ELx_SAS_SHIFT	(22)
80#define ESR_ELx_SAS		(UL(3) << ESR_ELx_SAS_SHIFT)
81#define ESR_ELx_SSE		(UL(1) << 21)
82#define ESR_ELx_SRT_SHIFT	(16)
83#define ESR_ELx_SRT_MASK	(UL(0x1F) << ESR_ELx_SRT_SHIFT)
84#define ESR_ELx_SF 		(UL(1) << 15)
85#define ESR_ELx_AR 		(UL(1) << 14)
86#define ESR_ELx_EA 		(UL(1) << 9)
87#define ESR_ELx_CM 		(UL(1) << 8)
88#define ESR_ELx_S1PTW 		(UL(1) << 7)
89#define ESR_ELx_WNR		(UL(1) << 6)
90#define ESR_ELx_FSC		(0x3F)
91#define ESR_ELx_FSC_TYPE	(0x3C)
92#define ESR_ELx_FSC_EXTABT	(0x10)
93#define ESR_ELx_FSC_ACCESS	(0x08)
94#define ESR_ELx_FSC_FAULT	(0x04)
95#define ESR_ELx_FSC_PERM	(0x0C)
96#define ESR_ELx_CV		(UL(1) << 24)
97#define ESR_ELx_COND_SHIFT	(20)
98#define ESR_ELx_COND_MASK	(UL(0xF) << ESR_ELx_COND_SHIFT)
99#define ESR_ELx_WFx_ISS_WFE	(UL(1) << 0)
100#define ESR_ELx_xVC_IMM_MASK	((1UL << 16) - 1)
101
102#ifndef __ASSEMBLY__
103#include <asm/types.h>
104
105const char *esr_get_class_string(u32 esr);
106#endif /* __ASSEMBLY */
107
108#endif /* __ASM_ESR_H */
109