1/*
2 * ARMv8 single-step debug support and mdscr context switching.
3 *
4 * Copyright (C) 2012 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author: Will Deacon <will.deacon@arm.com>
19 */
20
21#include <linux/cpu.h>
22#include <linux/debugfs.h>
23#include <linux/hardirq.h>
24#include <linux/init.h>
25#include <linux/ptrace.h>
26#include <linux/stat.h>
27#include <linux/uaccess.h>
28
29#include <asm/debug-monitors.h>
30#include <asm/cputype.h>
31#include <asm/system_misc.h>
32
33/* Determine debug architecture. */
34u8 debug_monitors_arch(void)
35{
36	return read_cpuid(ID_AA64DFR0_EL1) & 0xf;
37}
38
39/*
40 * MDSCR access routines.
41 */
42static void mdscr_write(u32 mdscr)
43{
44	unsigned long flags;
45	local_dbg_save(flags);
46	asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
47	local_dbg_restore(flags);
48}
49
50static u32 mdscr_read(void)
51{
52	u32 mdscr;
53	asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
54	return mdscr;
55}
56
57/*
58 * Allow root to disable self-hosted debug from userspace.
59 * This is useful if you want to connect an external JTAG debugger.
60 */
61static u32 debug_enabled = 1;
62
63static int create_debug_debugfs_entry(void)
64{
65	debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
66	return 0;
67}
68fs_initcall(create_debug_debugfs_entry);
69
70static int __init early_debug_disable(char *buf)
71{
72	debug_enabled = 0;
73	return 0;
74}
75
76early_param("nodebugmon", early_debug_disable);
77
78/*
79 * Keep track of debug users on each core.
80 * The ref counts are per-cpu so we use a local_t type.
81 */
82static DEFINE_PER_CPU(int, mde_ref_count);
83static DEFINE_PER_CPU(int, kde_ref_count);
84
85void enable_debug_monitors(enum debug_el el)
86{
87	u32 mdscr, enable = 0;
88
89	WARN_ON(preemptible());
90
91	if (this_cpu_inc_return(mde_ref_count) == 1)
92		enable = DBG_MDSCR_MDE;
93
94	if (el == DBG_ACTIVE_EL1 &&
95	    this_cpu_inc_return(kde_ref_count) == 1)
96		enable |= DBG_MDSCR_KDE;
97
98	if (enable && debug_enabled) {
99		mdscr = mdscr_read();
100		mdscr |= enable;
101		mdscr_write(mdscr);
102	}
103}
104
105void disable_debug_monitors(enum debug_el el)
106{
107	u32 mdscr, disable = 0;
108
109	WARN_ON(preemptible());
110
111	if (this_cpu_dec_return(mde_ref_count) == 0)
112		disable = ~DBG_MDSCR_MDE;
113
114	if (el == DBG_ACTIVE_EL1 &&
115	    this_cpu_dec_return(kde_ref_count) == 0)
116		disable &= ~DBG_MDSCR_KDE;
117
118	if (disable) {
119		mdscr = mdscr_read();
120		mdscr &= disable;
121		mdscr_write(mdscr);
122	}
123}
124
125/*
126 * OS lock clearing.
127 */
128static void clear_os_lock(void *unused)
129{
130	asm volatile("msr oslar_el1, %0" : : "r" (0));
131}
132
133static int os_lock_notify(struct notifier_block *self,
134				    unsigned long action, void *data)
135{
136	int cpu = (unsigned long)data;
137	if (action == CPU_ONLINE)
138		smp_call_function_single(cpu, clear_os_lock, NULL, 1);
139	return NOTIFY_OK;
140}
141
142static struct notifier_block os_lock_nb = {
143	.notifier_call = os_lock_notify,
144};
145
146static int debug_monitors_init(void)
147{
148	cpu_notifier_register_begin();
149
150	/* Clear the OS lock. */
151	on_each_cpu(clear_os_lock, NULL, 1);
152	isb();
153	local_dbg_enable();
154
155	/* Register hotplug handler. */
156	__register_cpu_notifier(&os_lock_nb);
157
158	cpu_notifier_register_done();
159	return 0;
160}
161postcore_initcall(debug_monitors_init);
162
163/*
164 * Single step API and exception handling.
165 */
166static void set_regs_spsr_ss(struct pt_regs *regs)
167{
168	unsigned long spsr;
169
170	spsr = regs->pstate;
171	spsr &= ~DBG_SPSR_SS;
172	spsr |= DBG_SPSR_SS;
173	regs->pstate = spsr;
174}
175
176static void clear_regs_spsr_ss(struct pt_regs *regs)
177{
178	unsigned long spsr;
179
180	spsr = regs->pstate;
181	spsr &= ~DBG_SPSR_SS;
182	regs->pstate = spsr;
183}
184
185/* EL1 Single Step Handler hooks */
186static LIST_HEAD(step_hook);
187static DEFINE_SPINLOCK(step_hook_lock);
188
189void register_step_hook(struct step_hook *hook)
190{
191	spin_lock(&step_hook_lock);
192	list_add_rcu(&hook->node, &step_hook);
193	spin_unlock(&step_hook_lock);
194}
195
196void unregister_step_hook(struct step_hook *hook)
197{
198	spin_lock(&step_hook_lock);
199	list_del_rcu(&hook->node);
200	spin_unlock(&step_hook_lock);
201	synchronize_rcu();
202}
203
204/*
205 * Call registered single step handers
206 * There is no Syndrome info to check for determining the handler.
207 * So we call all the registered handlers, until the right handler is
208 * found which returns zero.
209 */
210static int call_step_hook(struct pt_regs *regs, unsigned int esr)
211{
212	struct step_hook *hook;
213	int retval = DBG_HOOK_ERROR;
214
215	rcu_read_lock();
216
217	list_for_each_entry_rcu(hook, &step_hook, node)	{
218		retval = hook->fn(regs, esr);
219		if (retval == DBG_HOOK_HANDLED)
220			break;
221	}
222
223	rcu_read_unlock();
224
225	return retval;
226}
227
228static int single_step_handler(unsigned long addr, unsigned int esr,
229			       struct pt_regs *regs)
230{
231	siginfo_t info;
232
233	/*
234	 * If we are stepping a pending breakpoint, call the hw_breakpoint
235	 * handler first.
236	 */
237	if (!reinstall_suspended_bps(regs))
238		return 0;
239
240	if (user_mode(regs)) {
241		info.si_signo = SIGTRAP;
242		info.si_errno = 0;
243		info.si_code  = TRAP_HWBKPT;
244		info.si_addr  = (void __user *)instruction_pointer(regs);
245		force_sig_info(SIGTRAP, &info, current);
246
247		/*
248		 * ptrace will disable single step unless explicitly
249		 * asked to re-enable it. For other clients, it makes
250		 * sense to leave it enabled (i.e. rewind the controls
251		 * to the active-not-pending state).
252		 */
253		user_rewind_single_step(current);
254	} else {
255		if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
256			return 0;
257
258		pr_warning("Unexpected kernel single-step exception at EL1\n");
259		/*
260		 * Re-enable stepping since we know that we will be
261		 * returning to regs.
262		 */
263		set_regs_spsr_ss(regs);
264	}
265
266	return 0;
267}
268
269/*
270 * Breakpoint handler is re-entrant as another breakpoint can
271 * hit within breakpoint handler, especically in kprobes.
272 * Use reader/writer locks instead of plain spinlock.
273 */
274static LIST_HEAD(break_hook);
275static DEFINE_SPINLOCK(break_hook_lock);
276
277void register_break_hook(struct break_hook *hook)
278{
279	spin_lock(&break_hook_lock);
280	list_add_rcu(&hook->node, &break_hook);
281	spin_unlock(&break_hook_lock);
282}
283
284void unregister_break_hook(struct break_hook *hook)
285{
286	spin_lock(&break_hook_lock);
287	list_del_rcu(&hook->node);
288	spin_unlock(&break_hook_lock);
289	synchronize_rcu();
290}
291
292static int call_break_hook(struct pt_regs *regs, unsigned int esr)
293{
294	struct break_hook *hook;
295	int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
296
297	rcu_read_lock();
298	list_for_each_entry_rcu(hook, &break_hook, node)
299		if ((esr & hook->esr_mask) == hook->esr_val)
300			fn = hook->fn;
301	rcu_read_unlock();
302
303	return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
304}
305
306static int brk_handler(unsigned long addr, unsigned int esr,
307		       struct pt_regs *regs)
308{
309	siginfo_t info;
310
311	if (user_mode(regs)) {
312		info = (siginfo_t) {
313			.si_signo = SIGTRAP,
314			.si_errno = 0,
315			.si_code  = TRAP_BRKPT,
316			.si_addr  = (void __user *)instruction_pointer(regs),
317		};
318
319		force_sig_info(SIGTRAP, &info, current);
320	} else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
321		pr_warning("Unexpected kernel BRK exception at EL1\n");
322		return -EFAULT;
323	}
324
325	return 0;
326}
327
328int aarch32_break_handler(struct pt_regs *regs)
329{
330	siginfo_t info;
331	u32 arm_instr;
332	u16 thumb_instr;
333	bool bp = false;
334	void __user *pc = (void __user *)instruction_pointer(regs);
335
336	if (!compat_user_mode(regs))
337		return -EFAULT;
338
339	if (compat_thumb_mode(regs)) {
340		/* get 16-bit Thumb instruction */
341		get_user(thumb_instr, (u16 __user *)pc);
342		thumb_instr = le16_to_cpu(thumb_instr);
343		if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
344			/* get second half of 32-bit Thumb-2 instruction */
345			get_user(thumb_instr, (u16 __user *)(pc + 2));
346			thumb_instr = le16_to_cpu(thumb_instr);
347			bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
348		} else {
349			bp = thumb_instr == AARCH32_BREAK_THUMB;
350		}
351	} else {
352		/* 32-bit ARM instruction */
353		get_user(arm_instr, (u32 __user *)pc);
354		arm_instr = le32_to_cpu(arm_instr);
355		bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
356	}
357
358	if (!bp)
359		return -EFAULT;
360
361	info = (siginfo_t) {
362		.si_signo = SIGTRAP,
363		.si_errno = 0,
364		.si_code  = TRAP_BRKPT,
365		.si_addr  = pc,
366	};
367
368	force_sig_info(SIGTRAP, &info, current);
369	return 0;
370}
371
372static int __init debug_traps_init(void)
373{
374	hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
375			      TRAP_HWBKPT, "single-step handler");
376	hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
377			      TRAP_BRKPT, "ptrace BRK handler");
378	return 0;
379}
380arch_initcall(debug_traps_init);
381
382/* Re-enable single step for syscall restarting. */
383void user_rewind_single_step(struct task_struct *task)
384{
385	/*
386	 * If single step is active for this thread, then set SPSR.SS
387	 * to 1 to avoid returning to the active-pending state.
388	 */
389	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
390		set_regs_spsr_ss(task_pt_regs(task));
391}
392
393void user_fastforward_single_step(struct task_struct *task)
394{
395	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
396		clear_regs_spsr_ss(task_pt_regs(task));
397}
398
399/* Kernel API */
400void kernel_enable_single_step(struct pt_regs *regs)
401{
402	WARN_ON(!irqs_disabled());
403	set_regs_spsr_ss(regs);
404	mdscr_write(mdscr_read() | DBG_MDSCR_SS);
405	enable_debug_monitors(DBG_ACTIVE_EL1);
406}
407
408void kernel_disable_single_step(void)
409{
410	WARN_ON(!irqs_disabled());
411	mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
412	disable_debug_monitors(DBG_ACTIVE_EL1);
413}
414
415int kernel_active_single_step(void)
416{
417	WARN_ON(!irqs_disabled());
418	return mdscr_read() & DBG_MDSCR_SS;
419}
420
421/* ptrace API */
422void user_enable_single_step(struct task_struct *task)
423{
424	set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
425	set_regs_spsr_ss(task_pt_regs(task));
426}
427
428void user_disable_single_step(struct task_struct *task)
429{
430	clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
431}
432