1/*
2 * Machine check exception header file.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 *
18 * Copyright 2013 IBM Corporation
19 * Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
20 */
21
22#ifndef __ASM_PPC64_MCE_H__
23#define __ASM_PPC64_MCE_H__
24
25#include <linux/bitops.h>
26
27/*
28 * Machine Check bits on power7 and power8
29 */
30#define P7_SRR1_MC_LOADSTORE(srr1)	((srr1) & PPC_BIT(42)) /* P8 too */
31
32/* SRR1 bits for machine check (On Power7 and Power8) */
33#define P7_SRR1_MC_IFETCH(srr1)	((srr1) & PPC_BITMASK(43, 45)) /* P8 too */
34
35#define P7_SRR1_MC_IFETCH_UE		(0x1 << PPC_BITLSHIFT(45)) /* P8 too */
36#define P7_SRR1_MC_IFETCH_SLB_PARITY	(0x2 << PPC_BITLSHIFT(45)) /* P8 too */
37#define P7_SRR1_MC_IFETCH_SLB_MULTIHIT	(0x3 << PPC_BITLSHIFT(45)) /* P8 too */
38#define P7_SRR1_MC_IFETCH_SLB_BOTH	(0x4 << PPC_BITLSHIFT(45))
39#define P7_SRR1_MC_IFETCH_TLB_MULTIHIT	(0x5 << PPC_BITLSHIFT(45)) /* P8 too */
40#define P7_SRR1_MC_IFETCH_UE_TLB_RELOAD	(0x6 << PPC_BITLSHIFT(45)) /* P8 too */
41#define P7_SRR1_MC_IFETCH_UE_IFU_INTERNAL	(0x7 << PPC_BITLSHIFT(45))
42
43/* SRR1 bits for machine check (On Power8) */
44#define P8_SRR1_MC_IFETCH_ERAT_MULTIHIT	(0x4 << PPC_BITLSHIFT(45))
45
46/* DSISR bits for machine check (On Power7 and Power8) */
47#define P7_DSISR_MC_UE			(PPC_BIT(48))	/* P8 too */
48#define P7_DSISR_MC_UE_TABLEWALK	(PPC_BIT(49))	/* P8 too */
49#define P7_DSISR_MC_ERAT_MULTIHIT	(PPC_BIT(52))	/* P8 too */
50#define P7_DSISR_MC_TLB_MULTIHIT_MFTLB	(PPC_BIT(53))	/* P8 too */
51#define P7_DSISR_MC_SLB_PARITY_MFSLB	(PPC_BIT(55))	/* P8 too */
52#define P7_DSISR_MC_SLB_MULTIHIT	(PPC_BIT(56))	/* P8 too */
53#define P7_DSISR_MC_SLB_MULTIHIT_PARITY	(PPC_BIT(57))	/* P8 too */
54
55/*
56 * DSISR bits for machine check (Power8) in addition to above.
57 * Secondary DERAT Multihit
58 */
59#define P8_DSISR_MC_ERAT_MULTIHIT_SEC	(PPC_BIT(54))
60
61/* SLB error bits */
62#define P7_DSISR_MC_SLB_ERRORS		(P7_DSISR_MC_ERAT_MULTIHIT | \
63					 P7_DSISR_MC_SLB_PARITY_MFSLB | \
64					 P7_DSISR_MC_SLB_MULTIHIT | \
65					 P7_DSISR_MC_SLB_MULTIHIT_PARITY)
66
67#define P8_DSISR_MC_SLB_ERRORS		(P7_DSISR_MC_SLB_ERRORS | \
68					 P8_DSISR_MC_ERAT_MULTIHIT_SEC)
69enum MCE_Version {
70	MCE_V1 = 1,
71};
72
73enum MCE_Severity {
74	MCE_SEV_NO_ERROR = 0,
75	MCE_SEV_WARNING = 1,
76	MCE_SEV_ERROR_SYNC = 2,
77	MCE_SEV_FATAL = 3,
78};
79
80enum MCE_Disposition {
81	MCE_DISPOSITION_RECOVERED = 0,
82	MCE_DISPOSITION_NOT_RECOVERED = 1,
83};
84
85enum MCE_Initiator {
86	MCE_INITIATOR_UNKNOWN = 0,
87	MCE_INITIATOR_CPU = 1,
88};
89
90enum MCE_ErrorType {
91	MCE_ERROR_TYPE_UNKNOWN = 0,
92	MCE_ERROR_TYPE_UE = 1,
93	MCE_ERROR_TYPE_SLB = 2,
94	MCE_ERROR_TYPE_ERAT = 3,
95	MCE_ERROR_TYPE_TLB = 4,
96};
97
98enum MCE_UeErrorType {
99	MCE_UE_ERROR_INDETERMINATE = 0,
100	MCE_UE_ERROR_IFETCH = 1,
101	MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH = 2,
102	MCE_UE_ERROR_LOAD_STORE = 3,
103	MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 4,
104};
105
106enum MCE_SlbErrorType {
107	MCE_SLB_ERROR_INDETERMINATE = 0,
108	MCE_SLB_ERROR_PARITY = 1,
109	MCE_SLB_ERROR_MULTIHIT = 2,
110};
111
112enum MCE_EratErrorType {
113	MCE_ERAT_ERROR_INDETERMINATE = 0,
114	MCE_ERAT_ERROR_PARITY = 1,
115	MCE_ERAT_ERROR_MULTIHIT = 2,
116};
117
118enum MCE_TlbErrorType {
119	MCE_TLB_ERROR_INDETERMINATE = 0,
120	MCE_TLB_ERROR_PARITY = 1,
121	MCE_TLB_ERROR_MULTIHIT = 2,
122};
123
124struct machine_check_event {
125	enum MCE_Version	version:8;	/* 0x00 */
126	uint8_t			in_use;		/* 0x01 */
127	enum MCE_Severity	severity:8;	/* 0x02 */
128	enum MCE_Initiator	initiator:8;	/* 0x03 */
129	enum MCE_ErrorType	error_type:8;	/* 0x04 */
130	enum MCE_Disposition	disposition:8;	/* 0x05 */
131	uint8_t			reserved_1[2];	/* 0x06 */
132	uint64_t		gpr3;		/* 0x08 */
133	uint64_t		srr0;		/* 0x10 */
134	uint64_t		srr1;		/* 0x18 */
135	union {					/* 0x20 */
136		struct {
137			enum MCE_UeErrorType ue_error_type:8;
138			uint8_t		effective_address_provided;
139			uint8_t		physical_address_provided;
140			uint8_t		reserved_1[5];
141			uint64_t	effective_address;
142			uint64_t	physical_address;
143			uint8_t		reserved_2[8];
144		} ue_error;
145
146		struct {
147			enum MCE_SlbErrorType slb_error_type:8;
148			uint8_t		effective_address_provided;
149			uint8_t		reserved_1[6];
150			uint64_t	effective_address;
151			uint8_t		reserved_2[16];
152		} slb_error;
153
154		struct {
155			enum MCE_EratErrorType erat_error_type:8;
156			uint8_t		effective_address_provided;
157			uint8_t		reserved_1[6];
158			uint64_t	effective_address;
159			uint8_t		reserved_2[16];
160		} erat_error;
161
162		struct {
163			enum MCE_TlbErrorType tlb_error_type:8;
164			uint8_t		effective_address_provided;
165			uint8_t		reserved_1[6];
166			uint64_t	effective_address;
167			uint8_t		reserved_2[16];
168		} tlb_error;
169	} u;
170};
171
172struct mce_error_info {
173	enum MCE_ErrorType error_type:8;
174	union {
175		enum MCE_UeErrorType ue_error_type:8;
176		enum MCE_SlbErrorType slb_error_type:8;
177		enum MCE_EratErrorType erat_error_type:8;
178		enum MCE_TlbErrorType tlb_error_type:8;
179	} u;
180	uint8_t		reserved[2];
181};
182
183#define MAX_MC_EVT	100
184
185/* Release flags for get_mce_event() */
186#define MCE_EVENT_RELEASE	true
187#define MCE_EVENT_DONTRELEASE	false
188
189extern void save_mce_event(struct pt_regs *regs, long handled,
190			   struct mce_error_info *mce_err, uint64_t nip,
191			   uint64_t addr);
192extern int get_mce_event(struct machine_check_event *mce, bool release);
193extern void release_mce_event(void);
194extern void machine_check_queue_event(void);
195extern void machine_check_print_event_info(struct machine_check_event *evt);
196extern uint64_t get_mce_fault_addr(struct machine_check_event *evt);
197
198#endif /* __ASM_PPC64_MCE_H__ */
199