1/*
2 * arch/powerpc/platforms/embedded6xx/flipper-pic.c
3 *
4 * Nintendo GameCube/Wii "Flipper" interrupt controller support.
5 * Copyright (C) 2004-2009 The GameCube Linux Team
6 * Copyright (C) 2007,2008,2009 Albert Herranz
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 */
14#define DRV_MODULE_NAME "flipper-pic"
15#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/irq.h>
20#include <linux/of.h>
21#include <linux/of_address.h>
22#include <asm/io.h>
23
24#include "flipper-pic.h"
25
26#define FLIPPER_NR_IRQS		32
27
28/*
29 * Each interrupt has a corresponding bit in both
30 * the Interrupt Cause (ICR) and Interrupt Mask (IMR) registers.
31 *
32 * Enabling/disabling an interrupt line involves setting/clearing
33 * the corresponding bit in IMR.
34 * Except for the RSW interrupt, all interrupts get deasserted automatically
35 * when the source deasserts the interrupt.
36 */
37#define FLIPPER_ICR		0x00
38#define FLIPPER_ICR_RSS		(1<<16) /* reset switch state */
39
40#define FLIPPER_IMR		0x04
41
42#define FLIPPER_RESET		0x24
43
44
45/*
46 * IRQ chip hooks.
47 *
48 */
49
50static void flipper_pic_mask_and_ack(struct irq_data *d)
51{
52	int irq = irqd_to_hwirq(d);
53	void __iomem *io_base = irq_data_get_irq_chip_data(d);
54	u32 mask = 1 << irq;
55
56	clrbits32(io_base + FLIPPER_IMR, mask);
57	/* this is at least needed for RSW */
58	out_be32(io_base + FLIPPER_ICR, mask);
59}
60
61static void flipper_pic_ack(struct irq_data *d)
62{
63	int irq = irqd_to_hwirq(d);
64	void __iomem *io_base = irq_data_get_irq_chip_data(d);
65
66	/* this is at least needed for RSW */
67	out_be32(io_base + FLIPPER_ICR, 1 << irq);
68}
69
70static void flipper_pic_mask(struct irq_data *d)
71{
72	int irq = irqd_to_hwirq(d);
73	void __iomem *io_base = irq_data_get_irq_chip_data(d);
74
75	clrbits32(io_base + FLIPPER_IMR, 1 << irq);
76}
77
78static void flipper_pic_unmask(struct irq_data *d)
79{
80	int irq = irqd_to_hwirq(d);
81	void __iomem *io_base = irq_data_get_irq_chip_data(d);
82
83	setbits32(io_base + FLIPPER_IMR, 1 << irq);
84}
85
86
87static struct irq_chip flipper_pic = {
88	.name		= "flipper-pic",
89	.irq_ack	= flipper_pic_ack,
90	.irq_mask_ack	= flipper_pic_mask_and_ack,
91	.irq_mask	= flipper_pic_mask,
92	.irq_unmask	= flipper_pic_unmask,
93};
94
95/*
96 * IRQ host hooks.
97 *
98 */
99
100static struct irq_domain *flipper_irq_host;
101
102static int flipper_pic_map(struct irq_domain *h, unsigned int virq,
103			   irq_hw_number_t hwirq)
104{
105	irq_set_chip_data(virq, h->host_data);
106	irq_set_status_flags(virq, IRQ_LEVEL);
107	irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq);
108	return 0;
109}
110
111static int flipper_pic_match(struct irq_domain *h, struct device_node *np)
112{
113	return 1;
114}
115
116
117static const struct irq_domain_ops flipper_irq_domain_ops = {
118	.map = flipper_pic_map,
119	.match = flipper_pic_match,
120};
121
122/*
123 * Platform hooks.
124 *
125 */
126
127static void __flipper_quiesce(void __iomem *io_base)
128{
129	/* mask and ack all IRQs */
130	out_be32(io_base + FLIPPER_IMR, 0x00000000);
131	out_be32(io_base + FLIPPER_ICR, 0xffffffff);
132}
133
134struct irq_domain * __init flipper_pic_init(struct device_node *np)
135{
136	struct device_node *pi;
137	struct irq_domain *irq_domain = NULL;
138	struct resource res;
139	void __iomem *io_base;
140	int retval;
141
142	pi = of_get_parent(np);
143	if (!pi) {
144		pr_err("no parent found\n");
145		goto out;
146	}
147	if (!of_device_is_compatible(pi, "nintendo,flipper-pi")) {
148		pr_err("unexpected parent compatible\n");
149		goto out;
150	}
151
152	retval = of_address_to_resource(pi, 0, &res);
153	if (retval) {
154		pr_err("no io memory range found\n");
155		goto out;
156	}
157	io_base = ioremap(res.start, resource_size(&res));
158
159	pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base);
160
161	__flipper_quiesce(io_base);
162
163	irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS,
164				  &flipper_irq_domain_ops, io_base);
165	if (!irq_domain) {
166		pr_err("failed to allocate irq_domain\n");
167		return NULL;
168	}
169
170out:
171	return irq_domain;
172}
173
174unsigned int flipper_pic_get_irq(void)
175{
176	void __iomem *io_base = flipper_irq_host->host_data;
177	int irq;
178	u32 irq_status;
179
180	irq_status = in_be32(io_base + FLIPPER_ICR) &
181		     in_be32(io_base + FLIPPER_IMR);
182	if (irq_status == 0)
183		return NO_IRQ;	/* no more IRQs pending */
184
185	irq = __ffs(irq_status);
186	return irq_linear_revmap(flipper_irq_host, irq);
187}
188
189/*
190 * Probe function.
191 *
192 */
193
194void __init flipper_pic_probe(void)
195{
196	struct device_node *np;
197
198	np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-pic");
199	BUG_ON(!np);
200
201	flipper_irq_host = flipper_pic_init(np);
202	BUG_ON(!flipper_irq_host);
203
204	irq_set_default_host(flipper_irq_host);
205
206	of_node_put(np);
207}
208
209/*
210 * Misc functions related to the flipper chipset.
211 *
212 */
213
214/**
215 * flipper_quiesce() - quiesce flipper irq controller
216 *
217 * Mask and ack all interrupt sources.
218 *
219 */
220void flipper_quiesce(void)
221{
222	void __iomem *io_base = flipper_irq_host->host_data;
223
224	__flipper_quiesce(io_base);
225}
226
227/*
228 * Resets the platform.
229 */
230void flipper_platform_reset(void)
231{
232	void __iomem *io_base;
233
234	if (flipper_irq_host && flipper_irq_host->host_data) {
235		io_base = flipper_irq_host->host_data;
236		out_8(io_base + FLIPPER_RESET, 0x00);
237	}
238}
239
240/*
241 * Returns non-zero if the reset button is pressed.
242 */
243int flipper_is_reset_button_pressed(void)
244{
245	void __iomem *io_base;
246	u32 icr;
247
248	if (flipper_irq_host && flipper_irq_host->host_data) {
249		io_base = flipper_irq_host->host_data;
250		icr = in_be32(io_base + FLIPPER_ICR);
251		return !(icr & FLIPPER_ICR_RSS);
252	}
253	return 0;
254}
255
256