1/****************************************************************************** 2 * x86_emulate.h 3 * 4 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. 5 * 6 * Copyright (c) 2005 Keir Fraser 7 * 8 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 9 */ 10 11#ifndef _ASM_X86_KVM_X86_EMULATE_H 12#define _ASM_X86_KVM_X86_EMULATE_H 13 14#include <asm/desc_defs.h> 15 16struct x86_emulate_ctxt; 17enum x86_intercept; 18enum x86_intercept_stage; 19 20struct x86_exception { 21 u8 vector; 22 bool error_code_valid; 23 u16 error_code; 24 bool nested_page_fault; 25 u64 address; /* cr2 or nested page fault gpa */ 26}; 27 28/* 29 * This struct is used to carry enough information from the instruction 30 * decoder to main KVM so that a decision can be made whether the 31 * instruction needs to be intercepted or not. 32 */ 33struct x86_instruction_info { 34 u8 intercept; /* which intercept */ 35 u8 rep_prefix; /* rep prefix? */ 36 u8 modrm_mod; /* mod part of modrm */ 37 u8 modrm_reg; /* index of register used */ 38 u8 modrm_rm; /* rm part of modrm */ 39 u64 src_val; /* value of source operand */ 40 u64 dst_val; /* value of destination operand */ 41 u8 src_bytes; /* size of source operand */ 42 u8 dst_bytes; /* size of destination operand */ 43 u8 ad_bytes; /* size of src/dst address */ 44 u64 next_rip; /* rip following the instruction */ 45}; 46 47/* 48 * x86_emulate_ops: 49 * 50 * These operations represent the instruction emulator's interface to memory. 51 * There are two categories of operation: those that act on ordinary memory 52 * regions (*_std), and those that act on memory regions known to require 53 * special treatment or emulation (*_emulated). 54 * 55 * The emulator assumes that an instruction accesses only one 'emulated memory' 56 * location, that this location is the given linear faulting address (cr2), and 57 * that this is one of the instruction's data operands. Instruction fetches and 58 * stack operations are assumed never to access emulated memory. The emulator 59 * automatically deduces which operand of a string-move operation is accessing 60 * emulated memory, and assumes that the other operand accesses normal memory. 61 * 62 * NOTES: 63 * 1. The emulator isn't very smart about emulated vs. standard memory. 64 * 'Emulated memory' access addresses should be checked for sanity. 65 * 'Normal memory' accesses may fault, and the caller must arrange to 66 * detect and handle reentrancy into the emulator via recursive faults. 67 * Accesses may be unaligned and may cross page boundaries. 68 * 2. If the access fails (cannot emulate, or a standard access faults) then 69 * it is up to the memop to propagate the fault to the guest VM via 70 * some out-of-band mechanism, unknown to the emulator. The memop signals 71 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will 72 * then immediately bail. 73 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only 74 * cmpxchg8b_emulated need support 8-byte accesses. 75 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. 76 */ 77/* Access completed successfully: continue emulation as normal. */ 78#define X86EMUL_CONTINUE 0 79/* Access is unhandleable: bail from emulation and return error to caller. */ 80#define X86EMUL_UNHANDLEABLE 1 81/* Terminate emulation but return success to the caller. */ 82#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ 83#define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */ 84#define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ 85#define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ 86#define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ 87 88struct x86_emulate_ops { 89 /* 90 * read_gpr: read a general purpose register (rax - r15) 91 * 92 * @reg: gpr number. 93 */ 94 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg); 95 /* 96 * write_gpr: write a general purpose register (rax - r15) 97 * 98 * @reg: gpr number. 99 * @val: value to write. 100 */ 101 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val); 102 /* 103 * read_std: Read bytes of standard (non-emulated/special) memory. 104 * Used for descriptor reading. 105 * @addr: [IN ] Linear address from which to read. 106 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 107 * @bytes: [IN ] Number of bytes to read from memory. 108 */ 109 int (*read_std)(struct x86_emulate_ctxt *ctxt, 110 unsigned long addr, void *val, 111 unsigned int bytes, 112 struct x86_exception *fault); 113 114 /* 115 * write_std: Write bytes of standard (non-emulated/special) memory. 116 * Used for descriptor writing. 117 * @addr: [IN ] Linear address to which to write. 118 * @val: [OUT] Value write to memory, zero-extended to 'u_long'. 119 * @bytes: [IN ] Number of bytes to write to memory. 120 */ 121 int (*write_std)(struct x86_emulate_ctxt *ctxt, 122 unsigned long addr, void *val, unsigned int bytes, 123 struct x86_exception *fault); 124 /* 125 * fetch: Read bytes of standard (non-emulated/special) memory. 126 * Used for instruction fetch. 127 * @addr: [IN ] Linear address from which to read. 128 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 129 * @bytes: [IN ] Number of bytes to read from memory. 130 */ 131 int (*fetch)(struct x86_emulate_ctxt *ctxt, 132 unsigned long addr, void *val, unsigned int bytes, 133 struct x86_exception *fault); 134 135 /* 136 * read_emulated: Read bytes from emulated/special memory area. 137 * @addr: [IN ] Linear address from which to read. 138 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 139 * @bytes: [IN ] Number of bytes to read from memory. 140 */ 141 int (*read_emulated)(struct x86_emulate_ctxt *ctxt, 142 unsigned long addr, void *val, unsigned int bytes, 143 struct x86_exception *fault); 144 145 /* 146 * write_emulated: Write bytes to emulated/special memory area. 147 * @addr: [IN ] Linear address to which to write. 148 * @val: [IN ] Value to write to memory (low-order bytes used as 149 * required). 150 * @bytes: [IN ] Number of bytes to write to memory. 151 */ 152 int (*write_emulated)(struct x86_emulate_ctxt *ctxt, 153 unsigned long addr, const void *val, 154 unsigned int bytes, 155 struct x86_exception *fault); 156 157 /* 158 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an 159 * emulated/special memory area. 160 * @addr: [IN ] Linear address to access. 161 * @old: [IN ] Value expected to be current at @addr. 162 * @new: [IN ] Value to write to @addr. 163 * @bytes: [IN ] Number of bytes to access using CMPXCHG. 164 */ 165 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt, 166 unsigned long addr, 167 const void *old, 168 const void *new, 169 unsigned int bytes, 170 struct x86_exception *fault); 171 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); 172 173 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt, 174 int size, unsigned short port, void *val, 175 unsigned int count); 176 177 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt, 178 int size, unsigned short port, const void *val, 179 unsigned int count); 180 181 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector, 182 struct desc_struct *desc, u32 *base3, int seg); 183 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector, 184 struct desc_struct *desc, u32 base3, int seg); 185 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt, 186 int seg); 187 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 188 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 189 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 190 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 191 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); 192 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); 193 int (*cpl)(struct x86_emulate_ctxt *ctxt); 194 int (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest); 195 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); 196 int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data); 197 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 198 int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc); 199 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata); 200 void (*halt)(struct x86_emulate_ctxt *ctxt); 201 void (*wbinvd)(struct x86_emulate_ctxt *ctxt); 202 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt); 203 void (*get_fpu)(struct x86_emulate_ctxt *ctxt); /* disables preempt */ 204 void (*put_fpu)(struct x86_emulate_ctxt *ctxt); /* reenables preempt */ 205 int (*intercept)(struct x86_emulate_ctxt *ctxt, 206 struct x86_instruction_info *info, 207 enum x86_intercept_stage stage); 208 209 void (*get_cpuid)(struct x86_emulate_ctxt *ctxt, 210 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx); 211 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked); 212}; 213 214typedef u32 __attribute__((vector_size(16))) sse128_t; 215 216/* Type, address-of, and value of an instruction's operand. */ 217struct operand { 218 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type; 219 unsigned int bytes; 220 unsigned int count; 221 union { 222 unsigned long orig_val; 223 u64 orig_val64; 224 }; 225 union { 226 unsigned long *reg; 227 struct segmented_address { 228 ulong ea; 229 unsigned seg; 230 } mem; 231 unsigned xmm; 232 unsigned mm; 233 } addr; 234 union { 235 unsigned long val; 236 u64 val64; 237 char valptr[sizeof(sse128_t)]; 238 sse128_t vec_val; 239 u64 mm_val; 240 void *data; 241 }; 242}; 243 244struct fetch_cache { 245 u8 data[15]; 246 u8 *ptr; 247 u8 *end; 248}; 249 250struct read_cache { 251 u8 data[1024]; 252 unsigned long pos; 253 unsigned long end; 254}; 255 256/* Execution mode, passed to the emulator. */ 257enum x86emul_mode { 258 X86EMUL_MODE_REAL, /* Real mode. */ 259 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */ 260 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */ 261 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */ 262 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */ 263}; 264 265struct x86_emulate_ctxt { 266 const struct x86_emulate_ops *ops; 267 268 /* Register state before/after emulation. */ 269 unsigned long eflags; 270 unsigned long eip; /* eip before instruction emulation */ 271 /* Emulated execution mode, represented by an X86EMUL_MODE value. */ 272 enum x86emul_mode mode; 273 274 /* interruptibility state, as a result of execution of STI or MOV SS */ 275 int interruptibility; 276 277 bool guest_mode; /* guest running a nested guest */ 278 bool perm_ok; /* do not check permissions if true */ 279 bool ud; /* inject an #UD if host doesn't support insn */ 280 281 bool have_exception; 282 struct x86_exception exception; 283 284 /* 285 * decode cache 286 */ 287 288 /* current opcode length in bytes */ 289 u8 opcode_len; 290 u8 b; 291 u8 intercept; 292 u8 op_bytes; 293 u8 ad_bytes; 294 struct operand src; 295 struct operand src2; 296 struct operand dst; 297 int (*execute)(struct x86_emulate_ctxt *ctxt); 298 int (*check_perm)(struct x86_emulate_ctxt *ctxt); 299 /* 300 * The following six fields are cleared together, 301 * the rest are initialized unconditionally in x86_decode_insn 302 * or elsewhere 303 */ 304 bool rip_relative; 305 u8 rex_prefix; 306 u8 lock_prefix; 307 u8 rep_prefix; 308 /* bitmaps of registers in _regs[] that can be read */ 309 u32 regs_valid; 310 /* bitmaps of registers in _regs[] that have been written */ 311 u32 regs_dirty; 312 /* modrm */ 313 u8 modrm; 314 u8 modrm_mod; 315 u8 modrm_reg; 316 u8 modrm_rm; 317 u8 modrm_seg; 318 u8 seg_override; 319 u64 d; 320 unsigned long _eip; 321 struct operand memop; 322 /* Fields above regs are cleared together. */ 323 unsigned long _regs[NR_VCPU_REGS]; 324 struct operand *memopp; 325 struct fetch_cache fetch; 326 struct read_cache io_read; 327 struct read_cache mem_read; 328}; 329 330/* Repeat String Operation Prefix */ 331#define REPE_PREFIX 0xf3 332#define REPNE_PREFIX 0xf2 333 334/* CPUID vendors */ 335#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 336#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 337#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 338 339#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 340#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 341#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 342 343#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 344#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e 345#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 346 347enum x86_intercept_stage { 348 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ 349 X86_ICPT_PRE_EXCEPT, 350 X86_ICPT_POST_EXCEPT, 351 X86_ICPT_POST_MEMACCESS, 352}; 353 354enum x86_intercept { 355 x86_intercept_none, 356 x86_intercept_cr_read, 357 x86_intercept_cr_write, 358 x86_intercept_clts, 359 x86_intercept_lmsw, 360 x86_intercept_smsw, 361 x86_intercept_dr_read, 362 x86_intercept_dr_write, 363 x86_intercept_lidt, 364 x86_intercept_sidt, 365 x86_intercept_lgdt, 366 x86_intercept_sgdt, 367 x86_intercept_lldt, 368 x86_intercept_sldt, 369 x86_intercept_ltr, 370 x86_intercept_str, 371 x86_intercept_rdtsc, 372 x86_intercept_rdpmc, 373 x86_intercept_pushf, 374 x86_intercept_popf, 375 x86_intercept_cpuid, 376 x86_intercept_rsm, 377 x86_intercept_iret, 378 x86_intercept_intn, 379 x86_intercept_invd, 380 x86_intercept_pause, 381 x86_intercept_hlt, 382 x86_intercept_invlpg, 383 x86_intercept_invlpga, 384 x86_intercept_vmrun, 385 x86_intercept_vmload, 386 x86_intercept_vmsave, 387 x86_intercept_vmmcall, 388 x86_intercept_stgi, 389 x86_intercept_clgi, 390 x86_intercept_skinit, 391 x86_intercept_rdtscp, 392 x86_intercept_icebp, 393 x86_intercept_wbinvd, 394 x86_intercept_monitor, 395 x86_intercept_mwait, 396 x86_intercept_rdmsr, 397 x86_intercept_wrmsr, 398 x86_intercept_in, 399 x86_intercept_ins, 400 x86_intercept_out, 401 x86_intercept_outs, 402 403 nr_x86_intercepts 404}; 405 406/* Host execution mode. */ 407#if defined(CONFIG_X86_32) 408#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32 409#elif defined(CONFIG_X86_64) 410#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64 411#endif 412 413int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len); 414bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt); 415#define EMULATION_FAILED -1 416#define EMULATION_OK 0 417#define EMULATION_RESTART 1 418#define EMULATION_INTERCEPTED 2 419void init_decode_cache(struct x86_emulate_ctxt *ctxt); 420int x86_emulate_insn(struct x86_emulate_ctxt *ctxt); 421int emulator_task_switch(struct x86_emulate_ctxt *ctxt, 422 u16 tss_selector, int idt_index, int reason, 423 bool has_error_code, u32 error_code); 424int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq); 425void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt); 426void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt); 427 428#endif /* _ASM_X86_KVM_X86_EMULATE_H */ 429