1/* 2 * Copyright (C) 2005, 2006 IBM Corporation 3 * Copyright (C) 2014, 2015 Intel Corporation 4 * 5 * Authors: 6 * Leendert van Doorn <leendert@watson.ibm.com> 7 * Kylene Hall <kjhall@us.ibm.com> 8 * 9 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 10 * 11 * Device driver for TCG/TCPA TPM (trusted platform module). 12 * Specifications at www.trustedcomputinggroup.org 13 * 14 * This device driver implements the TPM interface as defined in 15 * the TCG TPM Interface Spec version 1.2, revision 1.0. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation, version 2 of the 20 * License. 21 */ 22#include <linux/init.h> 23#include <linux/module.h> 24#include <linux/moduleparam.h> 25#include <linux/pnp.h> 26#include <linux/slab.h> 27#include <linux/interrupt.h> 28#include <linux/wait.h> 29#include <linux/acpi.h> 30#include <linux/freezer.h> 31#include <acpi/actbl2.h> 32#include "tpm.h" 33 34enum tis_access { 35 TPM_ACCESS_VALID = 0x80, 36 TPM_ACCESS_ACTIVE_LOCALITY = 0x20, 37 TPM_ACCESS_REQUEST_PENDING = 0x04, 38 TPM_ACCESS_REQUEST_USE = 0x02, 39}; 40 41enum tis_status { 42 TPM_STS_VALID = 0x80, 43 TPM_STS_COMMAND_READY = 0x40, 44 TPM_STS_GO = 0x20, 45 TPM_STS_DATA_AVAIL = 0x10, 46 TPM_STS_DATA_EXPECT = 0x08, 47}; 48 49enum tis_int_flags { 50 TPM_GLOBAL_INT_ENABLE = 0x80000000, 51 TPM_INTF_BURST_COUNT_STATIC = 0x100, 52 TPM_INTF_CMD_READY_INT = 0x080, 53 TPM_INTF_INT_EDGE_FALLING = 0x040, 54 TPM_INTF_INT_EDGE_RISING = 0x020, 55 TPM_INTF_INT_LEVEL_LOW = 0x010, 56 TPM_INTF_INT_LEVEL_HIGH = 0x008, 57 TPM_INTF_LOCALITY_CHANGE_INT = 0x004, 58 TPM_INTF_STS_VALID_INT = 0x002, 59 TPM_INTF_DATA_AVAIL_INT = 0x001, 60}; 61 62enum tis_defaults { 63 TIS_MEM_BASE = 0xFED40000, 64 TIS_MEM_LEN = 0x5000, 65 TIS_SHORT_TIMEOUT = 750, /* ms */ 66 TIS_LONG_TIMEOUT = 2000, /* 2 sec */ 67}; 68 69struct tpm_info { 70 unsigned long start; 71 unsigned long len; 72 unsigned int irq; 73}; 74 75static struct tpm_info tis_default_info = { 76 .start = TIS_MEM_BASE, 77 .len = TIS_MEM_LEN, 78 .irq = 0, 79}; 80 81/* Some timeout values are needed before it is known whether the chip is 82 * TPM 1.0 or TPM 2.0. 83 */ 84#define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A) 85#define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B) 86#define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C) 87#define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D) 88 89#define TPM_ACCESS(l) (0x0000 | ((l) << 12)) 90#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) 91#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12)) 92#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12)) 93#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) 94#define TPM_STS(l) (0x0018 | ((l) << 12)) 95#define TPM_STS3(l) (0x001b | ((l) << 12)) 96#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) 97 98#define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) 99#define TPM_RID(l) (0x0F04 | ((l) << 12)) 100 101struct priv_data { 102 bool irq_tested; 103}; 104 105#if defined(CONFIG_PNP) && defined(CONFIG_ACPI) 106static int has_hid(struct acpi_device *dev, const char *hid) 107{ 108 struct acpi_hardware_id *id; 109 110 list_for_each_entry(id, &dev->pnp.ids, list) 111 if (!strcmp(hid, id->id)) 112 return 1; 113 114 return 0; 115} 116 117static inline int is_itpm(struct acpi_device *dev) 118{ 119 return has_hid(dev, "INTC0102"); 120} 121 122static inline int is_fifo(struct acpi_device *dev) 123{ 124 struct acpi_table_tpm2 *tbl; 125 acpi_status st; 126 127 /* TPM 1.2 FIFO */ 128 if (!has_hid(dev, "MSFT0101")) 129 return 1; 130 131 st = acpi_get_table(ACPI_SIG_TPM2, 1, 132 (struct acpi_table_header **) &tbl); 133 if (ACPI_FAILURE(st)) { 134 dev_err(&dev->dev, "failed to get TPM2 ACPI table\n"); 135 return 0; 136 } 137 138 if (le32_to_cpu(tbl->start_method) != TPM2_START_FIFO) 139 return 0; 140 141 /* TPM 2.0 FIFO */ 142 return 1; 143} 144#else 145static inline int is_itpm(struct acpi_device *dev) 146{ 147 return 0; 148} 149 150static inline int is_fifo(struct acpi_device *dev) 151{ 152 return 1; 153} 154#endif 155 156/* Before we attempt to access the TPM we must see that the valid bit is set. 157 * The specification says that this bit is 0 at reset and remains 0 until the 158 * 'TPM has gone through its self test and initialization and has established 159 * correct values in the other bits.' */ 160static int wait_startup(struct tpm_chip *chip, int l) 161{ 162 unsigned long stop = jiffies + chip->vendor.timeout_a; 163 do { 164 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 165 TPM_ACCESS_VALID) 166 return 0; 167 msleep(TPM_TIMEOUT); 168 } while (time_before(jiffies, stop)); 169 return -1; 170} 171 172static int check_locality(struct tpm_chip *chip, int l) 173{ 174 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 175 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 176 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) 177 return chip->vendor.locality = l; 178 179 return -1; 180} 181 182static void release_locality(struct tpm_chip *chip, int l, int force) 183{ 184 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 185 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == 186 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) 187 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY, 188 chip->vendor.iobase + TPM_ACCESS(l)); 189} 190 191static int request_locality(struct tpm_chip *chip, int l) 192{ 193 unsigned long stop, timeout; 194 long rc; 195 196 if (check_locality(chip, l) >= 0) 197 return l; 198 199 iowrite8(TPM_ACCESS_REQUEST_USE, 200 chip->vendor.iobase + TPM_ACCESS(l)); 201 202 stop = jiffies + chip->vendor.timeout_a; 203 204 if (chip->vendor.irq) { 205again: 206 timeout = stop - jiffies; 207 if ((long)timeout <= 0) 208 return -1; 209 rc = wait_event_interruptible_timeout(chip->vendor.int_queue, 210 (check_locality 211 (chip, l) >= 0), 212 timeout); 213 if (rc > 0) 214 return l; 215 if (rc == -ERESTARTSYS && freezing(current)) { 216 clear_thread_flag(TIF_SIGPENDING); 217 goto again; 218 } 219 } else { 220 /* wait for burstcount */ 221 do { 222 if (check_locality(chip, l) >= 0) 223 return l; 224 msleep(TPM_TIMEOUT); 225 } 226 while (time_before(jiffies, stop)); 227 } 228 return -1; 229} 230 231static u8 tpm_tis_status(struct tpm_chip *chip) 232{ 233 return ioread8(chip->vendor.iobase + 234 TPM_STS(chip->vendor.locality)); 235} 236 237static void tpm_tis_ready(struct tpm_chip *chip) 238{ 239 /* this causes the current command to be aborted */ 240 iowrite8(TPM_STS_COMMAND_READY, 241 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 242} 243 244static int get_burstcount(struct tpm_chip *chip) 245{ 246 unsigned long stop; 247 int burstcnt; 248 249 /* wait for burstcount */ 250 /* which timeout value, spec has 2 answers (c & d) */ 251 stop = jiffies + chip->vendor.timeout_d; 252 do { 253 burstcnt = ioread8(chip->vendor.iobase + 254 TPM_STS(chip->vendor.locality) + 1); 255 burstcnt += ioread8(chip->vendor.iobase + 256 TPM_STS(chip->vendor.locality) + 257 2) << 8; 258 if (burstcnt) 259 return burstcnt; 260 msleep(TPM_TIMEOUT); 261 } while (time_before(jiffies, stop)); 262 return -EBUSY; 263} 264 265static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 266{ 267 int size = 0, burstcnt; 268 while (size < count && 269 wait_for_tpm_stat(chip, 270 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 271 chip->vendor.timeout_c, 272 &chip->vendor.read_queue, true) 273 == 0) { 274 burstcnt = get_burstcount(chip); 275 for (; burstcnt > 0 && size < count; burstcnt--) 276 buf[size++] = ioread8(chip->vendor.iobase + 277 TPM_DATA_FIFO(chip->vendor. 278 locality)); 279 } 280 return size; 281} 282 283static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 284{ 285 int size = 0; 286 int expected, status; 287 288 if (count < TPM_HEADER_SIZE) { 289 size = -EIO; 290 goto out; 291 } 292 293 /* read first 10 bytes, including tag, paramsize, and result */ 294 if ((size = 295 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) { 296 dev_err(chip->pdev, "Unable to read header\n"); 297 goto out; 298 } 299 300 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 301 if (expected > count) { 302 size = -EIO; 303 goto out; 304 } 305 306 if ((size += 307 recv_data(chip, &buf[TPM_HEADER_SIZE], 308 expected - TPM_HEADER_SIZE)) < expected) { 309 dev_err(chip->pdev, "Unable to read remainder of result\n"); 310 size = -ETIME; 311 goto out; 312 } 313 314 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 315 &chip->vendor.int_queue, false); 316 status = tpm_tis_status(chip); 317 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 318 dev_err(chip->pdev, "Error left over data\n"); 319 size = -EIO; 320 goto out; 321 } 322 323out: 324 tpm_tis_ready(chip); 325 release_locality(chip, chip->vendor.locality, 0); 326 return size; 327} 328 329static bool itpm; 330module_param(itpm, bool, 0444); 331MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)"); 332 333/* 334 * If interrupts are used (signaled by an irq set in the vendor structure) 335 * tpm.c can skip polling for the data to be available as the interrupt is 336 * waited for here 337 */ 338static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) 339{ 340 int rc, status, burstcnt; 341 size_t count = 0; 342 343 if (request_locality(chip, 0) < 0) 344 return -EBUSY; 345 346 status = tpm_tis_status(chip); 347 if ((status & TPM_STS_COMMAND_READY) == 0) { 348 tpm_tis_ready(chip); 349 if (wait_for_tpm_stat 350 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b, 351 &chip->vendor.int_queue, false) < 0) { 352 rc = -ETIME; 353 goto out_err; 354 } 355 } 356 357 while (count < len - 1) { 358 burstcnt = get_burstcount(chip); 359 for (; burstcnt > 0 && count < len - 1; burstcnt--) { 360 iowrite8(buf[count], chip->vendor.iobase + 361 TPM_DATA_FIFO(chip->vendor.locality)); 362 count++; 363 } 364 365 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 366 &chip->vendor.int_queue, false); 367 status = tpm_tis_status(chip); 368 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 369 rc = -EIO; 370 goto out_err; 371 } 372 } 373 374 /* write last byte */ 375 iowrite8(buf[count], 376 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality)); 377 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 378 &chip->vendor.int_queue, false); 379 status = tpm_tis_status(chip); 380 if ((status & TPM_STS_DATA_EXPECT) != 0) { 381 rc = -EIO; 382 goto out_err; 383 } 384 385 return 0; 386 387out_err: 388 tpm_tis_ready(chip); 389 release_locality(chip, chip->vendor.locality, 0); 390 return rc; 391} 392 393static void disable_interrupts(struct tpm_chip *chip) 394{ 395 u32 intmask; 396 397 intmask = 398 ioread32(chip->vendor.iobase + 399 TPM_INT_ENABLE(chip->vendor.locality)); 400 intmask &= ~TPM_GLOBAL_INT_ENABLE; 401 iowrite32(intmask, 402 chip->vendor.iobase + 403 TPM_INT_ENABLE(chip->vendor.locality)); 404 free_irq(chip->vendor.irq, chip); 405 chip->vendor.irq = 0; 406} 407 408/* 409 * If interrupts are used (signaled by an irq set in the vendor structure) 410 * tpm.c can skip polling for the data to be available as the interrupt is 411 * waited for here 412 */ 413static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len) 414{ 415 int rc; 416 u32 ordinal; 417 unsigned long dur; 418 419 rc = tpm_tis_send_data(chip, buf, len); 420 if (rc < 0) 421 return rc; 422 423 /* go and do it */ 424 iowrite8(TPM_STS_GO, 425 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 426 427 if (chip->vendor.irq) { 428 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 429 430 if (chip->flags & TPM_CHIP_FLAG_TPM2) 431 dur = tpm2_calc_ordinal_duration(chip, ordinal); 432 else 433 dur = tpm_calc_ordinal_duration(chip, ordinal); 434 435 if (wait_for_tpm_stat 436 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 437 &chip->vendor.read_queue, false) < 0) { 438 rc = -ETIME; 439 goto out_err; 440 } 441 } 442 return len; 443out_err: 444 tpm_tis_ready(chip); 445 release_locality(chip, chip->vendor.locality, 0); 446 return rc; 447} 448 449static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 450{ 451 int rc, irq; 452 struct priv_data *priv = chip->vendor.priv; 453 454 if (!chip->vendor.irq || priv->irq_tested) 455 return tpm_tis_send_main(chip, buf, len); 456 457 /* Verify receipt of the expected IRQ */ 458 irq = chip->vendor.irq; 459 chip->vendor.irq = 0; 460 rc = tpm_tis_send_main(chip, buf, len); 461 chip->vendor.irq = irq; 462 if (!priv->irq_tested) 463 msleep(1); 464 if (!priv->irq_tested) { 465 disable_interrupts(chip); 466 dev_err(chip->pdev, 467 FW_BUG "TPM interrupt not working, polling instead\n"); 468 } 469 priv->irq_tested = true; 470 return rc; 471} 472 473struct tis_vendor_timeout_override { 474 u32 did_vid; 475 unsigned long timeout_us[4]; 476}; 477 478static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 479 /* Atmel 3204 */ 480 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 481 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 482}; 483 484static bool tpm_tis_update_timeouts(struct tpm_chip *chip, 485 unsigned long *timeout_cap) 486{ 487 int i; 488 u32 did_vid; 489 490 did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); 491 492 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 493 if (vendor_timeout_overrides[i].did_vid != did_vid) 494 continue; 495 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 496 sizeof(vendor_timeout_overrides[i].timeout_us)); 497 return true; 498 } 499 500 return false; 501} 502 503/* 504 * Early probing for iTPM with STS_DATA_EXPECT flaw. 505 * Try sending command without itpm flag set and if that 506 * fails, repeat with itpm flag set. 507 */ 508static int probe_itpm(struct tpm_chip *chip) 509{ 510 int rc = 0; 511 u8 cmd_getticks[] = { 512 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 513 0x00, 0x00, 0x00, 0xf1 514 }; 515 size_t len = sizeof(cmd_getticks); 516 bool rem_itpm = itpm; 517 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0)); 518 519 /* probe only iTPMS */ 520 if (vendor != TPM_VID_INTEL) 521 return 0; 522 523 itpm = false; 524 525 rc = tpm_tis_send_data(chip, cmd_getticks, len); 526 if (rc == 0) 527 goto out; 528 529 tpm_tis_ready(chip); 530 release_locality(chip, chip->vendor.locality, 0); 531 532 itpm = true; 533 534 rc = tpm_tis_send_data(chip, cmd_getticks, len); 535 if (rc == 0) { 536 dev_info(chip->pdev, "Detected an iTPM.\n"); 537 rc = 1; 538 } else 539 rc = -EFAULT; 540 541out: 542 itpm = rem_itpm; 543 tpm_tis_ready(chip); 544 release_locality(chip, chip->vendor.locality, 0); 545 546 return rc; 547} 548 549static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 550{ 551 switch (chip->vendor.manufacturer_id) { 552 case TPM_VID_WINBOND: 553 return ((status == TPM_STS_VALID) || 554 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 555 case TPM_VID_STM: 556 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 557 default: 558 return (status == TPM_STS_COMMAND_READY); 559 } 560} 561 562static const struct tpm_class_ops tpm_tis = { 563 .status = tpm_tis_status, 564 .recv = tpm_tis_recv, 565 .send = tpm_tis_send, 566 .cancel = tpm_tis_ready, 567 .update_timeouts = tpm_tis_update_timeouts, 568 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 569 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 570 .req_canceled = tpm_tis_req_canceled, 571}; 572 573static irqreturn_t tis_int_probe(int irq, void *dev_id) 574{ 575 struct tpm_chip *chip = dev_id; 576 u32 interrupt; 577 578 interrupt = ioread32(chip->vendor.iobase + 579 TPM_INT_STATUS(chip->vendor.locality)); 580 581 if (interrupt == 0) 582 return IRQ_NONE; 583 584 chip->vendor.probed_irq = irq; 585 586 /* Clear interrupts handled with TPM_EOI */ 587 iowrite32(interrupt, 588 chip->vendor.iobase + 589 TPM_INT_STATUS(chip->vendor.locality)); 590 return IRQ_HANDLED; 591} 592 593static irqreturn_t tis_int_handler(int dummy, void *dev_id) 594{ 595 struct tpm_chip *chip = dev_id; 596 u32 interrupt; 597 int i; 598 599 interrupt = ioread32(chip->vendor.iobase + 600 TPM_INT_STATUS(chip->vendor.locality)); 601 602 if (interrupt == 0) 603 return IRQ_NONE; 604 605 ((struct priv_data *)chip->vendor.priv)->irq_tested = true; 606 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 607 wake_up_interruptible(&chip->vendor.read_queue); 608 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 609 for (i = 0; i < 5; i++) 610 if (check_locality(chip, i) >= 0) 611 break; 612 if (interrupt & 613 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 614 TPM_INTF_CMD_READY_INT)) 615 wake_up_interruptible(&chip->vendor.int_queue); 616 617 /* Clear interrupts handled with TPM_EOI */ 618 iowrite32(interrupt, 619 chip->vendor.iobase + 620 TPM_INT_STATUS(chip->vendor.locality)); 621 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality)); 622 return IRQ_HANDLED; 623} 624 625static bool interrupts = true; 626module_param(interrupts, bool, 0444); 627MODULE_PARM_DESC(interrupts, "Enable interrupts"); 628 629static void tpm_tis_remove(struct tpm_chip *chip) 630{ 631 if (chip->flags & TPM_CHIP_FLAG_TPM2) 632 tpm2_shutdown(chip, TPM2_SU_CLEAR); 633 634 iowrite32(~TPM_GLOBAL_INT_ENABLE & 635 ioread32(chip->vendor.iobase + 636 TPM_INT_ENABLE(chip->vendor. 637 locality)), 638 chip->vendor.iobase + 639 TPM_INT_ENABLE(chip->vendor.locality)); 640 release_locality(chip, chip->vendor.locality, 1); 641} 642 643static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info, 644 acpi_handle acpi_dev_handle) 645{ 646 u32 vendor, intfcaps, intmask; 647 int rc, i, irq_s, irq_e, probe; 648 struct tpm_chip *chip; 649 struct priv_data *priv; 650 651 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL); 652 if (priv == NULL) 653 return -ENOMEM; 654 655 chip = tpmm_chip_alloc(dev, &tpm_tis); 656 if (IS_ERR(chip)) 657 return PTR_ERR(chip); 658 659 chip->vendor.priv = priv; 660#ifdef CONFIG_ACPI 661 chip->acpi_dev_handle = acpi_dev_handle; 662#endif 663 664 chip->vendor.iobase = devm_ioremap(dev, tpm_info->start, tpm_info->len); 665 if (!chip->vendor.iobase) 666 return -EIO; 667 668 /* Maximum timeouts */ 669 chip->vendor.timeout_a = TIS_TIMEOUT_A_MAX; 670 chip->vendor.timeout_b = TIS_TIMEOUT_B_MAX; 671 chip->vendor.timeout_c = TIS_TIMEOUT_C_MAX; 672 chip->vendor.timeout_d = TIS_TIMEOUT_D_MAX; 673 674 if (wait_startup(chip, 0) != 0) { 675 rc = -ENODEV; 676 goto out_err; 677 } 678 679 if (request_locality(chip, 0) != 0) { 680 rc = -ENODEV; 681 goto out_err; 682 } 683 684 rc = tpm2_probe(chip); 685 if (rc) 686 goto out_err; 687 688 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); 689 chip->vendor.manufacturer_id = vendor; 690 691 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", 692 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 693 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0))); 694 695 if (!itpm) { 696 probe = probe_itpm(chip); 697 if (probe < 0) { 698 rc = -ENODEV; 699 goto out_err; 700 } 701 itpm = !!probe; 702 } 703 704 if (itpm) 705 dev_info(dev, "Intel iTPM workaround enabled\n"); 706 707 708 /* Figure out the capabilities */ 709 intfcaps = 710 ioread32(chip->vendor.iobase + 711 TPM_INTF_CAPS(chip->vendor.locality)); 712 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 713 intfcaps); 714 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 715 dev_dbg(dev, "\tBurst Count Static\n"); 716 if (intfcaps & TPM_INTF_CMD_READY_INT) 717 dev_dbg(dev, "\tCommand Ready Int Support\n"); 718 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 719 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 720 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 721 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 722 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 723 dev_dbg(dev, "\tInterrupt Level Low\n"); 724 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 725 dev_dbg(dev, "\tInterrupt Level High\n"); 726 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 727 dev_dbg(dev, "\tLocality Change Int Support\n"); 728 if (intfcaps & TPM_INTF_STS_VALID_INT) 729 dev_dbg(dev, "\tSts Valid Int Support\n"); 730 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 731 dev_dbg(dev, "\tData Avail Int Support\n"); 732 733 /* INTERRUPT Setup */ 734 init_waitqueue_head(&chip->vendor.read_queue); 735 init_waitqueue_head(&chip->vendor.int_queue); 736 737 intmask = 738 ioread32(chip->vendor.iobase + 739 TPM_INT_ENABLE(chip->vendor.locality)); 740 741 intmask |= TPM_INTF_CMD_READY_INT 742 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 743 | TPM_INTF_STS_VALID_INT; 744 745 iowrite32(intmask, 746 chip->vendor.iobase + 747 TPM_INT_ENABLE(chip->vendor.locality)); 748 if (interrupts) 749 chip->vendor.irq = tpm_info->irq; 750 if (interrupts && !chip->vendor.irq) { 751 irq_s = 752 ioread8(chip->vendor.iobase + 753 TPM_INT_VECTOR(chip->vendor.locality)); 754 if (irq_s) { 755 irq_e = irq_s; 756 } else { 757 irq_s = 3; 758 irq_e = 15; 759 } 760 761 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) { 762 iowrite8(i, chip->vendor.iobase + 763 TPM_INT_VECTOR(chip->vendor.locality)); 764 if (devm_request_irq 765 (dev, i, tis_int_probe, IRQF_SHARED, 766 chip->devname, chip) != 0) { 767 dev_info(chip->pdev, 768 "Unable to request irq: %d for probe\n", 769 i); 770 continue; 771 } 772 773 /* Clear all existing */ 774 iowrite32(ioread32 775 (chip->vendor.iobase + 776 TPM_INT_STATUS(chip->vendor.locality)), 777 chip->vendor.iobase + 778 TPM_INT_STATUS(chip->vendor.locality)); 779 780 /* Turn on */ 781 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 782 chip->vendor.iobase + 783 TPM_INT_ENABLE(chip->vendor.locality)); 784 785 chip->vendor.probed_irq = 0; 786 787 /* Generate Interrupts */ 788 if (chip->flags & TPM_CHIP_FLAG_TPM2) 789 tpm2_gen_interrupt(chip); 790 else 791 tpm_gen_interrupt(chip); 792 793 chip->vendor.irq = chip->vendor.probed_irq; 794 795 /* free_irq will call into tis_int_probe; 796 clear all irqs we haven't seen while doing 797 tpm_gen_interrupt */ 798 iowrite32(ioread32 799 (chip->vendor.iobase + 800 TPM_INT_STATUS(chip->vendor.locality)), 801 chip->vendor.iobase + 802 TPM_INT_STATUS(chip->vendor.locality)); 803 804 /* Turn off */ 805 iowrite32(intmask, 806 chip->vendor.iobase + 807 TPM_INT_ENABLE(chip->vendor.locality)); 808 } 809 } 810 if (chip->vendor.irq) { 811 iowrite8(chip->vendor.irq, 812 chip->vendor.iobase + 813 TPM_INT_VECTOR(chip->vendor.locality)); 814 if (devm_request_irq 815 (dev, chip->vendor.irq, tis_int_handler, IRQF_SHARED, 816 chip->devname, chip) != 0) { 817 dev_info(chip->pdev, 818 "Unable to request irq: %d for use\n", 819 chip->vendor.irq); 820 chip->vendor.irq = 0; 821 } else { 822 /* Clear all existing */ 823 iowrite32(ioread32 824 (chip->vendor.iobase + 825 TPM_INT_STATUS(chip->vendor.locality)), 826 chip->vendor.iobase + 827 TPM_INT_STATUS(chip->vendor.locality)); 828 829 /* Turn on */ 830 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 831 chip->vendor.iobase + 832 TPM_INT_ENABLE(chip->vendor.locality)); 833 } 834 } 835 836 if (chip->flags & TPM_CHIP_FLAG_TPM2) { 837 chip->vendor.timeout_a = msecs_to_jiffies(TPM2_TIMEOUT_A); 838 chip->vendor.timeout_b = msecs_to_jiffies(TPM2_TIMEOUT_B); 839 chip->vendor.timeout_c = msecs_to_jiffies(TPM2_TIMEOUT_C); 840 chip->vendor.timeout_d = msecs_to_jiffies(TPM2_TIMEOUT_D); 841 chip->vendor.duration[TPM_SHORT] = 842 msecs_to_jiffies(TPM2_DURATION_SHORT); 843 chip->vendor.duration[TPM_MEDIUM] = 844 msecs_to_jiffies(TPM2_DURATION_MEDIUM); 845 chip->vendor.duration[TPM_LONG] = 846 msecs_to_jiffies(TPM2_DURATION_LONG); 847 848 rc = tpm2_do_selftest(chip); 849 if (rc == TPM2_RC_INITIALIZE) { 850 dev_warn(dev, "Firmware has not started TPM\n"); 851 rc = tpm2_startup(chip, TPM2_SU_CLEAR); 852 if (!rc) 853 rc = tpm2_do_selftest(chip); 854 } 855 856 if (rc) { 857 dev_err(dev, "TPM self test failed\n"); 858 if (rc > 0) 859 rc = -ENODEV; 860 goto out_err; 861 } 862 } else { 863 if (tpm_get_timeouts(chip)) { 864 dev_err(dev, "Could not get TPM timeouts and durations\n"); 865 rc = -ENODEV; 866 goto out_err; 867 } 868 869 if (tpm_do_selftest(chip)) { 870 dev_err(dev, "TPM self test failed\n"); 871 rc = -ENODEV; 872 goto out_err; 873 } 874 } 875 876 return tpm_chip_register(chip); 877out_err: 878 tpm_tis_remove(chip); 879 return rc; 880} 881 882#ifdef CONFIG_PM_SLEEP 883static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 884{ 885 u32 intmask; 886 887 /* reenable interrupts that device may have lost or 888 BIOS/firmware may have disabled */ 889 iowrite8(chip->vendor.irq, chip->vendor.iobase + 890 TPM_INT_VECTOR(chip->vendor.locality)); 891 892 intmask = 893 ioread32(chip->vendor.iobase + 894 TPM_INT_ENABLE(chip->vendor.locality)); 895 896 intmask |= TPM_INTF_CMD_READY_INT 897 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 898 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 899 900 iowrite32(intmask, 901 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality)); 902} 903 904static int tpm_tis_resume(struct device *dev) 905{ 906 struct tpm_chip *chip = dev_get_drvdata(dev); 907 int ret; 908 909 if (chip->vendor.irq) 910 tpm_tis_reenable_interrupts(chip); 911 912 ret = tpm_pm_resume(dev); 913 if (ret) 914 return ret; 915 916 /* TPM 1.2 requires self-test on resume. This function actually returns 917 * an error code but for unknown reason it isn't handled. 918 */ 919 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) 920 tpm_do_selftest(chip); 921 922 return 0; 923} 924#endif 925 926static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume); 927 928#ifdef CONFIG_PNP 929static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev, 930 const struct pnp_device_id *pnp_id) 931{ 932 struct tpm_info tpm_info = tis_default_info; 933 acpi_handle acpi_dev_handle = NULL; 934 935 tpm_info.start = pnp_mem_start(pnp_dev, 0); 936 tpm_info.len = pnp_mem_len(pnp_dev, 0); 937 938 if (pnp_irq_valid(pnp_dev, 0)) 939 tpm_info.irq = pnp_irq(pnp_dev, 0); 940 else 941 interrupts = false; 942 943#ifdef CONFIG_ACPI 944 if (pnp_acpi_device(pnp_dev)) { 945 if (is_itpm(pnp_acpi_device(pnp_dev))) 946 itpm = true; 947 948 acpi_dev_handle = pnp_acpi_device(pnp_dev)->handle; 949 } 950#endif 951 952 return tpm_tis_init(&pnp_dev->dev, &tpm_info, acpi_dev_handle); 953} 954 955static struct pnp_device_id tpm_pnp_tbl[] = { 956 {"PNP0C31", 0}, /* TPM */ 957 {"ATM1200", 0}, /* Atmel */ 958 {"IFX0102", 0}, /* Infineon */ 959 {"BCM0101", 0}, /* Broadcom */ 960 {"BCM0102", 0}, /* Broadcom */ 961 {"NSC1200", 0}, /* National */ 962 {"ICO0102", 0}, /* Intel */ 963 /* Add new here */ 964 {"", 0}, /* User Specified */ 965 {"", 0} /* Terminator */ 966}; 967MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl); 968 969static void tpm_tis_pnp_remove(struct pnp_dev *dev) 970{ 971 struct tpm_chip *chip = pnp_get_drvdata(dev); 972 973 tpm_chip_unregister(chip); 974 tpm_tis_remove(chip); 975} 976 977static struct pnp_driver tis_pnp_driver = { 978 .name = "tpm_tis", 979 .id_table = tpm_pnp_tbl, 980 .probe = tpm_tis_pnp_init, 981 .remove = tpm_tis_pnp_remove, 982 .driver = { 983 .pm = &tpm_tis_pm, 984 }, 985}; 986 987#define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2 988module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id, 989 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444); 990MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe"); 991#endif 992 993#ifdef CONFIG_ACPI 994static int tpm_check_resource(struct acpi_resource *ares, void *data) 995{ 996 struct tpm_info *tpm_info = (struct tpm_info *) data; 997 struct resource res; 998 999 if (acpi_dev_resource_interrupt(ares, 0, &res)) { 1000 tpm_info->irq = res.start; 1001 } else if (acpi_dev_resource_memory(ares, &res)) { 1002 tpm_info->start = res.start; 1003 tpm_info->len = resource_size(&res); 1004 } 1005 1006 return 1; 1007} 1008 1009static int tpm_tis_acpi_init(struct acpi_device *acpi_dev) 1010{ 1011 struct list_head resources; 1012 struct tpm_info tpm_info = tis_default_info; 1013 int ret; 1014 1015 if (!is_fifo(acpi_dev)) 1016 return -ENODEV; 1017 1018 INIT_LIST_HEAD(&resources); 1019 ret = acpi_dev_get_resources(acpi_dev, &resources, tpm_check_resource, 1020 &tpm_info); 1021 if (ret < 0) 1022 return ret; 1023 1024 acpi_dev_free_resource_list(&resources); 1025 1026 if (!tpm_info.irq) 1027 interrupts = false; 1028 1029 if (is_itpm(acpi_dev)) 1030 itpm = true; 1031 1032 return tpm_tis_init(&acpi_dev->dev, &tpm_info, acpi_dev->handle); 1033} 1034 1035static int tpm_tis_acpi_remove(struct acpi_device *dev) 1036{ 1037 struct tpm_chip *chip = dev_get_drvdata(&dev->dev); 1038 1039 tpm_chip_unregister(chip); 1040 tpm_tis_remove(chip); 1041 1042 return 0; 1043} 1044 1045static struct acpi_device_id tpm_acpi_tbl[] = { 1046 {"MSFT0101", 0}, /* TPM 2.0 */ 1047 /* Add new here */ 1048 {"", 0}, /* User Specified */ 1049 {"", 0} /* Terminator */ 1050}; 1051MODULE_DEVICE_TABLE(acpi, tpm_acpi_tbl); 1052 1053static struct acpi_driver tis_acpi_driver = { 1054 .name = "tpm_tis", 1055 .ids = tpm_acpi_tbl, 1056 .ops = { 1057 .add = tpm_tis_acpi_init, 1058 .remove = tpm_tis_acpi_remove, 1059 }, 1060 .drv = { 1061 .pm = &tpm_tis_pm, 1062 }, 1063}; 1064#endif 1065 1066static struct platform_driver tis_drv = { 1067 .driver = { 1068 .name = "tpm_tis", 1069 .pm = &tpm_tis_pm, 1070 }, 1071}; 1072 1073static struct platform_device *pdev; 1074 1075static bool force; 1076module_param(force, bool, 0444); 1077MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry"); 1078static int __init init_tis(void) 1079{ 1080 int rc; 1081#ifdef CONFIG_PNP 1082 if (!force) { 1083 rc = pnp_register_driver(&tis_pnp_driver); 1084 if (rc) 1085 return rc; 1086 } 1087#endif 1088#ifdef CONFIG_ACPI 1089 if (!force) { 1090 rc = acpi_bus_register_driver(&tis_acpi_driver); 1091 if (rc) { 1092#ifdef CONFIG_PNP 1093 pnp_unregister_driver(&tis_pnp_driver); 1094#endif 1095 return rc; 1096 } 1097 } 1098#endif 1099 if (!force) 1100 return 0; 1101 1102 rc = platform_driver_register(&tis_drv); 1103 if (rc < 0) 1104 return rc; 1105 pdev = platform_device_register_simple("tpm_tis", -1, NULL, 0); 1106 if (IS_ERR(pdev)) { 1107 rc = PTR_ERR(pdev); 1108 goto err_dev; 1109 } 1110 rc = tpm_tis_init(&pdev->dev, &tis_default_info, NULL); 1111 if (rc) 1112 goto err_init; 1113 return 0; 1114err_init: 1115 platform_device_unregister(pdev); 1116err_dev: 1117 platform_driver_unregister(&tis_drv); 1118 return rc; 1119} 1120 1121static void __exit cleanup_tis(void) 1122{ 1123 struct tpm_chip *chip; 1124#if defined(CONFIG_PNP) || defined(CONFIG_ACPI) 1125 if (!force) { 1126#ifdef CONFIG_ACPI 1127 acpi_bus_unregister_driver(&tis_acpi_driver); 1128#endif 1129#ifdef CONFIG_PNP 1130 pnp_unregister_driver(&tis_pnp_driver); 1131#endif 1132 return; 1133 } 1134#endif 1135 chip = dev_get_drvdata(&pdev->dev); 1136 tpm_chip_unregister(chip); 1137 tpm_tis_remove(chip); 1138 platform_device_unregister(pdev); 1139 platform_driver_unregister(&tis_drv); 1140} 1141 1142module_init(init_tis); 1143module_exit(cleanup_tis); 1144MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 1145MODULE_DESCRIPTION("TPM Driver"); 1146MODULE_VERSION("2.0"); 1147MODULE_LICENSE("GPL"); 1148