1/*
2 *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 */
10
11#include <linux/clk-provider.h>
12#include <linux/clkdev.h>
13#include <linux/clk/at91_pmc.h>
14#include <linux/of.h>
15#include <linux/of_address.h>
16#include <linux/io.h>
17#include <linux/wait.h>
18#include <linux/sched.h>
19
20#include "pmc.h"
21
22#define PROG_SOURCE_MAX		5
23#define PROG_ID_MAX		7
24
25#define PROG_STATUS_MASK(id)	(1 << ((id) + 8))
26#define PROG_PRES_MASK		0x7
27#define PROG_MAX_RM9200_CSS	3
28
29struct clk_programmable_layout {
30	u8 pres_shift;
31	u8 css_mask;
32	u8 have_slck_mck;
33};
34
35struct clk_programmable {
36	struct clk_hw hw;
37	struct at91_pmc *pmc;
38	u8 id;
39	const struct clk_programmable_layout *layout;
40};
41
42#define to_clk_programmable(hw) container_of(hw, struct clk_programmable, hw)
43
44static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
45						  unsigned long parent_rate)
46{
47	u32 pres;
48	struct clk_programmable *prog = to_clk_programmable(hw);
49	struct at91_pmc *pmc = prog->pmc;
50	const struct clk_programmable_layout *layout = prog->layout;
51
52	pres = (pmc_read(pmc, AT91_PMC_PCKR(prog->id)) >> layout->pres_shift) &
53	       PROG_PRES_MASK;
54	return parent_rate >> pres;
55}
56
57static long clk_programmable_determine_rate(struct clk_hw *hw,
58					    unsigned long rate,
59					    unsigned long min_rate,
60					    unsigned long max_rate,
61					    unsigned long *best_parent_rate,
62					    struct clk_hw **best_parent_hw)
63{
64	struct clk *parent = NULL;
65	long best_rate = -EINVAL;
66	unsigned long parent_rate;
67	unsigned long tmp_rate;
68	int shift;
69	int i;
70
71	for (i = 0; i < __clk_get_num_parents(hw->clk); i++) {
72		parent = clk_get_parent_by_index(hw->clk, i);
73		if (!parent)
74			continue;
75
76		parent_rate = __clk_get_rate(parent);
77		for (shift = 0; shift < PROG_PRES_MASK; shift++) {
78			tmp_rate = parent_rate >> shift;
79			if (tmp_rate <= rate)
80				break;
81		}
82
83		if (tmp_rate > rate)
84			continue;
85
86		if (best_rate < 0 || (rate - tmp_rate) < (rate - best_rate)) {
87			best_rate = tmp_rate;
88			*best_parent_rate = parent_rate;
89			*best_parent_hw = __clk_get_hw(parent);
90		}
91
92		if (!best_rate)
93			break;
94	}
95
96	return best_rate;
97}
98
99static int clk_programmable_set_parent(struct clk_hw *hw, u8 index)
100{
101	struct clk_programmable *prog = to_clk_programmable(hw);
102	const struct clk_programmable_layout *layout = prog->layout;
103	struct at91_pmc *pmc = prog->pmc;
104	u32 tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id)) & ~layout->css_mask;
105
106	if (layout->have_slck_mck)
107		tmp &= AT91_PMC_CSSMCK_MCK;
108
109	if (index > layout->css_mask) {
110		if (index > PROG_MAX_RM9200_CSS && layout->have_slck_mck) {
111			tmp |= AT91_PMC_CSSMCK_MCK;
112			return 0;
113		} else {
114			return -EINVAL;
115		}
116	}
117
118	pmc_write(pmc, AT91_PMC_PCKR(prog->id), tmp | index);
119	return 0;
120}
121
122static u8 clk_programmable_get_parent(struct clk_hw *hw)
123{
124	u32 tmp;
125	u8 ret;
126	struct clk_programmable *prog = to_clk_programmable(hw);
127	struct at91_pmc *pmc = prog->pmc;
128	const struct clk_programmable_layout *layout = prog->layout;
129
130	tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id));
131	ret = tmp & layout->css_mask;
132	if (layout->have_slck_mck && (tmp & AT91_PMC_CSSMCK_MCK) && !ret)
133		ret = PROG_MAX_RM9200_CSS + 1;
134
135	return ret;
136}
137
138static int clk_programmable_set_rate(struct clk_hw *hw, unsigned long rate,
139				     unsigned long parent_rate)
140{
141	struct clk_programmable *prog = to_clk_programmable(hw);
142	struct at91_pmc *pmc = prog->pmc;
143	const struct clk_programmable_layout *layout = prog->layout;
144	unsigned long div = parent_rate / rate;
145	int shift = 0;
146	u32 tmp = pmc_read(pmc, AT91_PMC_PCKR(prog->id)) &
147		  ~(PROG_PRES_MASK << layout->pres_shift);
148
149	if (!div)
150		return -EINVAL;
151
152	shift = fls(div) - 1;
153
154	if (div != (1<<shift))
155		return -EINVAL;
156
157	if (shift >= PROG_PRES_MASK)
158		return -EINVAL;
159
160	pmc_write(pmc, AT91_PMC_PCKR(prog->id),
161		  tmp | (shift << layout->pres_shift));
162
163	return 0;
164}
165
166static const struct clk_ops programmable_ops = {
167	.recalc_rate = clk_programmable_recalc_rate,
168	.determine_rate = clk_programmable_determine_rate,
169	.get_parent = clk_programmable_get_parent,
170	.set_parent = clk_programmable_set_parent,
171	.set_rate = clk_programmable_set_rate,
172};
173
174static struct clk * __init
175at91_clk_register_programmable(struct at91_pmc *pmc,
176			       const char *name, const char **parent_names,
177			       u8 num_parents, u8 id,
178			       const struct clk_programmable_layout *layout)
179{
180	struct clk_programmable *prog;
181	struct clk *clk = NULL;
182	struct clk_init_data init;
183
184	if (id > PROG_ID_MAX)
185		return ERR_PTR(-EINVAL);
186
187	prog = kzalloc(sizeof(*prog), GFP_KERNEL);
188	if (!prog)
189		return ERR_PTR(-ENOMEM);
190
191	init.name = name;
192	init.ops = &programmable_ops;
193	init.parent_names = parent_names;
194	init.num_parents = num_parents;
195	init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
196
197	prog->id = id;
198	prog->layout = layout;
199	prog->hw.init = &init;
200	prog->pmc = pmc;
201
202	clk = clk_register(NULL, &prog->hw);
203	if (IS_ERR(clk))
204		kfree(prog);
205
206	return clk;
207}
208
209static const struct clk_programmable_layout at91rm9200_programmable_layout = {
210	.pres_shift = 2,
211	.css_mask = 0x3,
212	.have_slck_mck = 0,
213};
214
215static const struct clk_programmable_layout at91sam9g45_programmable_layout = {
216	.pres_shift = 2,
217	.css_mask = 0x3,
218	.have_slck_mck = 1,
219};
220
221static const struct clk_programmable_layout at91sam9x5_programmable_layout = {
222	.pres_shift = 4,
223	.css_mask = 0x7,
224	.have_slck_mck = 0,
225};
226
227static void __init
228of_at91_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc,
229		       const struct clk_programmable_layout *layout)
230{
231	int num;
232	u32 id;
233	int i;
234	struct clk *clk;
235	int num_parents;
236	const char *parent_names[PROG_SOURCE_MAX];
237	const char *name;
238	struct device_node *progclknp;
239
240	num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
241	if (num_parents <= 0 || num_parents > PROG_SOURCE_MAX)
242		return;
243
244	for (i = 0; i < num_parents; ++i) {
245		parent_names[i] = of_clk_get_parent_name(np, i);
246		if (!parent_names[i])
247			return;
248	}
249
250	num = of_get_child_count(np);
251	if (!num || num > (PROG_ID_MAX + 1))
252		return;
253
254	for_each_child_of_node(np, progclknp) {
255		if (of_property_read_u32(progclknp, "reg", &id))
256			continue;
257
258		if (of_property_read_string(np, "clock-output-names", &name))
259			name = progclknp->name;
260
261		clk = at91_clk_register_programmable(pmc, name,
262						     parent_names, num_parents,
263						     id, layout);
264		if (IS_ERR(clk))
265			continue;
266
267		of_clk_add_provider(progclknp, of_clk_src_simple_get, clk);
268	}
269}
270
271
272void __init of_at91rm9200_clk_prog_setup(struct device_node *np,
273					 struct at91_pmc *pmc)
274{
275	of_at91_clk_prog_setup(np, pmc, &at91rm9200_programmable_layout);
276}
277
278void __init of_at91sam9g45_clk_prog_setup(struct device_node *np,
279					  struct at91_pmc *pmc)
280{
281	of_at91_clk_prog_setup(np, pmc, &at91sam9g45_programmable_layout);
282}
283
284void __init of_at91sam9x5_clk_prog_setup(struct device_node *np,
285					 struct at91_pmc *pmc)
286{
287	of_at91_clk_prog_setup(np, pmc, &at91sam9x5_programmable_layout);
288}
289