1/* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28#include <linux/module.h> 29#include <linux/i2c.h> 30#include <linux/slab.h> 31#include <linux/delay.h> 32#include <drm/drmP.h> 33#include <drm/drm_crtc.h> 34#include <drm/drm_edid.h> 35#include "psb_intel_drv.h" 36#include <drm/gma_drm.h> 37#include "psb_drv.h" 38#include "psb_intel_sdvo_regs.h" 39#include "psb_intel_reg.h" 40 41#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 44#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0) 45 46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 47 SDVO_TV_MASK) 48 49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 50#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 51#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 52#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 53 54 55static const char *tv_format_names[] = { 56 "NTSC_M" , "NTSC_J" , "NTSC_443", 57 "PAL_B" , "PAL_D" , "PAL_G" , 58 "PAL_H" , "PAL_I" , "PAL_M" , 59 "PAL_N" , "PAL_NC" , "PAL_60" , 60 "SECAM_B" , "SECAM_D" , "SECAM_G" , 61 "SECAM_K" , "SECAM_K1", "SECAM_L" , 62 "SECAM_60" 63}; 64 65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 66 67struct psb_intel_sdvo { 68 struct gma_encoder base; 69 70 struct i2c_adapter *i2c; 71 u8 slave_addr; 72 73 struct i2c_adapter ddc; 74 75 /* Register for the SDVO device: SDVOB or SDVOC */ 76 int sdvo_reg; 77 78 /* Active outputs controlled by this SDVO output */ 79 uint16_t controlled_output; 80 81 /* 82 * Capabilities of the SDVO device returned by 83 * i830_sdvo_get_capabilities() 84 */ 85 struct psb_intel_sdvo_caps caps; 86 87 /* Pixel clock limitations reported by the SDVO device, in kHz */ 88 int pixel_clock_min, pixel_clock_max; 89 90 /* 91 * For multiple function SDVO device, 92 * this is for current attached outputs. 93 */ 94 uint16_t attached_output; 95 96 /** 97 * This is used to select the color range of RBG outputs in HDMI mode. 98 * It is only valid when using TMDS encoding and 8 bit per color mode. 99 */ 100 uint32_t color_range; 101 102 /** 103 * This is set if we're going to treat the device as TV-out. 104 * 105 * While we have these nice friendly flags for output types that ought 106 * to decide this for us, the S-Video output on our HDMI+S-Video card 107 * shows up as RGB1 (VGA). 108 */ 109 bool is_tv; 110 111 /* This is for current tv format name */ 112 int tv_format_index; 113 114 /** 115 * This is set if we treat the device as HDMI, instead of DVI. 116 */ 117 bool is_hdmi; 118 bool has_hdmi_monitor; 119 bool has_hdmi_audio; 120 121 /** 122 * This is set if we detect output of sdvo device as LVDS and 123 * have a valid fixed mode to use with the panel. 124 */ 125 bool is_lvds; 126 127 /** 128 * This is sdvo fixed pannel mode pointer 129 */ 130 struct drm_display_mode *sdvo_lvds_fixed_mode; 131 132 /* DDC bus used by this SDVO encoder */ 133 uint8_t ddc_bus; 134 135 /* Input timings for adjusted_mode */ 136 struct psb_intel_sdvo_dtd input_dtd; 137 138 /* Saved SDVO output states */ 139 uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */ 140}; 141 142struct psb_intel_sdvo_connector { 143 struct gma_connector base; 144 145 /* Mark the type of connector */ 146 uint16_t output_flag; 147 148 int force_audio; 149 150 /* This contains all current supported TV format */ 151 u8 tv_format_supported[TV_FORMAT_NUM]; 152 int format_supported_num; 153 struct drm_property *tv_format; 154 155 /* add the property for the SDVO-TV */ 156 struct drm_property *left; 157 struct drm_property *right; 158 struct drm_property *top; 159 struct drm_property *bottom; 160 struct drm_property *hpos; 161 struct drm_property *vpos; 162 struct drm_property *contrast; 163 struct drm_property *saturation; 164 struct drm_property *hue; 165 struct drm_property *sharpness; 166 struct drm_property *flicker_filter; 167 struct drm_property *flicker_filter_adaptive; 168 struct drm_property *flicker_filter_2d; 169 struct drm_property *tv_chroma_filter; 170 struct drm_property *tv_luma_filter; 171 struct drm_property *dot_crawl; 172 173 /* add the property for the SDVO-TV/LVDS */ 174 struct drm_property *brightness; 175 176 /* Add variable to record current setting for the above property */ 177 u32 left_margin, right_margin, top_margin, bottom_margin; 178 179 /* this is to get the range of margin.*/ 180 u32 max_hscan, max_vscan; 181 u32 max_hpos, cur_hpos; 182 u32 max_vpos, cur_vpos; 183 u32 cur_brightness, max_brightness; 184 u32 cur_contrast, max_contrast; 185 u32 cur_saturation, max_saturation; 186 u32 cur_hue, max_hue; 187 u32 cur_sharpness, max_sharpness; 188 u32 cur_flicker_filter, max_flicker_filter; 189 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 190 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 191 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 192 u32 cur_tv_luma_filter, max_tv_luma_filter; 193 u32 cur_dot_crawl, max_dot_crawl; 194}; 195 196static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder) 197{ 198 return container_of(encoder, struct psb_intel_sdvo, base.base); 199} 200 201static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 202{ 203 return container_of(gma_attached_encoder(connector), 204 struct psb_intel_sdvo, base); 205} 206 207static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector) 208{ 209 return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base); 210} 211 212static bool 213psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags); 214static bool 215psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo, 216 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 217 int type); 218static bool 219psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo, 220 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector); 221 222/** 223 * Writes the SDVOB or SDVOC with the given value, but always writes both 224 * SDVOB and SDVOC to work around apparent hardware issues (according to 225 * comments in the BIOS). 226 */ 227static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val) 228{ 229 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 230 u32 bval = val, cval = val; 231 int i, j; 232 int need_aux = IS_MRST(dev) ? 1 : 0; 233 234 for (j = 0; j <= need_aux; j++) { 235 if (psb_intel_sdvo->sdvo_reg == SDVOB) 236 cval = REG_READ_WITH_AUX(SDVOC, j); 237 else 238 bval = REG_READ_WITH_AUX(SDVOB, j); 239 240 /* 241 * Write the registers twice for luck. Sometimes, 242 * writing them only once doesn't appear to 'stick'. 243 * The BIOS does this too. Yay, magic 244 */ 245 for (i = 0; i < 2; i++) { 246 REG_WRITE_WITH_AUX(SDVOB, bval, j); 247 REG_READ_WITH_AUX(SDVOB, j); 248 REG_WRITE_WITH_AUX(SDVOC, cval, j); 249 REG_READ_WITH_AUX(SDVOC, j); 250 } 251 } 252} 253 254static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch) 255{ 256 struct i2c_msg msgs[] = { 257 { 258 .addr = psb_intel_sdvo->slave_addr, 259 .flags = 0, 260 .len = 1, 261 .buf = &addr, 262 }, 263 { 264 .addr = psb_intel_sdvo->slave_addr, 265 .flags = I2C_M_RD, 266 .len = 1, 267 .buf = ch, 268 } 269 }; 270 int ret; 271 272 if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2) 273 return true; 274 275 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 276 return false; 277} 278 279#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 280/** Mapping of command numbers to names, for debug output */ 281static const struct _sdvo_cmd_name { 282 u8 cmd; 283 const char *name; 284} sdvo_cmd_names[] = { 285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 328 329 /* Add the op code for SDVO enhancements */ 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 374 375 /* HDMI op code */ 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 396}; 397 398#define IS_SDVOB(reg) (reg == SDVOB) 399#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC") 400 401static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 402 const void *args, int args_len) 403{ 404 int i; 405 406 DRM_DEBUG_KMS("%s: W: %02X ", 407 SDVO_NAME(psb_intel_sdvo), cmd); 408 for (i = 0; i < args_len; i++) 409 DRM_DEBUG_KMS("%02X ", ((u8 *)args)[i]); 410 for (; i < 8; i++) 411 DRM_DEBUG_KMS(" "); 412 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 413 if (cmd == sdvo_cmd_names[i].cmd) { 414 DRM_DEBUG_KMS("(%s)", sdvo_cmd_names[i].name); 415 break; 416 } 417 } 418 if (i == ARRAY_SIZE(sdvo_cmd_names)) 419 DRM_DEBUG_KMS("(%02X)", cmd); 420 DRM_DEBUG_KMS("\n"); 421} 422 423static const char *cmd_status_names[] = { 424 "Power on", 425 "Success", 426 "Not supported", 427 "Invalid arg", 428 "Pending", 429 "Target not specified", 430 "Scaling not supported" 431}; 432 433static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 434 const void *args, int args_len) 435{ 436 u8 buf[args_len*2 + 2], status; 437 struct i2c_msg msgs[args_len + 3]; 438 int i, ret; 439 440 psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len); 441 442 for (i = 0; i < args_len; i++) { 443 msgs[i].addr = psb_intel_sdvo->slave_addr; 444 msgs[i].flags = 0; 445 msgs[i].len = 2; 446 msgs[i].buf = buf + 2 *i; 447 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 448 buf[2*i + 1] = ((u8*)args)[i]; 449 } 450 msgs[i].addr = psb_intel_sdvo->slave_addr; 451 msgs[i].flags = 0; 452 msgs[i].len = 2; 453 msgs[i].buf = buf + 2*i; 454 buf[2*i + 0] = SDVO_I2C_OPCODE; 455 buf[2*i + 1] = cmd; 456 457 /* the following two are to read the response */ 458 status = SDVO_I2C_CMD_STATUS; 459 msgs[i+1].addr = psb_intel_sdvo->slave_addr; 460 msgs[i+1].flags = 0; 461 msgs[i+1].len = 1; 462 msgs[i+1].buf = &status; 463 464 msgs[i+2].addr = psb_intel_sdvo->slave_addr; 465 msgs[i+2].flags = I2C_M_RD; 466 msgs[i+2].len = 1; 467 msgs[i+2].buf = &status; 468 469 ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3); 470 if (ret < 0) { 471 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 472 return false; 473 } 474 if (ret != i+3) { 475 /* failure in I2C transfer */ 476 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 477 return false; 478 } 479 480 return true; 481} 482 483static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo, 484 void *response, int response_len) 485{ 486 u8 retry = 5; 487 u8 status; 488 int i; 489 490 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo)); 491 492 /* 493 * The documentation states that all commands will be 494 * processed within 15µs, and that we need only poll 495 * the status byte a maximum of 3 times in order for the 496 * command to be complete. 497 * 498 * Check 5 times in case the hardware failed to read the docs. 499 */ 500 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 501 SDVO_I2C_CMD_STATUS, 502 &status)) 503 goto log_fail; 504 505 while ((status == SDVO_CMD_STATUS_PENDING || 506 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) { 507 udelay(15); 508 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 509 SDVO_I2C_CMD_STATUS, 510 &status)) 511 goto log_fail; 512 } 513 514 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 515 DRM_DEBUG_KMS("(%s)", cmd_status_names[status]); 516 else 517 DRM_DEBUG_KMS("(??? %d)", status); 518 519 if (status != SDVO_CMD_STATUS_SUCCESS) 520 goto log_fail; 521 522 /* Read the command response */ 523 for (i = 0; i < response_len; i++) { 524 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 525 SDVO_I2C_RETURN_0 + i, 526 &((u8 *)response)[i])) 527 goto log_fail; 528 DRM_DEBUG_KMS(" %02X", ((u8 *)response)[i]); 529 } 530 DRM_DEBUG_KMS("\n"); 531 return true; 532 533log_fail: 534 DRM_DEBUG_KMS("... failed\n"); 535 return false; 536} 537 538static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 539{ 540 if (mode->clock >= 100000) 541 return 1; 542 else if (mode->clock >= 50000) 543 return 2; 544 else 545 return 4; 546} 547 548static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo, 549 u8 ddc_bus) 550{ 551 /* This must be the immediately preceding write before the i2c xfer */ 552 return psb_intel_sdvo_write_cmd(psb_intel_sdvo, 553 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 554 &ddc_bus, 1); 555} 556 557static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len) 558{ 559 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len)) 560 return false; 561 562 return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0); 563} 564 565static bool 566psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len) 567{ 568 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0)) 569 return false; 570 571 return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len); 572} 573 574static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo) 575{ 576 struct psb_intel_sdvo_set_target_input_args targets = {0}; 577 return psb_intel_sdvo_set_value(psb_intel_sdvo, 578 SDVO_CMD_SET_TARGET_INPUT, 579 &targets, sizeof(targets)); 580} 581 582/** 583 * Return whether each input is trained. 584 * 585 * This function is making an assumption about the layout of the response, 586 * which should be checked against the docs. 587 */ 588static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2) 589{ 590 struct psb_intel_sdvo_get_trained_inputs_response response; 591 592 BUILD_BUG_ON(sizeof(response) != 1); 593 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 594 &response, sizeof(response))) 595 return false; 596 597 *input_1 = response.input0_trained; 598 *input_2 = response.input1_trained; 599 return true; 600} 601 602static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo, 603 u16 outputs) 604{ 605 return psb_intel_sdvo_set_value(psb_intel_sdvo, 606 SDVO_CMD_SET_ACTIVE_OUTPUTS, 607 &outputs, sizeof(outputs)); 608} 609 610static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo, 611 int mode) 612{ 613 u8 state = SDVO_ENCODER_STATE_ON; 614 615 switch (mode) { 616 case DRM_MODE_DPMS_ON: 617 state = SDVO_ENCODER_STATE_ON; 618 break; 619 case DRM_MODE_DPMS_STANDBY: 620 state = SDVO_ENCODER_STATE_STANDBY; 621 break; 622 case DRM_MODE_DPMS_SUSPEND: 623 state = SDVO_ENCODER_STATE_SUSPEND; 624 break; 625 case DRM_MODE_DPMS_OFF: 626 state = SDVO_ENCODER_STATE_OFF; 627 break; 628 } 629 630 return psb_intel_sdvo_set_value(psb_intel_sdvo, 631 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 632} 633 634static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo, 635 int *clock_min, 636 int *clock_max) 637{ 638 struct psb_intel_sdvo_pixel_clock_range clocks; 639 640 BUILD_BUG_ON(sizeof(clocks) != 4); 641 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 642 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 643 &clocks, sizeof(clocks))) 644 return false; 645 646 /* Convert the values from units of 10 kHz to kHz. */ 647 *clock_min = clocks.min * 10; 648 *clock_max = clocks.max * 10; 649 return true; 650} 651 652static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo, 653 u16 outputs) 654{ 655 return psb_intel_sdvo_set_value(psb_intel_sdvo, 656 SDVO_CMD_SET_TARGET_OUTPUT, 657 &outputs, sizeof(outputs)); 658} 659 660static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 661 struct psb_intel_sdvo_dtd *dtd) 662{ 663 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 664 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 665} 666 667static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 668 struct psb_intel_sdvo_dtd *dtd) 669{ 670 return psb_intel_sdvo_set_timing(psb_intel_sdvo, 671 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 672} 673 674static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo, 675 struct psb_intel_sdvo_dtd *dtd) 676{ 677 return psb_intel_sdvo_set_timing(psb_intel_sdvo, 678 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 679} 680 681static bool 682psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 683 uint16_t clock, 684 uint16_t width, 685 uint16_t height) 686{ 687 struct psb_intel_sdvo_preferred_input_timing_args args; 688 689 memset(&args, 0, sizeof(args)); 690 args.clock = clock; 691 args.width = width; 692 args.height = height; 693 args.interlace = 0; 694 695 if (psb_intel_sdvo->is_lvds && 696 (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 697 psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 698 args.scaled = 1; 699 700 return psb_intel_sdvo_set_value(psb_intel_sdvo, 701 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 702 &args, sizeof(args)); 703} 704 705static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 706 struct psb_intel_sdvo_dtd *dtd) 707{ 708 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 709 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 710 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 711 &dtd->part1, sizeof(dtd->part1)) && 712 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 713 &dtd->part2, sizeof(dtd->part2)); 714} 715 716static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val) 717{ 718 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 719} 720 721static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd, 722 const struct drm_display_mode *mode) 723{ 724 uint16_t width, height; 725 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 726 uint16_t h_sync_offset, v_sync_offset; 727 728 width = mode->crtc_hdisplay; 729 height = mode->crtc_vdisplay; 730 731 /* do some mode translations */ 732 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; 733 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; 734 735 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start; 736 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; 737 738 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; 739 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; 740 741 dtd->part1.clock = mode->clock / 10; 742 dtd->part1.h_active = width & 0xff; 743 dtd->part1.h_blank = h_blank_len & 0xff; 744 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 745 ((h_blank_len >> 8) & 0xf); 746 dtd->part1.v_active = height & 0xff; 747 dtd->part1.v_blank = v_blank_len & 0xff; 748 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 749 ((v_blank_len >> 8) & 0xf); 750 751 dtd->part2.h_sync_off = h_sync_offset & 0xff; 752 dtd->part2.h_sync_width = h_sync_len & 0xff; 753 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 754 (v_sync_len & 0xf); 755 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 756 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 757 ((v_sync_len & 0x30) >> 4); 758 759 dtd->part2.dtd_flags = 0x18; 760 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 761 dtd->part2.dtd_flags |= 0x2; 762 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 763 dtd->part2.dtd_flags |= 0x4; 764 765 dtd->part2.sdvo_flags = 0; 766 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 767 dtd->part2.reserved = 0; 768} 769 770static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 771 const struct psb_intel_sdvo_dtd *dtd) 772{ 773 mode->hdisplay = dtd->part1.h_active; 774 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 775 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 776 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 777 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 778 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 779 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 780 mode->htotal += (dtd->part1.h_high & 0xf) << 8; 781 782 mode->vdisplay = dtd->part1.v_active; 783 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 784 mode->vsync_start = mode->vdisplay; 785 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 786 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 787 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 788 mode->vsync_end = mode->vsync_start + 789 (dtd->part2.v_sync_off_width & 0xf); 790 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 791 mode->vtotal = mode->vdisplay + dtd->part1.v_blank; 792 mode->vtotal += (dtd->part1.v_high & 0xf) << 8; 793 794 mode->clock = dtd->part1.clock * 10; 795 796 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 797 if (dtd->part2.dtd_flags & 0x2) 798 mode->flags |= DRM_MODE_FLAG_PHSYNC; 799 if (dtd->part2.dtd_flags & 0x4) 800 mode->flags |= DRM_MODE_FLAG_PVSYNC; 801} 802 803static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo) 804{ 805 struct psb_intel_sdvo_encode encode; 806 807 BUILD_BUG_ON(sizeof(encode) != 2); 808 return psb_intel_sdvo_get_value(psb_intel_sdvo, 809 SDVO_CMD_GET_SUPP_ENCODE, 810 &encode, sizeof(encode)); 811} 812 813static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo, 814 uint8_t mode) 815{ 816 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 817} 818 819static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo, 820 uint8_t mode) 821{ 822 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 823} 824 825#if 0 826static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo) 827{ 828 int i, j; 829 uint8_t set_buf_index[2]; 830 uint8_t av_split; 831 uint8_t buf_size; 832 uint8_t buf[48]; 833 uint8_t *pos; 834 835 psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 836 837 for (i = 0; i <= av_split; i++) { 838 set_buf_index[0] = i; set_buf_index[1] = 0; 839 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 840 set_buf_index, 2); 841 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 842 psb_intel_sdvo_read_response(encoder, &buf_size, 1); 843 844 pos = buf; 845 for (j = 0; j <= buf_size; j += 8) { 846 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 847 NULL, 0); 848 psb_intel_sdvo_read_response(encoder, pos, 8); 849 pos += 8; 850 } 851 } 852} 853#endif 854 855static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo) 856{ 857 DRM_INFO("HDMI is not supported yet"); 858 859 return false; 860#if 0 861 struct dip_infoframe avi_if = { 862 .type = DIP_TYPE_AVI, 863 .ver = DIP_VERSION_AVI, 864 .len = DIP_LEN_AVI, 865 }; 866 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC; 867 uint8_t set_buf_index[2] = { 1, 0 }; 868 uint64_t *data = (uint64_t *)&avi_if; 869 unsigned i; 870 871 intel_dip_infoframe_csum(&avi_if); 872 873 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, 874 SDVO_CMD_SET_HBUF_INDEX, 875 set_buf_index, 2)) 876 return false; 877 878 for (i = 0; i < sizeof(avi_if); i += 8) { 879 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, 880 SDVO_CMD_SET_HBUF_DATA, 881 data, 8)) 882 return false; 883 data++; 884 } 885 886 return psb_intel_sdvo_set_value(psb_intel_sdvo, 887 SDVO_CMD_SET_HBUF_TXRATE, 888 &tx_rate, 1); 889#endif 890} 891 892static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo) 893{ 894 struct psb_intel_sdvo_tv_format format; 895 uint32_t format_map; 896 897 format_map = 1 << psb_intel_sdvo->tv_format_index; 898 memset(&format, 0, sizeof(format)); 899 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 900 901 BUILD_BUG_ON(sizeof(format) != 6); 902 return psb_intel_sdvo_set_value(psb_intel_sdvo, 903 SDVO_CMD_SET_TV_FORMAT, 904 &format, sizeof(format)); 905} 906 907static bool 908psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo, 909 const struct drm_display_mode *mode) 910{ 911 struct psb_intel_sdvo_dtd output_dtd; 912 913 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 914 psb_intel_sdvo->attached_output)) 915 return false; 916 917 psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 918 if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd)) 919 return false; 920 921 return true; 922} 923 924static bool 925psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo, 926 const struct drm_display_mode *mode, 927 struct drm_display_mode *adjusted_mode) 928{ 929 /* Reset the input timing to the screen. Assume always input 0. */ 930 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 931 return false; 932 933 if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo, 934 mode->clock / 10, 935 mode->hdisplay, 936 mode->vdisplay)) 937 return false; 938 939 if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo, 940 &psb_intel_sdvo->input_dtd)) 941 return false; 942 943 psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd); 944 945 drm_mode_set_crtcinfo(adjusted_mode, 0); 946 return true; 947} 948 949static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder, 950 const struct drm_display_mode *mode, 951 struct drm_display_mode *adjusted_mode) 952{ 953 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 954 int multiplier; 955 956 /* We need to construct preferred input timings based on our 957 * output timings. To do that, we have to set the output 958 * timings, even though this isn't really the right place in 959 * the sequence to do it. Oh well. 960 */ 961 if (psb_intel_sdvo->is_tv) { 962 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode)) 963 return false; 964 965 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo, 966 mode, 967 adjusted_mode); 968 } else if (psb_intel_sdvo->is_lvds) { 969 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, 970 psb_intel_sdvo->sdvo_lvds_fixed_mode)) 971 return false; 972 973 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo, 974 mode, 975 adjusted_mode); 976 } 977 978 /* Make the CRTC code factor in the SDVO pixel multiplier. The 979 * SDVO device will factor out the multiplier during mode_set. 980 */ 981 multiplier = psb_intel_sdvo_get_pixel_multiplier(adjusted_mode); 982 psb_intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); 983 984 return true; 985} 986 987static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder, 988 struct drm_display_mode *mode, 989 struct drm_display_mode *adjusted_mode) 990{ 991 struct drm_device *dev = encoder->dev; 992 struct drm_crtc *crtc = encoder->crtc; 993 struct gma_crtc *gma_crtc = to_gma_crtc(crtc); 994 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 995 u32 sdvox; 996 struct psb_intel_sdvo_in_out_map in_out; 997 struct psb_intel_sdvo_dtd input_dtd; 998 int pixel_multiplier = psb_intel_mode_get_pixel_multiplier(adjusted_mode); 999 int rate; 1000 int need_aux = IS_MRST(dev) ? 1 : 0; 1001 1002 if (!mode) 1003 return; 1004 1005 /* First, set the input mapping for the first input to our controlled 1006 * output. This is only correct if we're a single-input device, in 1007 * which case the first input is the output from the appropriate SDVO 1008 * channel on the motherboard. In a two-input device, the first input 1009 * will be SDVOB and the second SDVOC. 1010 */ 1011 in_out.in0 = psb_intel_sdvo->attached_output; 1012 in_out.in1 = 0; 1013 1014 psb_intel_sdvo_set_value(psb_intel_sdvo, 1015 SDVO_CMD_SET_IN_OUT_MAP, 1016 &in_out, sizeof(in_out)); 1017 1018 /* Set the output timings to the screen */ 1019 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 1020 psb_intel_sdvo->attached_output)) 1021 return; 1022 1023 /* We have tried to get input timing in mode_fixup, and filled into 1024 * adjusted_mode. 1025 */ 1026 if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) { 1027 input_dtd = psb_intel_sdvo->input_dtd; 1028 } else { 1029 /* Set the output timing to the screen */ 1030 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 1031 psb_intel_sdvo->attached_output)) 1032 return; 1033 1034 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1035 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd); 1036 } 1037 1038 /* Set the input timing to the screen. Assume always input 0. */ 1039 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 1040 return; 1041 1042 if (psb_intel_sdvo->has_hdmi_monitor) { 1043 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI); 1044 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo, 1045 SDVO_COLORIMETRY_RGB256); 1046 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo); 1047 } else 1048 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI); 1049 1050 if (psb_intel_sdvo->is_tv && 1051 !psb_intel_sdvo_set_tv_format(psb_intel_sdvo)) 1052 return; 1053 1054 (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd); 1055 1056 switch (pixel_multiplier) { 1057 default: 1058 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1059 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1060 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1061 } 1062 if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate)) 1063 return; 1064 1065 /* Set the SDVO control regs. */ 1066 if (need_aux) 1067 sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg); 1068 else 1069 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg); 1070 1071 switch (psb_intel_sdvo->sdvo_reg) { 1072 case SDVOB: 1073 sdvox &= SDVOB_PRESERVE_MASK; 1074 break; 1075 case SDVOC: 1076 sdvox &= SDVOC_PRESERVE_MASK; 1077 break; 1078 } 1079 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1080 1081 if (gma_crtc->pipe == 1) 1082 sdvox |= SDVO_PIPE_B_SELECT; 1083 if (psb_intel_sdvo->has_hdmi_audio) 1084 sdvox |= SDVO_AUDIO_ENABLE; 1085 1086 /* FIXME: Check if this is needed for PSB 1087 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; 1088 */ 1089 1090 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL) 1091 sdvox |= SDVO_STALL_SELECT; 1092 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox); 1093} 1094 1095static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode) 1096{ 1097 struct drm_device *dev = encoder->dev; 1098 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 1099 u32 temp; 1100 int i; 1101 int need_aux = IS_MRST(dev) ? 1 : 0; 1102 1103 switch (mode) { 1104 case DRM_MODE_DPMS_ON: 1105 DRM_DEBUG("DPMS_ON"); 1106 break; 1107 case DRM_MODE_DPMS_OFF: 1108 DRM_DEBUG("DPMS_OFF"); 1109 break; 1110 default: 1111 DRM_DEBUG("DPMS: %d", mode); 1112 } 1113 1114 if (mode != DRM_MODE_DPMS_ON) { 1115 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0); 1116 if (0) 1117 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode); 1118 1119 if (mode == DRM_MODE_DPMS_OFF) { 1120 if (need_aux) 1121 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg); 1122 else 1123 temp = REG_READ(psb_intel_sdvo->sdvo_reg); 1124 1125 if ((temp & SDVO_ENABLE) != 0) { 1126 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE); 1127 } 1128 } 1129 } else { 1130 bool input1, input2; 1131 u8 status; 1132 1133 if (need_aux) 1134 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg); 1135 else 1136 temp = REG_READ(psb_intel_sdvo->sdvo_reg); 1137 1138 if ((temp & SDVO_ENABLE) == 0) 1139 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE); 1140 1141 for (i = 0; i < 2; i++) 1142 gma_wait_for_vblank(dev); 1143 1144 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2); 1145 /* Warn if the device reported failure to sync. 1146 * A lot of SDVO devices fail to notify of sync, but it's 1147 * a given it the status is a success, we succeeded. 1148 */ 1149 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1150 DRM_DEBUG_KMS("First %s output reported failure to " 1151 "sync\n", SDVO_NAME(psb_intel_sdvo)); 1152 } 1153 1154 if (0) 1155 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode); 1156 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output); 1157 } 1158 return; 1159} 1160 1161static int psb_intel_sdvo_mode_valid(struct drm_connector *connector, 1162 struct drm_display_mode *mode) 1163{ 1164 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1165 1166 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1167 return MODE_NO_DBLESCAN; 1168 1169 if (psb_intel_sdvo->pixel_clock_min > mode->clock) 1170 return MODE_CLOCK_LOW; 1171 1172 if (psb_intel_sdvo->pixel_clock_max < mode->clock) 1173 return MODE_CLOCK_HIGH; 1174 1175 if (psb_intel_sdvo->is_lvds) { 1176 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1177 return MODE_PANEL; 1178 1179 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1180 return MODE_PANEL; 1181 } 1182 1183 return MODE_OK; 1184} 1185 1186static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps) 1187{ 1188 BUILD_BUG_ON(sizeof(*caps) != 8); 1189 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 1190 SDVO_CMD_GET_DEVICE_CAPS, 1191 caps, sizeof(*caps))) 1192 return false; 1193 1194 DRM_DEBUG_KMS("SDVO capabilities:\n" 1195 " vendor_id: %d\n" 1196 " device_id: %d\n" 1197 " device_rev_id: %d\n" 1198 " sdvo_version_major: %d\n" 1199 " sdvo_version_minor: %d\n" 1200 " sdvo_inputs_mask: %d\n" 1201 " smooth_scaling: %d\n" 1202 " sharp_scaling: %d\n" 1203 " up_scaling: %d\n" 1204 " down_scaling: %d\n" 1205 " stall_support: %d\n" 1206 " output_flags: %d\n", 1207 caps->vendor_id, 1208 caps->device_id, 1209 caps->device_rev_id, 1210 caps->sdvo_version_major, 1211 caps->sdvo_version_minor, 1212 caps->sdvo_inputs_mask, 1213 caps->smooth_scaling, 1214 caps->sharp_scaling, 1215 caps->up_scaling, 1216 caps->down_scaling, 1217 caps->stall_support, 1218 caps->output_flags); 1219 1220 return true; 1221} 1222 1223/* No use! */ 1224#if 0 1225struct drm_connector* psb_intel_sdvo_find(struct drm_device *dev, int sdvoB) 1226{ 1227 struct drm_connector *connector = NULL; 1228 struct psb_intel_sdvo *iout = NULL; 1229 struct psb_intel_sdvo *sdvo; 1230 1231 /* find the sdvo connector */ 1232 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 1233 iout = to_psb_intel_sdvo(connector); 1234 1235 if (iout->type != INTEL_OUTPUT_SDVO) 1236 continue; 1237 1238 sdvo = iout->dev_priv; 1239 1240 if (sdvo->sdvo_reg == SDVOB && sdvoB) 1241 return connector; 1242 1243 if (sdvo->sdvo_reg == SDVOC && !sdvoB) 1244 return connector; 1245 1246 } 1247 1248 return NULL; 1249} 1250 1251int psb_intel_sdvo_supports_hotplug(struct drm_connector *connector) 1252{ 1253 u8 response[2]; 1254 u8 status; 1255 struct psb_intel_sdvo *psb_intel_sdvo; 1256 DRM_DEBUG_KMS("\n"); 1257 1258 if (!connector) 1259 return 0; 1260 1261 psb_intel_sdvo = to_psb_intel_sdvo(connector); 1262 1263 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1264 &response, 2) && response[0]; 1265} 1266 1267void psb_intel_sdvo_set_hotplug(struct drm_connector *connector, int on) 1268{ 1269 u8 response[2]; 1270 u8 status; 1271 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(connector); 1272 1273 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); 1274 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2); 1275 1276 if (on) { 1277 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); 1278 status = psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2); 1279 1280 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); 1281 } else { 1282 response[0] = 0; 1283 response[1] = 0; 1284 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); 1285 } 1286 1287 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); 1288 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2); 1289} 1290#endif 1291 1292static bool 1293psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo) 1294{ 1295 /* Is there more than one type of output? */ 1296 int caps = psb_intel_sdvo->caps.output_flags & 0xf; 1297 return caps & -caps; 1298} 1299 1300static struct edid * 1301psb_intel_sdvo_get_edid(struct drm_connector *connector) 1302{ 1303 struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector); 1304 return drm_get_edid(connector, &sdvo->ddc); 1305} 1306 1307/* Mac mini hack -- use the same DDC as the analog connector */ 1308static struct edid * 1309psb_intel_sdvo_get_analog_edid(struct drm_connector *connector) 1310{ 1311 struct drm_psb_private *dev_priv = connector->dev->dev_private; 1312 1313 return drm_get_edid(connector, 1314 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter); 1315} 1316 1317static enum drm_connector_status 1318psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector) 1319{ 1320 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1321 enum drm_connector_status status; 1322 struct edid *edid; 1323 1324 edid = psb_intel_sdvo_get_edid(connector); 1325 1326 if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) { 1327 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus; 1328 1329 /* 1330 * Don't use the 1 as the argument of DDC bus switch to get 1331 * the EDID. It is used for SDVO SPD ROM. 1332 */ 1333 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1334 psb_intel_sdvo->ddc_bus = ddc; 1335 edid = psb_intel_sdvo_get_edid(connector); 1336 if (edid) 1337 break; 1338 } 1339 /* 1340 * If we found the EDID on the other bus, 1341 * assume that is the correct DDC bus. 1342 */ 1343 if (edid == NULL) 1344 psb_intel_sdvo->ddc_bus = saved_ddc; 1345 } 1346 1347 /* 1348 * When there is no edid and no monitor is connected with VGA 1349 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1350 */ 1351 if (edid == NULL) 1352 edid = psb_intel_sdvo_get_analog_edid(connector); 1353 1354 status = connector_status_unknown; 1355 if (edid != NULL) { 1356 /* DDC bus is shared, match EDID to connector type */ 1357 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1358 status = connector_status_connected; 1359 if (psb_intel_sdvo->is_hdmi) { 1360 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1361 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1362 } 1363 } else 1364 status = connector_status_disconnected; 1365 kfree(edid); 1366 } 1367 1368 if (status == connector_status_connected) { 1369 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1370 if (psb_intel_sdvo_connector->force_audio) 1371 psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0; 1372 } 1373 1374 return status; 1375} 1376 1377static enum drm_connector_status 1378psb_intel_sdvo_detect(struct drm_connector *connector, bool force) 1379{ 1380 uint16_t response; 1381 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1382 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1383 enum drm_connector_status ret; 1384 1385 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, 1386 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0)) 1387 return connector_status_unknown; 1388 1389 /* add 30ms delay when the output type might be TV */ 1390 if (psb_intel_sdvo->caps.output_flags & 1391 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0)) 1392 mdelay(30); 1393 1394 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2)) 1395 return connector_status_unknown; 1396 1397 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1398 response & 0xff, response >> 8, 1399 psb_intel_sdvo_connector->output_flag); 1400 1401 if (response == 0) 1402 return connector_status_disconnected; 1403 1404 psb_intel_sdvo->attached_output = response; 1405 1406 psb_intel_sdvo->has_hdmi_monitor = false; 1407 psb_intel_sdvo->has_hdmi_audio = false; 1408 1409 if ((psb_intel_sdvo_connector->output_flag & response) == 0) 1410 ret = connector_status_disconnected; 1411 else if (IS_TMDS(psb_intel_sdvo_connector)) 1412 ret = psb_intel_sdvo_hdmi_sink_detect(connector); 1413 else { 1414 struct edid *edid; 1415 1416 /* if we have an edid check it matches the connection */ 1417 edid = psb_intel_sdvo_get_edid(connector); 1418 if (edid == NULL) 1419 edid = psb_intel_sdvo_get_analog_edid(connector); 1420 if (edid != NULL) { 1421 if (edid->input & DRM_EDID_INPUT_DIGITAL) 1422 ret = connector_status_disconnected; 1423 else 1424 ret = connector_status_connected; 1425 kfree(edid); 1426 } else 1427 ret = connector_status_connected; 1428 } 1429 1430 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1431 if (ret == connector_status_connected) { 1432 psb_intel_sdvo->is_tv = false; 1433 psb_intel_sdvo->is_lvds = false; 1434 psb_intel_sdvo->base.needs_tv_clock = false; 1435 1436 if (response & SDVO_TV_MASK) { 1437 psb_intel_sdvo->is_tv = true; 1438 psb_intel_sdvo->base.needs_tv_clock = true; 1439 } 1440 if (response & SDVO_LVDS_MASK) 1441 psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1442 } 1443 1444 return ret; 1445} 1446 1447static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1448{ 1449 struct edid *edid; 1450 1451 /* set the bus switch and get the modes */ 1452 edid = psb_intel_sdvo_get_edid(connector); 1453 1454 /* 1455 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1456 * link between analog and digital outputs. So, if the regular SDVO 1457 * DDC fails, check to see if the analog output is disconnected, in 1458 * which case we'll look there for the digital DDC data. 1459 */ 1460 if (edid == NULL) 1461 edid = psb_intel_sdvo_get_analog_edid(connector); 1462 1463 if (edid != NULL) { 1464 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1465 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1466 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector); 1467 1468 if (connector_is_digital == monitor_is_digital) { 1469 drm_mode_connector_update_edid_property(connector, edid); 1470 drm_add_edid_modes(connector, edid); 1471 } 1472 1473 kfree(edid); 1474 } 1475} 1476 1477/* 1478 * Set of SDVO TV modes. 1479 * Note! This is in reply order (see loop in get_tv_modes). 1480 * XXX: all 60Hz refresh? 1481 */ 1482static const struct drm_display_mode sdvo_tv_modes[] = { 1483 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1484 416, 0, 200, 201, 232, 233, 0, 1485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1486 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1487 416, 0, 240, 241, 272, 273, 0, 1488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1489 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1490 496, 0, 300, 301, 332, 333, 0, 1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1492 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1493 736, 0, 350, 351, 382, 383, 0, 1494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1495 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1496 736, 0, 400, 401, 432, 433, 0, 1497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1498 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1499 736, 0, 480, 481, 512, 513, 0, 1500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1501 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1502 800, 0, 480, 481, 512, 513, 0, 1503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1504 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1505 800, 0, 576, 577, 608, 609, 0, 1506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1507 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1508 816, 0, 350, 351, 382, 383, 0, 1509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1510 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1511 816, 0, 400, 401, 432, 433, 0, 1512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1513 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1514 816, 0, 480, 481, 512, 513, 0, 1515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1516 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1517 816, 0, 540, 541, 572, 573, 0, 1518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1519 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1520 816, 0, 576, 577, 608, 609, 0, 1521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1522 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1523 864, 0, 576, 577, 608, 609, 0, 1524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1525 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1526 896, 0, 600, 601, 632, 633, 0, 1527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1528 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1529 928, 0, 624, 625, 656, 657, 0, 1530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1531 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1532 1016, 0, 766, 767, 798, 799, 0, 1533 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1534 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1535 1120, 0, 768, 769, 800, 801, 0, 1536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1537 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1538 1376, 0, 1024, 1025, 1056, 1057, 0, 1539 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1540}; 1541 1542static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector) 1543{ 1544 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1545 struct psb_intel_sdvo_sdtv_resolution_request tv_res; 1546 uint32_t reply = 0, format_map = 0; 1547 int i; 1548 1549 /* Read the list of supported input resolutions for the selected TV 1550 * format. 1551 */ 1552 format_map = 1 << psb_intel_sdvo->tv_format_index; 1553 memcpy(&tv_res, &format_map, 1554 min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request))); 1555 1556 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output)) 1557 return; 1558 1559 BUILD_BUG_ON(sizeof(tv_res) != 3); 1560 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, 1561 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1562 &tv_res, sizeof(tv_res))) 1563 return; 1564 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3)) 1565 return; 1566 1567 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1568 if (reply & (1 << i)) { 1569 struct drm_display_mode *nmode; 1570 nmode = drm_mode_duplicate(connector->dev, 1571 &sdvo_tv_modes[i]); 1572 if (nmode) 1573 drm_mode_probed_add(connector, nmode); 1574 } 1575} 1576 1577static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1578{ 1579 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1580 struct drm_psb_private *dev_priv = connector->dev->dev_private; 1581 struct drm_display_mode *newmode; 1582 1583 /* 1584 * Attempt to get the mode list from DDC. 1585 * Assume that the preferred modes are 1586 * arranged in priority order. 1587 */ 1588 psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c); 1589 if (list_empty(&connector->probed_modes) == false) 1590 goto end; 1591 1592 /* Fetch modes from VBT */ 1593 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { 1594 newmode = drm_mode_duplicate(connector->dev, 1595 dev_priv->sdvo_lvds_vbt_mode); 1596 if (newmode != NULL) { 1597 /* Guarantee the mode is preferred */ 1598 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1599 DRM_MODE_TYPE_DRIVER); 1600 drm_mode_probed_add(connector, newmode); 1601 } 1602 } 1603 1604end: 1605 list_for_each_entry(newmode, &connector->probed_modes, head) { 1606 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1607 psb_intel_sdvo->sdvo_lvds_fixed_mode = 1608 drm_mode_duplicate(connector->dev, newmode); 1609 1610 drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode, 1611 0); 1612 1613 psb_intel_sdvo->is_lvds = true; 1614 break; 1615 } 1616 } 1617 1618} 1619 1620static int psb_intel_sdvo_get_modes(struct drm_connector *connector) 1621{ 1622 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1623 1624 if (IS_TV(psb_intel_sdvo_connector)) 1625 psb_intel_sdvo_get_tv_modes(connector); 1626 else if (IS_LVDS(psb_intel_sdvo_connector)) 1627 psb_intel_sdvo_get_lvds_modes(connector); 1628 else 1629 psb_intel_sdvo_get_ddc_modes(connector); 1630 1631 return !list_empty(&connector->probed_modes); 1632} 1633 1634static void psb_intel_sdvo_destroy(struct drm_connector *connector) 1635{ 1636 drm_connector_unregister(connector); 1637 drm_connector_cleanup(connector); 1638 kfree(connector); 1639} 1640 1641static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 1642{ 1643 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1644 struct edid *edid; 1645 bool has_audio = false; 1646 1647 if (!psb_intel_sdvo->is_hdmi) 1648 return false; 1649 1650 edid = psb_intel_sdvo_get_edid(connector); 1651 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 1652 has_audio = drm_detect_monitor_audio(edid); 1653 1654 return has_audio; 1655} 1656 1657static int 1658psb_intel_sdvo_set_property(struct drm_connector *connector, 1659 struct drm_property *property, 1660 uint64_t val) 1661{ 1662 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1663 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1664 struct drm_psb_private *dev_priv = connector->dev->dev_private; 1665 uint16_t temp_value; 1666 uint8_t cmd; 1667 int ret; 1668 1669 ret = drm_object_property_set_value(&connector->base, property, val); 1670 if (ret) 1671 return ret; 1672 1673 if (property == dev_priv->force_audio_property) { 1674 int i = val; 1675 bool has_audio; 1676 1677 if (i == psb_intel_sdvo_connector->force_audio) 1678 return 0; 1679 1680 psb_intel_sdvo_connector->force_audio = i; 1681 1682 if (i == 0) 1683 has_audio = psb_intel_sdvo_detect_hdmi_audio(connector); 1684 else 1685 has_audio = i > 0; 1686 1687 if (has_audio == psb_intel_sdvo->has_hdmi_audio) 1688 return 0; 1689 1690 psb_intel_sdvo->has_hdmi_audio = has_audio; 1691 goto done; 1692 } 1693 1694 if (property == dev_priv->broadcast_rgb_property) { 1695 if (val == !!psb_intel_sdvo->color_range) 1696 return 0; 1697 1698 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; 1699 goto done; 1700 } 1701 1702#define CHECK_PROPERTY(name, NAME) \ 1703 if (psb_intel_sdvo_connector->name == property) { \ 1704 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \ 1705 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 1706 cmd = SDVO_CMD_SET_##NAME; \ 1707 psb_intel_sdvo_connector->cur_##name = temp_value; \ 1708 goto set_value; \ 1709 } 1710 1711 if (property == psb_intel_sdvo_connector->tv_format) { 1712 if (val >= TV_FORMAT_NUM) 1713 return -EINVAL; 1714 1715 if (psb_intel_sdvo->tv_format_index == 1716 psb_intel_sdvo_connector->tv_format_supported[val]) 1717 return 0; 1718 1719 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val]; 1720 goto done; 1721 } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) { 1722 temp_value = val; 1723 if (psb_intel_sdvo_connector->left == property) { 1724 drm_object_property_set_value(&connector->base, 1725 psb_intel_sdvo_connector->right, val); 1726 if (psb_intel_sdvo_connector->left_margin == temp_value) 1727 return 0; 1728 1729 psb_intel_sdvo_connector->left_margin = temp_value; 1730 psb_intel_sdvo_connector->right_margin = temp_value; 1731 temp_value = psb_intel_sdvo_connector->max_hscan - 1732 psb_intel_sdvo_connector->left_margin; 1733 cmd = SDVO_CMD_SET_OVERSCAN_H; 1734 goto set_value; 1735 } else if (psb_intel_sdvo_connector->right == property) { 1736 drm_object_property_set_value(&connector->base, 1737 psb_intel_sdvo_connector->left, val); 1738 if (psb_intel_sdvo_connector->right_margin == temp_value) 1739 return 0; 1740 1741 psb_intel_sdvo_connector->left_margin = temp_value; 1742 psb_intel_sdvo_connector->right_margin = temp_value; 1743 temp_value = psb_intel_sdvo_connector->max_hscan - 1744 psb_intel_sdvo_connector->left_margin; 1745 cmd = SDVO_CMD_SET_OVERSCAN_H; 1746 goto set_value; 1747 } else if (psb_intel_sdvo_connector->top == property) { 1748 drm_object_property_set_value(&connector->base, 1749 psb_intel_sdvo_connector->bottom, val); 1750 if (psb_intel_sdvo_connector->top_margin == temp_value) 1751 return 0; 1752 1753 psb_intel_sdvo_connector->top_margin = temp_value; 1754 psb_intel_sdvo_connector->bottom_margin = temp_value; 1755 temp_value = psb_intel_sdvo_connector->max_vscan - 1756 psb_intel_sdvo_connector->top_margin; 1757 cmd = SDVO_CMD_SET_OVERSCAN_V; 1758 goto set_value; 1759 } else if (psb_intel_sdvo_connector->bottom == property) { 1760 drm_object_property_set_value(&connector->base, 1761 psb_intel_sdvo_connector->top, val); 1762 if (psb_intel_sdvo_connector->bottom_margin == temp_value) 1763 return 0; 1764 1765 psb_intel_sdvo_connector->top_margin = temp_value; 1766 psb_intel_sdvo_connector->bottom_margin = temp_value; 1767 temp_value = psb_intel_sdvo_connector->max_vscan - 1768 psb_intel_sdvo_connector->top_margin; 1769 cmd = SDVO_CMD_SET_OVERSCAN_V; 1770 goto set_value; 1771 } 1772 CHECK_PROPERTY(hpos, HPOS) 1773 CHECK_PROPERTY(vpos, VPOS) 1774 CHECK_PROPERTY(saturation, SATURATION) 1775 CHECK_PROPERTY(contrast, CONTRAST) 1776 CHECK_PROPERTY(hue, HUE) 1777 CHECK_PROPERTY(brightness, BRIGHTNESS) 1778 CHECK_PROPERTY(sharpness, SHARPNESS) 1779 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 1780 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 1781 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 1782 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 1783 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 1784 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 1785 } 1786 1787 return -EINVAL; /* unknown property */ 1788 1789set_value: 1790 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2)) 1791 return -EIO; 1792 1793 1794done: 1795 if (psb_intel_sdvo->base.base.crtc) { 1796 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc; 1797 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, 1798 crtc->y, crtc->primary->fb); 1799 } 1800 1801 return 0; 1802#undef CHECK_PROPERTY 1803} 1804 1805static void psb_intel_sdvo_save(struct drm_connector *connector) 1806{ 1807 struct drm_device *dev = connector->dev; 1808 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 1809 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base); 1810 1811 sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg); 1812} 1813 1814static void psb_intel_sdvo_restore(struct drm_connector *connector) 1815{ 1816 struct drm_device *dev = connector->dev; 1817 struct drm_encoder *encoder = &gma_attached_encoder(connector)->base; 1818 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder); 1819 struct drm_crtc *crtc = encoder->crtc; 1820 1821 REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO); 1822 1823 /* Force a full mode set on the crtc. We're supposed to have the 1824 mode_config lock already. */ 1825 if (connector->status == connector_status_connected) 1826 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y, 1827 NULL); 1828} 1829 1830static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = { 1831 .dpms = psb_intel_sdvo_dpms, 1832 .mode_fixup = psb_intel_sdvo_mode_fixup, 1833 .prepare = gma_encoder_prepare, 1834 .mode_set = psb_intel_sdvo_mode_set, 1835 .commit = gma_encoder_commit, 1836}; 1837 1838static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = { 1839 .dpms = drm_helper_connector_dpms, 1840 .save = psb_intel_sdvo_save, 1841 .restore = psb_intel_sdvo_restore, 1842 .detect = psb_intel_sdvo_detect, 1843 .fill_modes = drm_helper_probe_single_connector_modes, 1844 .set_property = psb_intel_sdvo_set_property, 1845 .destroy = psb_intel_sdvo_destroy, 1846}; 1847 1848static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = { 1849 .get_modes = psb_intel_sdvo_get_modes, 1850 .mode_valid = psb_intel_sdvo_mode_valid, 1851 .best_encoder = gma_best_encoder, 1852}; 1853 1854static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder) 1855{ 1856 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 1857 1858 if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL) 1859 drm_mode_destroy(encoder->dev, 1860 psb_intel_sdvo->sdvo_lvds_fixed_mode); 1861 1862 i2c_del_adapter(&psb_intel_sdvo->ddc); 1863 gma_encoder_destroy(encoder); 1864} 1865 1866static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = { 1867 .destroy = psb_intel_sdvo_enc_destroy, 1868}; 1869 1870static void 1871psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo) 1872{ 1873 /* FIXME: At the moment, ddc_bus = 2 is the only thing that works. 1874 * We need to figure out if this is true for all available poulsbo 1875 * hardware, or if we need to fiddle with the guessing code above. 1876 * The problem might go away if we can parse sdvo mappings from bios */ 1877 sdvo->ddc_bus = 2; 1878 1879#if 0 1880 uint16_t mask = 0; 1881 unsigned int num_bits; 1882 1883 /* Make a mask of outputs less than or equal to our own priority in the 1884 * list. 1885 */ 1886 switch (sdvo->controlled_output) { 1887 case SDVO_OUTPUT_LVDS1: 1888 mask |= SDVO_OUTPUT_LVDS1; 1889 case SDVO_OUTPUT_LVDS0: 1890 mask |= SDVO_OUTPUT_LVDS0; 1891 case SDVO_OUTPUT_TMDS1: 1892 mask |= SDVO_OUTPUT_TMDS1; 1893 case SDVO_OUTPUT_TMDS0: 1894 mask |= SDVO_OUTPUT_TMDS0; 1895 case SDVO_OUTPUT_RGB1: 1896 mask |= SDVO_OUTPUT_RGB1; 1897 case SDVO_OUTPUT_RGB0: 1898 mask |= SDVO_OUTPUT_RGB0; 1899 break; 1900 } 1901 1902 /* Count bits to find what number we are in the priority list. */ 1903 mask &= sdvo->caps.output_flags; 1904 num_bits = hweight16(mask); 1905 /* If more than 3 outputs, default to DDC bus 3 for now. */ 1906 if (num_bits > 3) 1907 num_bits = 3; 1908 1909 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 1910 sdvo->ddc_bus = 1 << num_bits; 1911#endif 1912} 1913 1914/** 1915 * Choose the appropriate DDC bus for control bus switch command for this 1916 * SDVO output based on the controlled output. 1917 * 1918 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 1919 * outputs, then LVDS outputs. 1920 */ 1921static void 1922psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv, 1923 struct psb_intel_sdvo *sdvo, u32 reg) 1924{ 1925 struct sdvo_device_mapping *mapping; 1926 1927 if (IS_SDVOB(reg)) 1928 mapping = &(dev_priv->sdvo_mappings[0]); 1929 else 1930 mapping = &(dev_priv->sdvo_mappings[1]); 1931 1932 if (mapping->initialized) 1933 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 1934 else 1935 psb_intel_sdvo_guess_ddc_bus(sdvo); 1936} 1937 1938static void 1939psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv, 1940 struct psb_intel_sdvo *sdvo, u32 reg) 1941{ 1942 struct sdvo_device_mapping *mapping; 1943 u8 pin, speed; 1944 1945 if (IS_SDVOB(reg)) 1946 mapping = &dev_priv->sdvo_mappings[0]; 1947 else 1948 mapping = &dev_priv->sdvo_mappings[1]; 1949 1950 pin = GMBUS_PORT_DPB; 1951 speed = GMBUS_RATE_1MHZ >> 8; 1952 if (mapping->initialized) { 1953 pin = mapping->i2c_pin; 1954 speed = mapping->i2c_speed; 1955 } 1956 1957 if (pin < GMBUS_NUM_PORTS) { 1958 sdvo->i2c = &dev_priv->gmbus[pin].adapter; 1959 gma_intel_gmbus_set_speed(sdvo->i2c, speed); 1960 gma_intel_gmbus_force_bit(sdvo->i2c, true); 1961 } else 1962 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter; 1963} 1964 1965static bool 1966psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device) 1967{ 1968 return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo); 1969} 1970 1971static u8 1972psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg) 1973{ 1974 struct drm_psb_private *dev_priv = dev->dev_private; 1975 struct sdvo_device_mapping *my_mapping, *other_mapping; 1976 1977 if (IS_SDVOB(sdvo_reg)) { 1978 my_mapping = &dev_priv->sdvo_mappings[0]; 1979 other_mapping = &dev_priv->sdvo_mappings[1]; 1980 } else { 1981 my_mapping = &dev_priv->sdvo_mappings[1]; 1982 other_mapping = &dev_priv->sdvo_mappings[0]; 1983 } 1984 1985 /* If the BIOS described our SDVO device, take advantage of it. */ 1986 if (my_mapping->slave_addr) 1987 return my_mapping->slave_addr; 1988 1989 /* If the BIOS only described a different SDVO device, use the 1990 * address that it isn't using. 1991 */ 1992 if (other_mapping->slave_addr) { 1993 if (other_mapping->slave_addr == 0x70) 1994 return 0x72; 1995 else 1996 return 0x70; 1997 } 1998 1999 /* No SDVO device info is found for another DVO port, 2000 * so use mapping assumption we had before BIOS parsing. 2001 */ 2002 if (IS_SDVOB(sdvo_reg)) 2003 return 0x70; 2004 else 2005 return 0x72; 2006} 2007 2008static void 2009psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector, 2010 struct psb_intel_sdvo *encoder) 2011{ 2012 drm_connector_init(encoder->base.base.dev, 2013 &connector->base.base, 2014 &psb_intel_sdvo_connector_funcs, 2015 connector->base.base.connector_type); 2016 2017 drm_connector_helper_add(&connector->base.base, 2018 &psb_intel_sdvo_connector_helper_funcs); 2019 2020 connector->base.base.interlace_allowed = 0; 2021 connector->base.base.doublescan_allowed = 0; 2022 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2023 2024 gma_connector_attach_encoder(&connector->base, &encoder->base); 2025 drm_connector_register(&connector->base.base); 2026} 2027 2028static void 2029psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector) 2030{ 2031 /* FIXME: We don't support HDMI at the moment 2032 struct drm_device *dev = connector->base.base.dev; 2033 2034 intel_attach_force_audio_property(&connector->base.base); 2035 intel_attach_broadcast_rgb_property(&connector->base.base); 2036 */ 2037} 2038 2039static bool 2040psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2041{ 2042 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2043 struct drm_connector *connector; 2044 struct gma_connector *intel_connector; 2045 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2046 2047 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2048 if (!psb_intel_sdvo_connector) 2049 return false; 2050 2051 if (device == 0) { 2052 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2053 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2054 } else if (device == 1) { 2055 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2056 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2057 } 2058 2059 intel_connector = &psb_intel_sdvo_connector->base; 2060 connector = &intel_connector->base; 2061 // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2062 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2063 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2064 2065 if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) { 2066 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2067 psb_intel_sdvo->is_hdmi = true; 2068 } 2069 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2070 (1 << INTEL_ANALOG_CLONE_BIT)); 2071 2072 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2073 if (psb_intel_sdvo->is_hdmi) 2074 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector); 2075 2076 return true; 2077} 2078 2079static bool 2080psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type) 2081{ 2082 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2083 struct drm_connector *connector; 2084 struct gma_connector *intel_connector; 2085 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2086 2087 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2088 if (!psb_intel_sdvo_connector) 2089 return false; 2090 2091 intel_connector = &psb_intel_sdvo_connector->base; 2092 connector = &intel_connector->base; 2093 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2094 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2095 2096 psb_intel_sdvo->controlled_output |= type; 2097 psb_intel_sdvo_connector->output_flag = type; 2098 2099 psb_intel_sdvo->is_tv = true; 2100 psb_intel_sdvo->base.needs_tv_clock = true; 2101 psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; 2102 2103 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2104 2105 if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type)) 2106 goto err; 2107 2108 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector)) 2109 goto err; 2110 2111 return true; 2112 2113err: 2114 psb_intel_sdvo_destroy(connector); 2115 return false; 2116} 2117 2118static bool 2119psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2120{ 2121 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2122 struct drm_connector *connector; 2123 struct gma_connector *intel_connector; 2124 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2125 2126 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2127 if (!psb_intel_sdvo_connector) 2128 return false; 2129 2130 intel_connector = &psb_intel_sdvo_connector->base; 2131 connector = &intel_connector->base; 2132 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2133 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2134 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2135 2136 if (device == 0) { 2137 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2138 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2139 } else if (device == 1) { 2140 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2141 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2142 } 2143 2144 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2145 (1 << INTEL_ANALOG_CLONE_BIT)); 2146 2147 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, 2148 psb_intel_sdvo); 2149 return true; 2150} 2151 2152static bool 2153psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2154{ 2155 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2156 struct drm_connector *connector; 2157 struct gma_connector *intel_connector; 2158 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2159 2160 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2161 if (!psb_intel_sdvo_connector) 2162 return false; 2163 2164 intel_connector = &psb_intel_sdvo_connector->base; 2165 connector = &intel_connector->base; 2166 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2167 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2168 2169 if (device == 0) { 2170 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2171 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2172 } else if (device == 1) { 2173 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2174 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2175 } 2176 2177 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) | 2178 (1 << INTEL_SDVO_LVDS_CLONE_BIT)); 2179 2180 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2181 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector)) 2182 goto err; 2183 2184 return true; 2185 2186err: 2187 psb_intel_sdvo_destroy(connector); 2188 return false; 2189} 2190 2191static bool 2192psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags) 2193{ 2194 psb_intel_sdvo->is_tv = false; 2195 psb_intel_sdvo->base.needs_tv_clock = false; 2196 psb_intel_sdvo->is_lvds = false; 2197 2198 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2199 2200 if (flags & SDVO_OUTPUT_TMDS0) 2201 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0)) 2202 return false; 2203 2204 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2205 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1)) 2206 return false; 2207 2208 /* TV has no XXX1 function block */ 2209 if (flags & SDVO_OUTPUT_SVID0) 2210 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0)) 2211 return false; 2212 2213 if (flags & SDVO_OUTPUT_CVBS0) 2214 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0)) 2215 return false; 2216 2217 if (flags & SDVO_OUTPUT_RGB0) 2218 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0)) 2219 return false; 2220 2221 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2222 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1)) 2223 return false; 2224 2225 if (flags & SDVO_OUTPUT_LVDS0) 2226 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0)) 2227 return false; 2228 2229 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2230 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1)) 2231 return false; 2232 2233 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2234 unsigned char bytes[2]; 2235 2236 psb_intel_sdvo->controlled_output = 0; 2237 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2); 2238 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2239 SDVO_NAME(psb_intel_sdvo), 2240 bytes[0], bytes[1]); 2241 return false; 2242 } 2243 psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1); 2244 2245 return true; 2246} 2247 2248static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo, 2249 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2250 int type) 2251{ 2252 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2253 struct psb_intel_sdvo_tv_format format; 2254 uint32_t format_map, i; 2255 2256 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type)) 2257 return false; 2258 2259 BUILD_BUG_ON(sizeof(format) != 6); 2260 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2261 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2262 &format, sizeof(format))) 2263 return false; 2264 2265 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2266 2267 if (format_map == 0) 2268 return false; 2269 2270 psb_intel_sdvo_connector->format_supported_num = 0; 2271 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2272 if (format_map & (1 << i)) 2273 psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i; 2274 2275 2276 psb_intel_sdvo_connector->tv_format = 2277 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2278 "mode", psb_intel_sdvo_connector->format_supported_num); 2279 if (!psb_intel_sdvo_connector->tv_format) 2280 return false; 2281 2282 for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++) 2283 drm_property_add_enum( 2284 psb_intel_sdvo_connector->tv_format, i, 2285 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]); 2286 2287 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0]; 2288 drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base, 2289 psb_intel_sdvo_connector->tv_format, 0); 2290 return true; 2291 2292} 2293 2294#define ENHANCEMENT(name, NAME) do { \ 2295 if (enhancements.name) { \ 2296 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2297 !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2298 return false; \ 2299 psb_intel_sdvo_connector->max_##name = data_value[0]; \ 2300 psb_intel_sdvo_connector->cur_##name = response; \ 2301 psb_intel_sdvo_connector->name = \ 2302 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2303 if (!psb_intel_sdvo_connector->name) return false; \ 2304 drm_object_attach_property(&connector->base, \ 2305 psb_intel_sdvo_connector->name, \ 2306 psb_intel_sdvo_connector->cur_##name); \ 2307 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2308 data_value[0], data_value[1], response); \ 2309 } \ 2310} while(0) 2311 2312static bool 2313psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo, 2314 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2315 struct psb_intel_sdvo_enhancements_reply enhancements) 2316{ 2317 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2318 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base; 2319 uint16_t response, data_value[2]; 2320 2321 /* when horizontal overscan is supported, Add the left/right property */ 2322 if (enhancements.overscan_h) { 2323 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2324 SDVO_CMD_GET_MAX_OVERSCAN_H, 2325 &data_value, 4)) 2326 return false; 2327 2328 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2329 SDVO_CMD_GET_OVERSCAN_H, 2330 &response, 2)) 2331 return false; 2332 2333 psb_intel_sdvo_connector->max_hscan = data_value[0]; 2334 psb_intel_sdvo_connector->left_margin = data_value[0] - response; 2335 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin; 2336 psb_intel_sdvo_connector->left = 2337 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2338 if (!psb_intel_sdvo_connector->left) 2339 return false; 2340 2341 drm_object_attach_property(&connector->base, 2342 psb_intel_sdvo_connector->left, 2343 psb_intel_sdvo_connector->left_margin); 2344 2345 psb_intel_sdvo_connector->right = 2346 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2347 if (!psb_intel_sdvo_connector->right) 2348 return false; 2349 2350 drm_object_attach_property(&connector->base, 2351 psb_intel_sdvo_connector->right, 2352 psb_intel_sdvo_connector->right_margin); 2353 DRM_DEBUG_KMS("h_overscan: max %d, " 2354 "default %d, current %d\n", 2355 data_value[0], data_value[1], response); 2356 } 2357 2358 if (enhancements.overscan_v) { 2359 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2360 SDVO_CMD_GET_MAX_OVERSCAN_V, 2361 &data_value, 4)) 2362 return false; 2363 2364 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2365 SDVO_CMD_GET_OVERSCAN_V, 2366 &response, 2)) 2367 return false; 2368 2369 psb_intel_sdvo_connector->max_vscan = data_value[0]; 2370 psb_intel_sdvo_connector->top_margin = data_value[0] - response; 2371 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin; 2372 psb_intel_sdvo_connector->top = 2373 drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]); 2374 if (!psb_intel_sdvo_connector->top) 2375 return false; 2376 2377 drm_object_attach_property(&connector->base, 2378 psb_intel_sdvo_connector->top, 2379 psb_intel_sdvo_connector->top_margin); 2380 2381 psb_intel_sdvo_connector->bottom = 2382 drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]); 2383 if (!psb_intel_sdvo_connector->bottom) 2384 return false; 2385 2386 drm_object_attach_property(&connector->base, 2387 psb_intel_sdvo_connector->bottom, 2388 psb_intel_sdvo_connector->bottom_margin); 2389 DRM_DEBUG_KMS("v_overscan: max %d, " 2390 "default %d, current %d\n", 2391 data_value[0], data_value[1], response); 2392 } 2393 2394 ENHANCEMENT(hpos, HPOS); 2395 ENHANCEMENT(vpos, VPOS); 2396 ENHANCEMENT(saturation, SATURATION); 2397 ENHANCEMENT(contrast, CONTRAST); 2398 ENHANCEMENT(hue, HUE); 2399 ENHANCEMENT(sharpness, SHARPNESS); 2400 ENHANCEMENT(brightness, BRIGHTNESS); 2401 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2402 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2403 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2404 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2405 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2406 2407 if (enhancements.dot_crawl) { 2408 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2409 return false; 2410 2411 psb_intel_sdvo_connector->max_dot_crawl = 1; 2412 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2413 psb_intel_sdvo_connector->dot_crawl = 2414 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2415 if (!psb_intel_sdvo_connector->dot_crawl) 2416 return false; 2417 2418 drm_object_attach_property(&connector->base, 2419 psb_intel_sdvo_connector->dot_crawl, 2420 psb_intel_sdvo_connector->cur_dot_crawl); 2421 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2422 } 2423 2424 return true; 2425} 2426 2427static bool 2428psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo, 2429 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2430 struct psb_intel_sdvo_enhancements_reply enhancements) 2431{ 2432 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2433 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base; 2434 uint16_t response, data_value[2]; 2435 2436 ENHANCEMENT(brightness, BRIGHTNESS); 2437 2438 return true; 2439} 2440#undef ENHANCEMENT 2441 2442static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo, 2443 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector) 2444{ 2445 union { 2446 struct psb_intel_sdvo_enhancements_reply reply; 2447 uint16_t response; 2448 } enhancements; 2449 2450 BUILD_BUG_ON(sizeof(enhancements) != 2); 2451 2452 enhancements.response = 0; 2453 psb_intel_sdvo_get_value(psb_intel_sdvo, 2454 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2455 &enhancements, sizeof(enhancements)); 2456 if (enhancements.response == 0) { 2457 DRM_DEBUG_KMS("No enhancement is supported\n"); 2458 return true; 2459 } 2460 2461 if (IS_TV(psb_intel_sdvo_connector)) 2462 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply); 2463 else if(IS_LVDS(psb_intel_sdvo_connector)) 2464 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply); 2465 else 2466 return true; 2467} 2468 2469static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, 2470 struct i2c_msg *msgs, 2471 int num) 2472{ 2473 struct psb_intel_sdvo *sdvo = adapter->algo_data; 2474 2475 if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2476 return -EIO; 2477 2478 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); 2479} 2480 2481static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) 2482{ 2483 struct psb_intel_sdvo *sdvo = adapter->algo_data; 2484 return sdvo->i2c->algo->functionality(sdvo->i2c); 2485} 2486 2487static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = { 2488 .master_xfer = psb_intel_sdvo_ddc_proxy_xfer, 2489 .functionality = psb_intel_sdvo_ddc_proxy_func 2490}; 2491 2492static bool 2493psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo, 2494 struct drm_device *dev) 2495{ 2496 sdvo->ddc.owner = THIS_MODULE; 2497 sdvo->ddc.class = I2C_CLASS_DDC; 2498 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); 2499 sdvo->ddc.dev.parent = &dev->pdev->dev; 2500 sdvo->ddc.algo_data = sdvo; 2501 sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy; 2502 2503 return i2c_add_adapter(&sdvo->ddc) == 0; 2504} 2505 2506bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg) 2507{ 2508 struct drm_psb_private *dev_priv = dev->dev_private; 2509 struct gma_encoder *gma_encoder; 2510 struct psb_intel_sdvo *psb_intel_sdvo; 2511 int i; 2512 2513 psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL); 2514 if (!psb_intel_sdvo) 2515 return false; 2516 2517 psb_intel_sdvo->sdvo_reg = sdvo_reg; 2518 psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1; 2519 psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg); 2520 if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) { 2521 kfree(psb_intel_sdvo); 2522 return false; 2523 } 2524 2525 /* encoder type will be decided later */ 2526 gma_encoder = &psb_intel_sdvo->base; 2527 gma_encoder->type = INTEL_OUTPUT_SDVO; 2528 drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs, 0); 2529 2530 /* Read the regs to test if we can talk to the device */ 2531 for (i = 0; i < 0x40; i++) { 2532 u8 byte; 2533 2534 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) { 2535 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", 2536 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2537 goto err; 2538 } 2539 } 2540 2541 if (IS_SDVOB(sdvo_reg)) 2542 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; 2543 else 2544 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; 2545 2546 drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs); 2547 2548 /* In default case sdvo lvds is false */ 2549 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps)) 2550 goto err; 2551 2552 if (psb_intel_sdvo_output_setup(psb_intel_sdvo, 2553 psb_intel_sdvo->caps.output_flags) != true) { 2554 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2555 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2556 goto err; 2557 } 2558 2559 psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg); 2560 2561 /* Set the input timing to the screen. Assume always input 0. */ 2562 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 2563 goto err; 2564 2565 if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo, 2566 &psb_intel_sdvo->pixel_clock_min, 2567 &psb_intel_sdvo->pixel_clock_max)) 2568 goto err; 2569 2570 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2571 "clock range %dMHz - %dMHz, " 2572 "input 1: %c, input 2: %c, " 2573 "output 1: %c, output 2: %c\n", 2574 SDVO_NAME(psb_intel_sdvo), 2575 psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id, 2576 psb_intel_sdvo->caps.device_rev_id, 2577 psb_intel_sdvo->pixel_clock_min / 1000, 2578 psb_intel_sdvo->pixel_clock_max / 1000, 2579 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2580 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2581 /* check currently supported outputs */ 2582 psb_intel_sdvo->caps.output_flags & 2583 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2584 psb_intel_sdvo->caps.output_flags & 2585 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2586 return true; 2587 2588err: 2589 drm_encoder_cleanup(&gma_encoder->base); 2590 i2c_del_adapter(&psb_intel_sdvo->ddc); 2591 kfree(psb_intel_sdvo); 2592 2593 return false; 2594} 2595