1/*
2 * Copyright (c) 2014 The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef __MDP5_CFG_H__
15#define __MDP5_CFG_H__
16
17#include "msm_drv.h"
18
19/*
20 * mdp5_cfg
21 *
22 * This module configures the dynamic offsets used by mdp5.xml.h
23 * (initialized in mdp5_cfg.c)
24 */
25extern const struct mdp5_cfg_hw *mdp5_cfg;
26
27#define MAX_CTL			8
28#define MAX_BASES		8
29#define MAX_SMP_BLOCKS		44
30#define MAX_CLIENTS		32
31
32typedef DECLARE_BITMAP(mdp5_smp_state_t, MAX_SMP_BLOCKS);
33
34#define MDP5_SUB_BLOCK_DEFINITION \
35	int count; \
36	uint32_t base[MAX_BASES]
37
38struct mdp5_sub_block {
39	MDP5_SUB_BLOCK_DEFINITION;
40};
41
42struct mdp5_lm_block {
43	MDP5_SUB_BLOCK_DEFINITION;
44	uint32_t nb_stages;		/* number of stages per blender */
45};
46
47struct mdp5_ctl_block {
48	MDP5_SUB_BLOCK_DEFINITION;
49	uint32_t flush_hw_mask;		/* FLUSH register's hardware mask */
50};
51
52struct mdp5_smp_block {
53	int mmb_count;			/* number of SMP MMBs */
54	int mmb_size;			/* MMB: size in bytes */
55	uint32_t clients[MAX_CLIENTS];	/* SMP port allocation /pipe */
56	mdp5_smp_state_t reserved_state;/* SMP MMBs statically allocated */
57	int reserved[MAX_CLIENTS];	/* # of MMBs allocated per client */
58};
59
60#define MDP5_INTF_NUM_MAX	5
61
62struct mdp5_intf_block {
63	uint32_t base[MAX_BASES];
64	u32 connect[MDP5_INTF_NUM_MAX]; /* array of enum mdp5_intf_type */
65};
66
67struct mdp5_cfg_hw {
68	char  *name;
69
70	struct mdp5_sub_block mdp;
71	struct mdp5_smp_block smp;
72	struct mdp5_ctl_block ctl;
73	struct mdp5_sub_block pipe_vig;
74	struct mdp5_sub_block pipe_rgb;
75	struct mdp5_sub_block pipe_dma;
76	struct mdp5_lm_block  lm;
77	struct mdp5_sub_block dspp;
78	struct mdp5_sub_block ad;
79	struct mdp5_sub_block pp;
80	struct mdp5_intf_block intf;
81
82	uint32_t max_clk;
83};
84
85/* platform config data (ie. from DT, or pdata) */
86struct mdp5_cfg_platform {
87	struct iommu_domain *iommu;
88};
89
90struct mdp5_cfg {
91	const struct mdp5_cfg_hw *hw;
92	struct mdp5_cfg_platform platform;
93};
94
95struct mdp5_kms;
96struct mdp5_cfg_handler;
97
98const struct mdp5_cfg_hw *mdp5_cfg_get_hw_config(struct mdp5_cfg_handler *cfg_hnd);
99struct mdp5_cfg *mdp5_cfg_get_config(struct mdp5_cfg_handler *cfg_hnd);
100int mdp5_cfg_get_hw_rev(struct mdp5_cfg_handler *cfg_hnd);
101
102#define mdp5_cfg_intf_is_virtual(intf_type) ({	\
103	typeof(intf_type) __val = (intf_type);	\
104	(__val) >= INTF_VIRTUAL ? true : false; })
105
106struct mdp5_cfg_handler *mdp5_cfg_init(struct mdp5_kms *mdp5_kms,
107		uint32_t major, uint32_t minor);
108void mdp5_cfg_destroy(struct mdp5_cfg_handler *cfg_hnd);
109
110#endif /* __MDP5_CFG_H__ */
111