1/*
2 * AD7904/AD7914/AD7923/AD7924 SPI ADC driver
3 *
4 * Copyright 2011 Analog Devices Inc (from AD7923 Driver)
5 * Copyright 2012 CS Systemes d'Information
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/sysfs.h>
14#include <linux/spi/spi.h>
15#include <linux/regulator/consumer.h>
16#include <linux/err.h>
17#include <linux/delay.h>
18#include <linux/module.h>
19#include <linux/interrupt.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23#include <linux/iio/buffer.h>
24#include <linux/iio/trigger_consumer.h>
25#include <linux/iio/triggered_buffer.h>
26
27#define AD7923_WRITE_CR		(1 << 11)	/* write control register */
28#define AD7923_RANGE		(1 << 1)	/* range to REFin */
29#define AD7923_CODING		(1 << 0)	/* coding is straight binary */
30#define AD7923_PM_MODE_AS	(1)		/* auto shutdown */
31#define AD7923_PM_MODE_FS	(2)		/* full shutdown */
32#define AD7923_PM_MODE_OPS	(3)		/* normal operation */
33#define AD7923_CHANNEL_0	(0)		/* analog input 0 */
34#define AD7923_CHANNEL_1	(1)		/* analog input 1 */
35#define AD7923_CHANNEL_2	(2)		/* analog input 2 */
36#define AD7923_CHANNEL_3	(3)		/* analog input 3 */
37#define AD7923_SEQUENCE_OFF	(0)		/* no sequence fonction */
38#define AD7923_SEQUENCE_PROTECT	(2)		/* no interrupt write cycle */
39#define AD7923_SEQUENCE_ON	(3)		/* continuous sequence */
40
41#define AD7923_MAX_CHAN		4
42
43#define AD7923_PM_MODE_WRITE(mode)	(mode << 4)	/* write mode */
44#define AD7923_CHANNEL_WRITE(channel)	(channel << 6)	/* write channel */
45#define AD7923_SEQUENCE_WRITE(sequence)	(((sequence & 1) << 3) \
46					+ ((sequence & 2) << 9))
47						/* write sequence fonction */
48/* left shift for CR : bit 11 transmit in first */
49#define AD7923_SHIFT_REGISTER	4
50
51/* val = value, dec = left shift, bits = number of bits of the mask */
52#define EXTRACT(val, dec, bits)		((val >> dec) & ((1 << bits) - 1))
53
54struct ad7923_state {
55	struct spi_device		*spi;
56	struct spi_transfer		ring_xfer[5];
57	struct spi_transfer		scan_single_xfer[2];
58	struct spi_message		ring_msg;
59	struct spi_message		scan_single_msg;
60
61	struct regulator		*reg;
62
63	unsigned int			settings;
64
65	/*
66	 * DMA (thus cache coherency maintenance) requires the
67	 * transfer buffers to live in their own cache lines.
68	 */
69	__be16				rx_buf[4] ____cacheline_aligned;
70	__be16				tx_buf[4];
71};
72
73struct ad7923_chip_info {
74	const struct iio_chan_spec *channels;
75	unsigned int num_channels;
76};
77
78enum ad7923_id {
79	AD7904,
80	AD7914,
81	AD7924,
82};
83
84#define AD7923_V_CHAN(index, bits)					\
85	{								\
86		.type = IIO_VOLTAGE,					\
87		.indexed = 1,						\
88		.channel = index,					\
89		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
90		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
91		.address = index,					\
92		.scan_index = index,					\
93		.scan_type = {						\
94			.sign = 'u',					\
95			.realbits = (bits),				\
96			.storagebits = 16,				\
97			.endianness = IIO_BE,				\
98		},							\
99	}
100
101#define DECLARE_AD7923_CHANNELS(name, bits) \
102const struct iio_chan_spec name ## _channels[] = { \
103	AD7923_V_CHAN(0, bits), \
104	AD7923_V_CHAN(1, bits), \
105	AD7923_V_CHAN(2, bits), \
106	AD7923_V_CHAN(3, bits), \
107	IIO_CHAN_SOFT_TIMESTAMP(4), \
108}
109
110static DECLARE_AD7923_CHANNELS(ad7904, 8);
111static DECLARE_AD7923_CHANNELS(ad7914, 10);
112static DECLARE_AD7923_CHANNELS(ad7924, 12);
113
114static const struct ad7923_chip_info ad7923_chip_info[] = {
115	[AD7904] = {
116		.channels = ad7904_channels,
117		.num_channels = ARRAY_SIZE(ad7904_channels),
118	},
119	[AD7914] = {
120		.channels = ad7914_channels,
121		.num_channels = ARRAY_SIZE(ad7914_channels),
122	},
123	[AD7924] = {
124		.channels = ad7924_channels,
125		.num_channels = ARRAY_SIZE(ad7924_channels),
126	},
127};
128
129/**
130 * ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
131 **/
132static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
133	const unsigned long *active_scan_mask)
134{
135	struct ad7923_state *st = iio_priv(indio_dev);
136	int i, cmd, len;
137
138	len = 0;
139	for_each_set_bit(i, active_scan_mask, AD7923_MAX_CHAN) {
140		cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(i) |
141			AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
142			st->settings;
143		cmd <<= AD7923_SHIFT_REGISTER;
144		st->tx_buf[len++] = cpu_to_be16(cmd);
145	}
146	/* build spi ring message */
147	st->ring_xfer[0].tx_buf = &st->tx_buf[0];
148	st->ring_xfer[0].len = len;
149	st->ring_xfer[0].cs_change = 1;
150
151	spi_message_init(&st->ring_msg);
152	spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
153
154	for (i = 0; i < len; i++) {
155		st->ring_xfer[i + 1].rx_buf = &st->rx_buf[i];
156		st->ring_xfer[i + 1].len = 2;
157		st->ring_xfer[i + 1].cs_change = 1;
158		spi_message_add_tail(&st->ring_xfer[i + 1], &st->ring_msg);
159	}
160	/* make sure last transfer cs_change is not set */
161	st->ring_xfer[i + 1].cs_change = 0;
162
163	return 0;
164}
165
166/**
167 * ad7923_trigger_handler() bh of trigger launched polling to ring buffer
168 *
169 * Currently there is no option in this driver to disable the saving of
170 * timestamps within the ring.
171 **/
172static irqreturn_t ad7923_trigger_handler(int irq, void *p)
173{
174	struct iio_poll_func *pf = p;
175	struct iio_dev *indio_dev = pf->indio_dev;
176	struct ad7923_state *st = iio_priv(indio_dev);
177	int b_sent;
178
179	b_sent = spi_sync(st->spi, &st->ring_msg);
180	if (b_sent)
181		goto done;
182
183	iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
184		iio_get_time_ns());
185
186done:
187	iio_trigger_notify_done(indio_dev->trig);
188
189	return IRQ_HANDLED;
190}
191
192static int ad7923_scan_direct(struct ad7923_state *st, unsigned ch)
193{
194	int ret, cmd;
195
196	cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(ch) |
197		AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
198		st->settings;
199	cmd <<= AD7923_SHIFT_REGISTER;
200	st->tx_buf[0] = cpu_to_be16(cmd);
201
202	ret = spi_sync(st->spi, &st->scan_single_msg);
203	if (ret)
204		return ret;
205
206	return be16_to_cpu(st->rx_buf[0]);
207}
208
209static int ad7923_get_range(struct ad7923_state *st)
210{
211	int vref;
212
213	vref = regulator_get_voltage(st->reg);
214	if (vref < 0)
215		return vref;
216
217	vref /= 1000;
218
219	if (!(st->settings & AD7923_RANGE))
220		vref *= 2;
221
222	return vref;
223}
224
225static int ad7923_read_raw(struct iio_dev *indio_dev,
226			   struct iio_chan_spec const *chan,
227			   int *val,
228			   int *val2,
229			   long m)
230{
231	int ret;
232	struct ad7923_state *st = iio_priv(indio_dev);
233
234	switch (m) {
235	case IIO_CHAN_INFO_RAW:
236		mutex_lock(&indio_dev->mlock);
237		if (iio_buffer_enabled(indio_dev))
238			ret = -EBUSY;
239		else
240			ret = ad7923_scan_direct(st, chan->address);
241		mutex_unlock(&indio_dev->mlock);
242
243		if (ret < 0)
244			return ret;
245
246		if (chan->address == EXTRACT(ret, 12, 4))
247			*val = EXTRACT(ret, 0, 12);
248		else
249			return -EIO;
250
251		return IIO_VAL_INT;
252	case IIO_CHAN_INFO_SCALE:
253		ret = ad7923_get_range(st);
254		if (ret < 0)
255			return ret;
256		*val = ret;
257		*val2 = chan->scan_type.realbits;
258		return IIO_VAL_FRACTIONAL_LOG2;
259	}
260	return -EINVAL;
261}
262
263static const struct iio_info ad7923_info = {
264	.read_raw = &ad7923_read_raw,
265	.update_scan_mode = ad7923_update_scan_mode,
266	.driver_module = THIS_MODULE,
267};
268
269static int ad7923_probe(struct spi_device *spi)
270{
271	struct ad7923_state *st;
272	struct iio_dev *indio_dev;
273	const struct ad7923_chip_info *info;
274	int ret;
275
276	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
277	if (indio_dev == NULL)
278		return -ENOMEM;
279
280	st = iio_priv(indio_dev);
281
282	spi_set_drvdata(spi, indio_dev);
283
284	st->spi = spi;
285	st->settings = AD7923_CODING | AD7923_RANGE |
286			AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS);
287
288	info = &ad7923_chip_info[spi_get_device_id(spi)->driver_data];
289
290	indio_dev->name = spi_get_device_id(spi)->name;
291	indio_dev->dev.parent = &spi->dev;
292	indio_dev->modes = INDIO_DIRECT_MODE;
293	indio_dev->channels = info->channels;
294	indio_dev->num_channels = info->num_channels;
295	indio_dev->info = &ad7923_info;
296
297	/* Setup default message */
298
299	st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
300	st->scan_single_xfer[0].len = 2;
301	st->scan_single_xfer[0].cs_change = 1;
302	st->scan_single_xfer[1].rx_buf = &st->rx_buf[0];
303	st->scan_single_xfer[1].len = 2;
304
305	spi_message_init(&st->scan_single_msg);
306	spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
307	spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
308
309	st->reg = devm_regulator_get(&spi->dev, "refin");
310	if (IS_ERR(st->reg))
311		return PTR_ERR(st->reg);
312
313	ret = regulator_enable(st->reg);
314	if (ret)
315		return ret;
316
317	ret = iio_triggered_buffer_setup(indio_dev, NULL,
318			&ad7923_trigger_handler, NULL);
319	if (ret)
320		goto error_disable_reg;
321
322	ret = iio_device_register(indio_dev);
323	if (ret)
324		goto error_cleanup_ring;
325
326	return 0;
327
328error_cleanup_ring:
329	iio_triggered_buffer_cleanup(indio_dev);
330error_disable_reg:
331	regulator_disable(st->reg);
332
333	return ret;
334}
335
336static int ad7923_remove(struct spi_device *spi)
337{
338	struct iio_dev *indio_dev = spi_get_drvdata(spi);
339	struct ad7923_state *st = iio_priv(indio_dev);
340
341	iio_device_unregister(indio_dev);
342	iio_triggered_buffer_cleanup(indio_dev);
343	regulator_disable(st->reg);
344
345	return 0;
346}
347
348static const struct spi_device_id ad7923_id[] = {
349	{"ad7904", AD7904},
350	{"ad7914", AD7914},
351	{"ad7923", AD7924},
352	{"ad7924", AD7924},
353	{}
354};
355MODULE_DEVICE_TABLE(spi, ad7923_id);
356
357static struct spi_driver ad7923_driver = {
358	.driver = {
359		.name	= "ad7923",
360		.owner	= THIS_MODULE,
361	},
362	.probe		= ad7923_probe,
363	.remove		= ad7923_remove,
364	.id_table	= ad7923_id,
365};
366module_spi_driver(ad7923_driver);
367
368MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
369MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>");
370MODULE_DESCRIPTION("Analog Devices AD7904/AD7914/AD7923/AD7924 ADC");
371MODULE_LICENSE("GPL v2");
372