1/*
2 * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
3 *
4 * Original author:
5 * Ben Collins <bcollins@ubuntu.com>
6 *
7 * Additional work by:
8 * John Brooks <john.brooks@bluecherry.net>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18 * GNU General Public License for more details.
19 */
20
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/slab.h>
24
25#include "solo6x10.h"
26
27static int multi_p2m;
28module_param(multi_p2m, uint, 0644);
29MODULE_PARM_DESC(multi_p2m,
30		 "Use multiple P2M DMA channels (default: no, 6010-only)");
31
32static int desc_mode;
33module_param(desc_mode, uint, 0644);
34MODULE_PARM_DESC(desc_mode,
35		 "Allow use of descriptor mode DMA (default: no, 6010-only)");
36
37int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
38		 void *sys_addr, u32 ext_addr, u32 size,
39		 int repeat, u32 ext_size)
40{
41	dma_addr_t dma_addr;
42	int ret;
43
44	if (WARN_ON_ONCE((unsigned long)sys_addr & 0x03))
45		return -EINVAL;
46	if (WARN_ON_ONCE(!size))
47		return -EINVAL;
48
49	dma_addr = pci_map_single(solo_dev->pdev, sys_addr, size,
50				  wr ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
51	if (pci_dma_mapping_error(solo_dev->pdev, dma_addr))
52		return -ENOMEM;
53
54	ret = solo_p2m_dma_t(solo_dev, wr, dma_addr, ext_addr, size,
55			     repeat, ext_size);
56
57	pci_unmap_single(solo_dev->pdev, dma_addr, size,
58			 wr ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
59
60	return ret;
61}
62
63/* Mutex must be held for p2m_id before calling this!! */
64int solo_p2m_dma_desc(struct solo_dev *solo_dev,
65		      struct solo_p2m_desc *desc, dma_addr_t desc_dma,
66		      int desc_cnt)
67{
68	struct solo_p2m_dev *p2m_dev;
69	unsigned int timeout;
70	unsigned int config = 0;
71	int ret = 0;
72	int p2m_id = 0;
73
74	/* Get next ID. According to Softlogic, 6110 has problems on !=0 P2M */
75	if (solo_dev->type != SOLO_DEV_6110 && multi_p2m) {
76		p2m_id = atomic_inc_return(&solo_dev->p2m_count) % SOLO_NR_P2M;
77		if (p2m_id < 0)
78			p2m_id = -p2m_id;
79	}
80
81	p2m_dev = &solo_dev->p2m_dev[p2m_id];
82
83	if (mutex_lock_interruptible(&p2m_dev->mutex))
84		return -EINTR;
85
86	reinit_completion(&p2m_dev->completion);
87	p2m_dev->error = 0;
88
89	if (desc_cnt > 1 && solo_dev->type != SOLO_DEV_6110 && desc_mode) {
90		/* For 6010 with more than one desc, we can do a one-shot */
91		p2m_dev->desc_count = p2m_dev->desc_idx = 0;
92		config = solo_reg_read(solo_dev, SOLO_P2M_CONFIG(p2m_id));
93
94		solo_reg_write(solo_dev, SOLO_P2M_DES_ADR(p2m_id), desc_dma);
95		solo_reg_write(solo_dev, SOLO_P2M_DESC_ID(p2m_id), desc_cnt);
96		solo_reg_write(solo_dev, SOLO_P2M_CONFIG(p2m_id), config |
97			       SOLO_P2M_DESC_MODE);
98	} else {
99		/* For single descriptors and 6110, we need to run each desc */
100		p2m_dev->desc_count = desc_cnt;
101		p2m_dev->desc_idx = 1;
102		p2m_dev->descs = desc;
103
104		solo_reg_write(solo_dev, SOLO_P2M_TAR_ADR(p2m_id),
105			       desc[1].dma_addr);
106		solo_reg_write(solo_dev, SOLO_P2M_EXT_ADR(p2m_id),
107			       desc[1].ext_addr);
108		solo_reg_write(solo_dev, SOLO_P2M_EXT_CFG(p2m_id),
109			       desc[1].cfg);
110		solo_reg_write(solo_dev, SOLO_P2M_CONTROL(p2m_id),
111			       desc[1].ctrl);
112	}
113
114	timeout = wait_for_completion_timeout(&p2m_dev->completion,
115					      solo_dev->p2m_jiffies);
116
117	if (WARN_ON_ONCE(p2m_dev->error))
118		ret = -EIO;
119	else if (timeout == 0) {
120		solo_dev->p2m_timeouts++;
121		ret = -EAGAIN;
122	}
123
124	solo_reg_write(solo_dev, SOLO_P2M_CONTROL(p2m_id), 0);
125
126	/* Don't write here for the no_desc_mode case, because config is 0.
127	 * We can't test no_desc_mode again, it might race. */
128	if (desc_cnt > 1 && solo_dev->type != SOLO_DEV_6110 && config)
129		solo_reg_write(solo_dev, SOLO_P2M_CONFIG(p2m_id), config);
130
131	mutex_unlock(&p2m_dev->mutex);
132
133	return ret;
134}
135
136void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
137			dma_addr_t dma_addr, u32 ext_addr, u32 size,
138			int repeat, u32 ext_size)
139{
140	WARN_ON_ONCE(dma_addr & 0x03);
141	WARN_ON_ONCE(!size);
142
143	desc->cfg = SOLO_P2M_COPY_SIZE(size >> 2);
144	desc->ctrl = SOLO_P2M_BURST_SIZE(SOLO_P2M_BURST_256) |
145		(wr ? SOLO_P2M_WRITE : 0) | SOLO_P2M_TRANS_ON;
146
147	if (repeat) {
148		desc->cfg |= SOLO_P2M_EXT_INC(ext_size >> 2);
149		desc->ctrl |=  SOLO_P2M_PCI_INC(size >> 2) |
150			 SOLO_P2M_REPEAT(repeat);
151	}
152
153	desc->dma_addr = dma_addr;
154	desc->ext_addr = ext_addr;
155}
156
157int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
158		   dma_addr_t dma_addr, u32 ext_addr, u32 size,
159		   int repeat, u32 ext_size)
160{
161	struct solo_p2m_desc desc[2];
162
163	solo_p2m_fill_desc(&desc[1], wr, dma_addr, ext_addr, size, repeat,
164			   ext_size);
165
166	/* No need for desc_dma since we know it is a single-shot */
167	return solo_p2m_dma_desc(solo_dev, desc, 0, 1);
168}
169
170void solo_p2m_isr(struct solo_dev *solo_dev, int id)
171{
172	struct solo_p2m_dev *p2m_dev = &solo_dev->p2m_dev[id];
173	struct solo_p2m_desc *desc;
174
175	if (p2m_dev->desc_count <= p2m_dev->desc_idx) {
176		complete(&p2m_dev->completion);
177		return;
178	}
179
180	/* Setup next descriptor */
181	p2m_dev->desc_idx++;
182	desc = &p2m_dev->descs[p2m_dev->desc_idx];
183
184	solo_reg_write(solo_dev, SOLO_P2M_CONTROL(id), 0);
185	solo_reg_write(solo_dev, SOLO_P2M_TAR_ADR(id), desc->dma_addr);
186	solo_reg_write(solo_dev, SOLO_P2M_EXT_ADR(id), desc->ext_addr);
187	solo_reg_write(solo_dev, SOLO_P2M_EXT_CFG(id), desc->cfg);
188	solo_reg_write(solo_dev, SOLO_P2M_CONTROL(id), desc->ctrl);
189}
190
191void solo_p2m_error_isr(struct solo_dev *solo_dev)
192{
193	unsigned int err = solo_reg_read(solo_dev, SOLO_PCI_ERR);
194	struct solo_p2m_dev *p2m_dev;
195	int i;
196
197	if (!(err & (SOLO_PCI_ERR_P2M | SOLO_PCI_ERR_P2M_DESC)))
198		return;
199
200	for (i = 0; i < SOLO_NR_P2M; i++) {
201		p2m_dev = &solo_dev->p2m_dev[i];
202		p2m_dev->error = 1;
203		solo_reg_write(solo_dev, SOLO_P2M_CONTROL(i), 0);
204		complete(&p2m_dev->completion);
205	}
206}
207
208void solo_p2m_exit(struct solo_dev *solo_dev)
209{
210	int i;
211
212	for (i = 0; i < SOLO_NR_P2M; i++)
213		solo_irq_off(solo_dev, SOLO_IRQ_P2M(i));
214}
215
216static int solo_p2m_test(struct solo_dev *solo_dev, int base, int size)
217{
218	u32 *wr_buf;
219	u32 *rd_buf;
220	int i;
221	int ret = -EIO;
222	int order = get_order(size);
223
224	wr_buf = (u32 *)__get_free_pages(GFP_KERNEL, order);
225	if (wr_buf == NULL)
226		return -1;
227
228	rd_buf = (u32 *)__get_free_pages(GFP_KERNEL, order);
229	if (rd_buf == NULL) {
230		free_pages((unsigned long)wr_buf, order);
231		return -1;
232	}
233
234	for (i = 0; i < (size >> 3); i++)
235		*(wr_buf + i) = (i << 16) | (i + 1);
236
237	for (i = (size >> 3); i < (size >> 2); i++)
238		*(wr_buf + i) = ~((i << 16) | (i + 1));
239
240	memset(rd_buf, 0x55, size);
241
242	if (solo_p2m_dma(solo_dev, 1, wr_buf, base, size, 0, 0))
243		goto test_fail;
244
245	if (solo_p2m_dma(solo_dev, 0, rd_buf, base, size, 0, 0))
246		goto test_fail;
247
248	for (i = 0; i < (size >> 2); i++) {
249		if (*(wr_buf + i) != *(rd_buf + i))
250			goto test_fail;
251	}
252
253	ret = 0;
254
255test_fail:
256	free_pages((unsigned long)wr_buf, order);
257	free_pages((unsigned long)rd_buf, order);
258
259	return ret;
260}
261
262int solo_p2m_init(struct solo_dev *solo_dev)
263{
264	struct solo_p2m_dev *p2m_dev;
265	int i;
266
267	for (i = 0; i < SOLO_NR_P2M; i++) {
268		p2m_dev = &solo_dev->p2m_dev[i];
269
270		mutex_init(&p2m_dev->mutex);
271		init_completion(&p2m_dev->completion);
272
273		solo_reg_write(solo_dev, SOLO_P2M_CONTROL(i), 0);
274		solo_reg_write(solo_dev, SOLO_P2M_CONFIG(i),
275			       SOLO_P2M_CSC_16BIT_565 |
276			       SOLO_P2M_DESC_INTR_OPT |
277			       SOLO_P2M_DMA_INTERVAL(0) |
278			       SOLO_P2M_PCI_MASTER_MODE);
279		solo_irq_on(solo_dev, SOLO_IRQ_P2M(i));
280	}
281
282	/* Find correct SDRAM size */
283	for (solo_dev->sdram_size = 0, i = 2; i >= 0; i--) {
284		solo_reg_write(solo_dev, SOLO_DMA_CTRL,
285			       SOLO_DMA_CTRL_REFRESH_CYCLE(1) |
286			       SOLO_DMA_CTRL_SDRAM_SIZE(i) |
287			       SOLO_DMA_CTRL_SDRAM_CLK_INVERT |
288			       SOLO_DMA_CTRL_READ_CLK_SELECT |
289			       SOLO_DMA_CTRL_LATENCY(1));
290
291		solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config |
292			       SOLO_SYS_CFG_RESET);
293		solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config);
294
295		switch (i) {
296		case 2:
297			if (solo_p2m_test(solo_dev, 0x07ff0000, 0x00010000) ||
298			    solo_p2m_test(solo_dev, 0x05ff0000, 0x00010000))
299				continue;
300			break;
301
302		case 1:
303			if (solo_p2m_test(solo_dev, 0x03ff0000, 0x00010000))
304				continue;
305			break;
306
307		default:
308			if (solo_p2m_test(solo_dev, 0x01ff0000, 0x00010000))
309				continue;
310		}
311
312		solo_dev->sdram_size = (32 << 20) << i;
313		break;
314	}
315
316	if (!solo_dev->sdram_size) {
317		dev_err(&solo_dev->pdev->dev, "Error detecting SDRAM size\n");
318		return -EIO;
319	}
320
321	if (SOLO_SDRAM_END(solo_dev) > solo_dev->sdram_size) {
322		dev_err(&solo_dev->pdev->dev,
323			"SDRAM is not large enough (%u < %u)\n",
324			solo_dev->sdram_size, SOLO_SDRAM_END(solo_dev));
325		return -EIO;
326	}
327
328	return 0;
329}
330