1/*
2 * Copyright (C) 2012 Samsung Electronics Co., Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef FIMC_LITE_H_
10#define FIMC_LITE_H_
11
12#include <linux/sizes.h>
13#include <linux/io.h>
14#include <linux/irqreturn.h>
15#include <linux/platform_device.h>
16#include <linux/sched.h>
17#include <linux/spinlock.h>
18#include <linux/types.h>
19#include <linux/videodev2.h>
20
21#include <media/media-entity.h>
22#include <media/videobuf2-core.h>
23#include <media/v4l2-ctrls.h>
24#include <media/v4l2-device.h>
25#include <media/v4l2-mediabus.h>
26#include <media/exynos-fimc.h>
27
28#define FIMC_LITE_DRV_NAME	"exynos-fimc-lite"
29#define FLITE_CLK_NAME		"flite"
30#define FIMC_LITE_MAX_DEVS	3
31#define FLITE_REQ_BUFS_MIN	2
32#define FLITE_DEFAULT_WIDTH	640
33#define FLITE_DEFAULT_HEIGHT	480
34
35/* Bit index definitions for struct fimc_lite::state */
36enum {
37	ST_FLITE_LPM,
38	ST_FLITE_PENDING,
39	ST_FLITE_RUN,
40	ST_FLITE_STREAM,
41	ST_FLITE_SUSPENDED,
42	ST_FLITE_OFF,
43	ST_FLITE_IN_USE,
44	ST_FLITE_CONFIG,
45	ST_SENSOR_STREAM,
46};
47
48#define FLITE_SD_PAD_SINK	0
49#define FLITE_SD_PAD_SOURCE_DMA	1
50#define FLITE_SD_PAD_SOURCE_ISP	2
51#define FLITE_SD_PADS_NUM	3
52
53/**
54 * struct flite_drvdata - FIMC-LITE IP variant data structure
55 * @max_width: maximum camera interface input width in pixels
56 * @max_height: maximum camera interface input height in pixels
57 * @out_width_align: minimum output width alignment in pixels
58 * @win_hor_offs_align: minimum camera interface crop window horizontal
59 * 			offset alignment in pixels
60 * @out_hor_offs_align: minimum output DMA compose rectangle horizontal
61 * 			offset alignment in pixels
62 * @max_dma_bufs: number of output DMA buffer start address registers
63 * @num_instances: total number of FIMC-LITE IP instances available
64 */
65struct flite_drvdata {
66	unsigned short max_width;
67	unsigned short max_height;
68	unsigned short out_width_align;
69	unsigned short win_hor_offs_align;
70	unsigned short out_hor_offs_align;
71	unsigned short max_dma_bufs;
72	unsigned short num_instances;
73};
74
75struct fimc_lite_events {
76	unsigned int data_overflow;
77};
78
79#define FLITE_MAX_PLANES	1
80
81/**
82 * struct flite_frame - source/target frame properties
83 * @f_width: full pixel width
84 * @f_height: full pixel height
85 * @rect: crop/composition rectangle
86 * @fmt: pointer to pixel format description data structure
87 */
88struct flite_frame {
89	u16 f_width;
90	u16 f_height;
91	struct v4l2_rect rect;
92	const struct fimc_fmt *fmt;
93};
94
95/**
96 * struct flite_buffer - video buffer structure
97 * @vb:    vb2 buffer
98 * @list:  list head for the buffers queue
99 * @paddr: DMA buffer start address
100 * @index: DMA start address register's index
101 */
102struct flite_buffer {
103	struct vb2_buffer vb;
104	struct list_head list;
105	dma_addr_t paddr;
106	unsigned short index;
107};
108
109/**
110 * struct fimc_lite - fimc lite structure
111 * @pdev: pointer to FIMC-LITE platform device
112 * @dd: SoC specific driver data structure
113 * @ve: exynos video device entity structure
114 * @v4l2_dev: pointer to top the level v4l2_device
115 * @fh: v4l2 file handle
116 * @alloc_ctx: videobuf2 memory allocator context
117 * @subdev: FIMC-LITE subdev
118 * @vd_pad: media (sink) pad for the capture video node
119 * @subdev_pads: the subdev media pads
120 * @sensor: sensor subdev attached to FIMC-LITE directly or through MIPI-CSIS
121 * @ctrl_handler: v4l2 control handler
122 * @test_pattern: test pattern controls
123 * @index: FIMC-LITE platform device index
124 * @pipeline: video capture pipeline data structure
125 * @pipeline_ops: media pipeline ops for the video node driver
126 * @slock: spinlock protecting this data structure and the hw registers
127 * @lock: mutex serializing video device and the subdev operations
128 * @clock: FIMC-LITE gate clock
129 * @regs: memory mapped io registers
130 * @irq_queue: interrupt handler waitqueue
131 * @payload: image size in bytes (w x h x bpp)
132 * @inp_frame: camera input frame structure
133 * @out_frame: DMA output frame structure
134 * @out_path: output data path (DMA or FIFO)
135 * @source_subdev_grp_id: source subdev group id
136 * @state: driver state flags
137 * @pending_buf_q: pending buffers queue head
138 * @active_buf_q: the queue head of buffers scheduled in hardware
139 * @vb_queue: vb2 buffers queue
140 * @buf_index: helps to keep track of the DMA start address register index
141 * @active_buf_count: number of video buffers scheduled in hardware
142 * @frame_count: the captured frames counter
143 * @reqbufs_count: the number of buffers requested with REQBUFS ioctl
144 */
145struct fimc_lite {
146	struct platform_device	*pdev;
147	struct flite_drvdata	*dd;
148	struct exynos_video_entity ve;
149	struct v4l2_device	*v4l2_dev;
150	struct v4l2_fh		fh;
151	struct vb2_alloc_ctx	*alloc_ctx;
152	struct v4l2_subdev	subdev;
153	struct media_pad	vd_pad;
154	struct media_pad	subdev_pads[FLITE_SD_PADS_NUM];
155	struct v4l2_subdev	*sensor;
156	struct v4l2_ctrl_handler ctrl_handler;
157	struct v4l2_ctrl	*test_pattern;
158	int			index;
159
160	struct mutex		lock;
161	spinlock_t		slock;
162
163	struct clk		*clock;
164	void __iomem		*regs;
165	wait_queue_head_t	irq_queue;
166
167	unsigned long		payload[FLITE_MAX_PLANES];
168	struct flite_frame	inp_frame;
169	struct flite_frame	out_frame;
170	atomic_t		out_path;
171	unsigned int		source_subdev_grp_id;
172
173	unsigned long		state;
174	struct list_head	pending_buf_q;
175	struct list_head	active_buf_q;
176	struct vb2_queue	vb_queue;
177	unsigned short		buf_index;
178	unsigned int		frame_count;
179	unsigned int		reqbufs_count;
180
181	struct fimc_lite_events	events;
182	bool			streaming;
183};
184
185static inline bool fimc_lite_active(struct fimc_lite *fimc)
186{
187	unsigned long flags;
188	bool ret;
189
190	spin_lock_irqsave(&fimc->slock, flags);
191	ret = fimc->state & (1 << ST_FLITE_RUN) ||
192		fimc->state & (1 << ST_FLITE_PENDING);
193	spin_unlock_irqrestore(&fimc->slock, flags);
194	return ret;
195}
196
197static inline void fimc_lite_active_queue_add(struct fimc_lite *dev,
198					 struct flite_buffer *buf)
199{
200	list_add_tail(&buf->list, &dev->active_buf_q);
201}
202
203static inline struct flite_buffer *fimc_lite_active_queue_pop(
204					struct fimc_lite *dev)
205{
206	struct flite_buffer *buf = list_entry(dev->active_buf_q.next,
207					      struct flite_buffer, list);
208	list_del(&buf->list);
209	return buf;
210}
211
212static inline void fimc_lite_pending_queue_add(struct fimc_lite *dev,
213					struct flite_buffer *buf)
214{
215	list_add_tail(&buf->list, &dev->pending_buf_q);
216}
217
218static inline struct flite_buffer *fimc_lite_pending_queue_pop(
219					struct fimc_lite *dev)
220{
221	struct flite_buffer *buf = list_entry(dev->pending_buf_q.next,
222					      struct flite_buffer, list);
223	list_del(&buf->list);
224	return buf;
225}
226
227#endif /* FIMC_LITE_H_ */
228