1/*
2 * linux/drivers/mmc/host/sdhci_f_sdh30.c
3 *
4 * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
5 *              Vincent Yang <vincent.yang@tw.fujitsu.com>
6 * Copyright (C) 2015 Linaro Ltd  Andy Green <andy.green@linaro.org>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, version 2 of the License.
11 */
12
13#include <linux/err.h>
14#include <linux/delay.h>
15#include <linux/module.h>
16#include <linux/clk.h>
17
18#include "sdhci-pltfm.h"
19
20/* F_SDH30 extended Controller registers */
21#define F_SDH30_AHB_CONFIG		0x100
22#define  F_SDH30_AHB_BIGED		0x00000040
23#define  F_SDH30_BUSLOCK_DMA		0x00000020
24#define  F_SDH30_BUSLOCK_EN		0x00000010
25#define  F_SDH30_SIN			0x00000008
26#define  F_SDH30_AHB_INCR_16		0x00000004
27#define  F_SDH30_AHB_INCR_8		0x00000002
28#define  F_SDH30_AHB_INCR_4		0x00000001
29
30#define F_SDH30_TUNING_SETTING		0x108
31#define  F_SDH30_CMD_CHK_DIS		0x00010000
32
33#define F_SDH30_IO_CONTROL2		0x114
34#define  F_SDH30_CRES_O_DN		0x00080000
35#define  F_SDH30_MSEL_O_1_8		0x00040000
36
37#define F_SDH30_ESD_CONTROL		0x124
38#define  F_SDH30_EMMC_RST		0x00000002
39#define  F_SDH30_EMMC_HS200		0x01000000
40
41#define F_SDH30_CMD_DAT_DELAY		0x200
42
43#define F_SDH30_MIN_CLOCK		400000
44
45struct f_sdhost_priv {
46	struct clk *clk_iface;
47	struct clk *clk;
48	u32 vendor_hs200;
49	struct device *dev;
50};
51
52void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host)
53{
54	struct f_sdhost_priv *priv = sdhci_priv(host);
55	u32 ctrl = 0;
56
57	usleep_range(2500, 3000);
58	ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
59	ctrl |= F_SDH30_CRES_O_DN;
60	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
61	ctrl |= F_SDH30_MSEL_O_1_8;
62	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
63
64	ctrl &= ~F_SDH30_CRES_O_DN;
65	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
66	usleep_range(2500, 3000);
67
68	if (priv->vendor_hs200) {
69		dev_info(priv->dev, "%s: setting hs200\n", __func__);
70		ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
71		ctrl |= priv->vendor_hs200;
72		sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL);
73	}
74
75	ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING);
76	ctrl |= F_SDH30_CMD_CHK_DIS;
77	sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING);
78}
79
80unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host)
81{
82	return F_SDH30_MIN_CLOCK;
83}
84
85void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask)
86{
87	if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0)
88		sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL);
89
90	sdhci_reset(host, mask);
91}
92
93static const struct sdhci_ops sdhci_f_sdh30_ops = {
94	.voltage_switch = sdhci_f_sdh30_soft_voltage_switch,
95	.get_min_clock = sdhci_f_sdh30_get_min_clock,
96	.reset = sdhci_f_sdh30_reset,
97	.set_clock = sdhci_set_clock,
98	.set_bus_width = sdhci_set_bus_width,
99	.set_uhs_signaling = sdhci_set_uhs_signaling,
100};
101
102static int sdhci_f_sdh30_probe(struct platform_device *pdev)
103{
104	struct sdhci_host *host;
105	struct device *dev = &pdev->dev;
106	struct resource *res;
107	int irq, ctrl = 0, ret = 0;
108	struct f_sdhost_priv *priv;
109	u32 reg = 0;
110
111	irq = platform_get_irq(pdev, 0);
112	if (irq < 0) {
113		dev_err(dev, "%s: no irq specified\n", __func__);
114		return irq;
115	}
116
117	host = sdhci_alloc_host(dev, sizeof(struct sdhci_host) +
118						sizeof(struct f_sdhost_priv));
119	if (IS_ERR(host))
120		return PTR_ERR(host);
121
122	priv = sdhci_priv(host);
123	priv->dev = dev;
124
125	host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
126		       SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
127	host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE |
128			SDHCI_QUIRK2_TUNING_WORK_AROUND;
129
130	ret = mmc_of_parse(host->mmc);
131	if (ret)
132		goto err;
133
134	platform_set_drvdata(pdev, host);
135
136	sdhci_get_of_property(pdev);
137	host->hw_name = "f_sdh30";
138	host->ops = &sdhci_f_sdh30_ops;
139	host->irq = irq;
140
141	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
142	host->ioaddr = devm_ioremap_resource(&pdev->dev, res);
143	if (IS_ERR(host->ioaddr)) {
144		ret = PTR_ERR(host->ioaddr);
145		goto err;
146	}
147
148	priv->clk_iface = devm_clk_get(&pdev->dev, "iface");
149	if (IS_ERR(priv->clk_iface)) {
150		ret = PTR_ERR(priv->clk_iface);
151		goto err;
152	}
153
154	ret = clk_prepare_enable(priv->clk_iface);
155	if (ret)
156		goto err;
157
158	priv->clk = devm_clk_get(&pdev->dev, "core");
159	if (IS_ERR(priv->clk)) {
160		ret = PTR_ERR(priv->clk);
161		goto err_clk;
162	}
163
164	ret = clk_prepare_enable(priv->clk);
165	if (ret)
166		goto err_clk;
167
168	/* init vendor specific regs */
169	ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
170	ctrl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 |
171		F_SDH30_AHB_INCR_4;
172	ctrl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN);
173	sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG);
174
175	reg = sdhci_readl(host, F_SDH30_ESD_CONTROL);
176	sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
177	msleep(20);
178	sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
179
180	reg = sdhci_readl(host, SDHCI_CAPABILITIES);
181	if (reg & SDHCI_CAN_DO_8BIT)
182		priv->vendor_hs200 = F_SDH30_EMMC_HS200;
183
184	ret = sdhci_add_host(host);
185	if (ret)
186		goto err_add_host;
187
188	return 0;
189
190err_add_host:
191	clk_disable_unprepare(priv->clk);
192err_clk:
193	clk_disable_unprepare(priv->clk_iface);
194err:
195	sdhci_free_host(host);
196	return ret;
197}
198
199static int sdhci_f_sdh30_remove(struct platform_device *pdev)
200{
201	struct sdhci_host *host = platform_get_drvdata(pdev);
202	struct f_sdhost_priv *priv = sdhci_priv(host);
203
204	sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
205			  0xffffffff);
206
207	clk_disable_unprepare(priv->clk_iface);
208	clk_disable_unprepare(priv->clk);
209
210	sdhci_free_host(host);
211	platform_set_drvdata(pdev, NULL);
212
213	return 0;
214}
215
216static const struct of_device_id f_sdh30_dt_ids[] = {
217	{ .compatible = "fujitsu,mb86s70-sdhci-3.0" },
218	{ /* sentinel */ }
219};
220MODULE_DEVICE_TABLE(of, f_sdh30_dt_ids);
221
222static struct platform_driver sdhci_f_sdh30_driver = {
223	.driver = {
224		.name = "f_sdh30",
225		.of_match_table = f_sdh30_dt_ids,
226		.pm	= SDHCI_PLTFM_PMOPS,
227	},
228	.probe	= sdhci_f_sdh30_probe,
229	.remove	= sdhci_f_sdh30_remove,
230};
231
232module_platform_driver(sdhci_f_sdh30_driver);
233
234MODULE_DESCRIPTION("F_SDH30 SD Card Controller driver");
235MODULE_LICENSE("GPL v2");
236MODULE_AUTHOR("FUJITSU SEMICONDUCTOR LTD.");
237MODULE_ALIAS("platform:f_sdh30");
238