1/* 2 * linux/drivers/mmc/host/tmio_mmc_pio.c 3 * 4 * Copyright (C) 2011 Guennadi Liakhovetski 5 * Copyright (C) 2007 Ian Molton 6 * Copyright (C) 2004 Ian Molton 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * Driver for the MMC / SD / SDIO IP found in: 13 * 14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 15 * 16 * This driver draws mainly on scattered spec sheets, Reverse engineering 17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 18 * support). (Further 4 bit support from a later datasheet). 19 * 20 * TODO: 21 * Investigate using a workqueue for PIO transfers 22 * Eliminate FIXMEs 23 * SDIO support 24 * Better Power management 25 * Handle MMC errors better 26 * double buffer support 27 * 28 */ 29 30#include <linux/delay.h> 31#include <linux/device.h> 32#include <linux/highmem.h> 33#include <linux/interrupt.h> 34#include <linux/io.h> 35#include <linux/irq.h> 36#include <linux/mfd/tmio.h> 37#include <linux/mmc/host.h> 38#include <linux/mmc/mmc.h> 39#include <linux/mmc/slot-gpio.h> 40#include <linux/mmc/tmio.h> 41#include <linux/module.h> 42#include <linux/pagemap.h> 43#include <linux/platform_device.h> 44#include <linux/pm_qos.h> 45#include <linux/pm_runtime.h> 46#include <linux/regulator/consumer.h> 47#include <linux/mmc/sdio.h> 48#include <linux/scatterlist.h> 49#include <linux/spinlock.h> 50#include <linux/workqueue.h> 51 52#include "tmio_mmc.h" 53 54void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 55{ 56 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 57 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 58} 59 60void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 61{ 62 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 63 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 64} 65 66static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 67{ 68 sd_ctrl_write32(host, CTL_STATUS, ~i); 69} 70 71static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 72{ 73 host->sg_len = data->sg_len; 74 host->sg_ptr = data->sg; 75 host->sg_orig = data->sg; 76 host->sg_off = 0; 77} 78 79static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 80{ 81 host->sg_ptr = sg_next(host->sg_ptr); 82 host->sg_off = 0; 83 return --host->sg_len; 84} 85 86#ifdef CONFIG_MMC_DEBUG 87 88#define STATUS_TO_TEXT(a, status, i) \ 89 do { \ 90 if (status & TMIO_STAT_##a) { \ 91 if (i++) \ 92 printk(" | "); \ 93 printk(#a); \ 94 } \ 95 } while (0) 96 97static void pr_debug_status(u32 status) 98{ 99 int i = 0; 100 pr_debug("status: %08x = ", status); 101 STATUS_TO_TEXT(CARD_REMOVE, status, i); 102 STATUS_TO_TEXT(CARD_INSERT, status, i); 103 STATUS_TO_TEXT(SIGSTATE, status, i); 104 STATUS_TO_TEXT(WRPROTECT, status, i); 105 STATUS_TO_TEXT(CARD_REMOVE_A, status, i); 106 STATUS_TO_TEXT(CARD_INSERT_A, status, i); 107 STATUS_TO_TEXT(SIGSTATE_A, status, i); 108 STATUS_TO_TEXT(CMD_IDX_ERR, status, i); 109 STATUS_TO_TEXT(STOPBIT_ERR, status, i); 110 STATUS_TO_TEXT(ILL_FUNC, status, i); 111 STATUS_TO_TEXT(CMD_BUSY, status, i); 112 STATUS_TO_TEXT(CMDRESPEND, status, i); 113 STATUS_TO_TEXT(DATAEND, status, i); 114 STATUS_TO_TEXT(CRCFAIL, status, i); 115 STATUS_TO_TEXT(DATATIMEOUT, status, i); 116 STATUS_TO_TEXT(CMDTIMEOUT, status, i); 117 STATUS_TO_TEXT(RXOVERFLOW, status, i); 118 STATUS_TO_TEXT(TXUNDERRUN, status, i); 119 STATUS_TO_TEXT(RXRDY, status, i); 120 STATUS_TO_TEXT(TXRQ, status, i); 121 STATUS_TO_TEXT(ILL_ACCESS, status, i); 122 printk("\n"); 123} 124 125#else 126#define pr_debug_status(s) do { } while (0) 127#endif 128 129static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 130{ 131 struct tmio_mmc_host *host = mmc_priv(mmc); 132 133 if (enable && !host->sdio_irq_enabled) { 134 /* Keep device active while SDIO irq is enabled */ 135 pm_runtime_get_sync(mmc_dev(mmc)); 136 host->sdio_irq_enabled = true; 137 138 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & 139 ~TMIO_SDIO_STAT_IOIRQ; 140 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 141 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 142 } else if (!enable && host->sdio_irq_enabled) { 143 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 144 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 145 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 146 147 host->sdio_irq_enabled = false; 148 pm_runtime_mark_last_busy(mmc_dev(mmc)); 149 pm_runtime_put_autosuspend(mmc_dev(mmc)); 150 } 151} 152 153static void tmio_mmc_set_clock(struct tmio_mmc_host *host, 154 unsigned int new_clock) 155{ 156 u32 clk = 0, clock; 157 158 if (new_clock) { 159 for (clock = host->mmc->f_min, clk = 0x80000080; 160 new_clock >= (clock<<1); clk >>= 1) 161 clock <<= 1; 162 163 /* 1/1 clock is option */ 164 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && 165 ((clk >> 22) & 0x1)) 166 clk |= 0xff; 167 } 168 169 if (host->set_clk_div) 170 host->set_clk_div(host->pdev, (clk>>22) & 1); 171 172 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff); 173 msleep(10); 174} 175 176static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) 177{ 178 /* implicit BUG_ON(!res) */ 179 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) { 180 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); 181 msleep(10); 182 } 183 184 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 & 185 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 186 msleep(10); 187} 188 189static void tmio_mmc_clk_start(struct tmio_mmc_host *host) 190{ 191 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 | 192 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 193 msleep(10); 194 195 /* implicit BUG_ON(!res) */ 196 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) { 197 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); 198 msleep(10); 199 } 200} 201 202static void tmio_mmc_reset(struct tmio_mmc_host *host) 203{ 204 /* FIXME - should we set stop clock reg here */ 205 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 206 /* implicit BUG_ON(!res) */ 207 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) 208 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); 209 msleep(10); 210 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 211 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) 212 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); 213 msleep(10); 214} 215 216static void tmio_mmc_reset_work(struct work_struct *work) 217{ 218 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 219 delayed_reset_work.work); 220 struct mmc_request *mrq; 221 unsigned long flags; 222 223 spin_lock_irqsave(&host->lock, flags); 224 mrq = host->mrq; 225 226 /* 227 * is request already finished? Since we use a non-blocking 228 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 229 * us, so, have to check for IS_ERR(host->mrq) 230 */ 231 if (IS_ERR_OR_NULL(mrq) 232 || time_is_after_jiffies(host->last_req_ts + 233 msecs_to_jiffies(2000))) { 234 spin_unlock_irqrestore(&host->lock, flags); 235 return; 236 } 237 238 dev_warn(&host->pdev->dev, 239 "timeout waiting for hardware interrupt (CMD%u)\n", 240 mrq->cmd->opcode); 241 242 if (host->data) 243 host->data->error = -ETIMEDOUT; 244 else if (host->cmd) 245 host->cmd->error = -ETIMEDOUT; 246 else 247 mrq->cmd->error = -ETIMEDOUT; 248 249 host->cmd = NULL; 250 host->data = NULL; 251 host->force_pio = false; 252 253 spin_unlock_irqrestore(&host->lock, flags); 254 255 tmio_mmc_reset(host); 256 257 /* Ready for new calls */ 258 host->mrq = NULL; 259 260 tmio_mmc_abort_dma(host); 261 mmc_request_done(host->mmc, mrq); 262 263 pm_runtime_mark_last_busy(mmc_dev(host->mmc)); 264 pm_runtime_put_autosuspend(mmc_dev(host->mmc)); 265} 266 267/* called with host->lock held, interrupts disabled */ 268static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 269{ 270 struct mmc_request *mrq; 271 unsigned long flags; 272 273 spin_lock_irqsave(&host->lock, flags); 274 275 mrq = host->mrq; 276 if (IS_ERR_OR_NULL(mrq)) { 277 spin_unlock_irqrestore(&host->lock, flags); 278 return; 279 } 280 281 host->cmd = NULL; 282 host->data = NULL; 283 host->force_pio = false; 284 285 cancel_delayed_work(&host->delayed_reset_work); 286 287 host->mrq = NULL; 288 spin_unlock_irqrestore(&host->lock, flags); 289 290 if (mrq->cmd->error || (mrq->data && mrq->data->error)) 291 tmio_mmc_abort_dma(host); 292 293 mmc_request_done(host->mmc, mrq); 294 295 pm_runtime_mark_last_busy(mmc_dev(host->mmc)); 296 pm_runtime_put_autosuspend(mmc_dev(host->mmc)); 297} 298 299static void tmio_mmc_done_work(struct work_struct *work) 300{ 301 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 302 done); 303 tmio_mmc_finish_request(host); 304} 305 306/* These are the bitmasks the tmio chip requires to implement the MMC response 307 * types. Note that R1 and R6 are the same in this scheme. */ 308#define APP_CMD 0x0040 309#define RESP_NONE 0x0300 310#define RESP_R1 0x0400 311#define RESP_R1B 0x0500 312#define RESP_R2 0x0600 313#define RESP_R3 0x0700 314#define DATA_PRESENT 0x0800 315#define TRANSFER_READ 0x1000 316#define TRANSFER_MULTI 0x2000 317#define SECURITY_CMD 0x4000 318#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 319 320static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd) 321{ 322 struct mmc_data *data = host->data; 323 int c = cmd->opcode; 324 u32 irq_mask = TMIO_MASK_CMD; 325 326 /* CMD12 is handled by hardware */ 327 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) { 328 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001); 329 return 0; 330 } 331 332 switch (mmc_resp_type(cmd)) { 333 case MMC_RSP_NONE: c |= RESP_NONE; break; 334 case MMC_RSP_R1: c |= RESP_R1; break; 335 case MMC_RSP_R1B: c |= RESP_R1B; break; 336 case MMC_RSP_R2: c |= RESP_R2; break; 337 case MMC_RSP_R3: c |= RESP_R3; break; 338 default: 339 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 340 return -EINVAL; 341 } 342 343 host->cmd = cmd; 344 345/* FIXME - this seems to be ok commented out but the spec suggest this bit 346 * should be set when issuing app commands. 347 * if(cmd->flags & MMC_FLAG_ACMD) 348 * c |= APP_CMD; 349 */ 350 if (data) { 351 c |= DATA_PRESENT; 352 if (data->blocks > 1) { 353 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100); 354 c |= TRANSFER_MULTI; 355 356 /* 357 * Disable auto CMD12 at IO_RW_EXTENDED when 358 * multiple block transfer 359 */ 360 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 361 (cmd->opcode == SD_IO_RW_EXTENDED)) 362 c |= NO_CMD12_ISSUE; 363 } 364 if (data->flags & MMC_DATA_READ) 365 c |= TRANSFER_READ; 366 } 367 368 if (!host->native_hotplug) 369 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 370 tmio_mmc_enable_mmc_irqs(host, irq_mask); 371 372 /* Fire off the command */ 373 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg); 374 sd_ctrl_write16(host, CTL_SD_CMD, c); 375 376 return 0; 377} 378 379static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, 380 unsigned short *buf, 381 unsigned int count) 382{ 383 int is_read = host->data->flags & MMC_DATA_READ; 384 u8 *buf8; 385 386 /* 387 * Transfer the data 388 */ 389 if (is_read) 390 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 391 else 392 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 393 394 /* if count was even number */ 395 if (!(count & 0x1)) 396 return; 397 398 /* if count was odd number */ 399 buf8 = (u8 *)(buf + (count >> 1)); 400 401 /* 402 * FIXME 403 * 404 * driver and this function are assuming that 405 * it is used as little endian 406 */ 407 if (is_read) 408 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; 409 else 410 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); 411} 412 413/* 414 * This chip always returns (at least?) as much data as you ask for. 415 * I'm unsure what happens if you ask for less than a block. This should be 416 * looked into to ensure that a funny length read doesn't hose the controller. 417 */ 418static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 419{ 420 struct mmc_data *data = host->data; 421 void *sg_virt; 422 unsigned short *buf; 423 unsigned int count; 424 unsigned long flags; 425 426 if ((host->chan_tx || host->chan_rx) && !host->force_pio) { 427 pr_err("PIO IRQ in DMA mode!\n"); 428 return; 429 } else if (!data) { 430 pr_debug("Spurious PIO IRQ\n"); 431 return; 432 } 433 434 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); 435 buf = (unsigned short *)(sg_virt + host->sg_off); 436 437 count = host->sg_ptr->length - host->sg_off; 438 if (count > data->blksz) 439 count = data->blksz; 440 441 pr_debug("count: %08x offset: %08x flags %08x\n", 442 count, host->sg_off, data->flags); 443 444 /* Transfer the data */ 445 tmio_mmc_transfer_data(host, buf, count); 446 447 host->sg_off += count; 448 449 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt); 450 451 if (host->sg_off == host->sg_ptr->length) 452 tmio_mmc_next_sg(host); 453 454 return; 455} 456 457static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 458{ 459 if (host->sg_ptr == &host->bounce_sg) { 460 unsigned long flags; 461 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); 462 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); 463 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); 464 } 465} 466 467/* needs to be called with host->lock held */ 468void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 469{ 470 struct mmc_data *data = host->data; 471 struct mmc_command *stop; 472 473 host->data = NULL; 474 475 if (!data) { 476 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 477 return; 478 } 479 stop = data->stop; 480 481 /* FIXME - return correct transfer count on errors */ 482 if (!data->error) 483 data->bytes_xfered = data->blocks * data->blksz; 484 else 485 data->bytes_xfered = 0; 486 487 pr_debug("Completed data request\n"); 488 489 /* 490 * FIXME: other drivers allow an optional stop command of any given type 491 * which we dont do, as the chip can auto generate them. 492 * Perhaps we can be smarter about when to use auto CMD12 and 493 * only issue the auto request when we know this is the desired 494 * stop command, allowing fallback to the stop command the 495 * upper layers expect. For now, we do what works. 496 */ 497 498 if (data->flags & MMC_DATA_READ) { 499 if (host->chan_rx && !host->force_pio) 500 tmio_mmc_check_bounce_buffer(host); 501 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 502 host->mrq); 503 } else { 504 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 505 host->mrq); 506 } 507 508 if (stop) { 509 if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg) 510 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000); 511 else 512 BUG(); 513 } 514 515 schedule_work(&host->done); 516} 517 518static void tmio_mmc_data_irq(struct tmio_mmc_host *host) 519{ 520 struct mmc_data *data; 521 spin_lock(&host->lock); 522 data = host->data; 523 524 if (!data) 525 goto out; 526 527 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { 528 u32 status = sd_ctrl_read32(host, CTL_STATUS); 529 bool done = false; 530 531 /* 532 * Has all data been written out yet? Testing on SuperH showed, 533 * that in most cases the first interrupt comes already with the 534 * BUSY status bit clear, but on some operations, like mount or 535 * in the beginning of a write / sync / umount, there is one 536 * DATAEND interrupt with the BUSY bit set, in this cases 537 * waiting for one more interrupt fixes the problem. 538 */ 539 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { 540 if (status & TMIO_STAT_ILL_FUNC) 541 done = true; 542 } else { 543 if (!(status & TMIO_STAT_CMD_BUSY)) 544 done = true; 545 } 546 547 if (done) { 548 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 549 tasklet_schedule(&host->dma_complete); 550 } 551 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) { 552 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 553 tasklet_schedule(&host->dma_complete); 554 } else { 555 tmio_mmc_do_data_irq(host); 556 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 557 } 558out: 559 spin_unlock(&host->lock); 560} 561 562static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, 563 unsigned int stat) 564{ 565 struct mmc_command *cmd = host->cmd; 566 int i, addr; 567 568 spin_lock(&host->lock); 569 570 if (!host->cmd) { 571 pr_debug("Spurious CMD irq\n"); 572 goto out; 573 } 574 575 host->cmd = NULL; 576 577 /* This controller is sicker than the PXA one. Not only do we need to 578 * drop the top 8 bits of the first response word, we also need to 579 * modify the order of the response for short response command types. 580 */ 581 582 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 583 cmd->resp[i] = sd_ctrl_read32(host, addr); 584 585 if (cmd->flags & MMC_RSP_136) { 586 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 587 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 588 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 589 cmd->resp[3] <<= 8; 590 } else if (cmd->flags & MMC_RSP_R3) { 591 cmd->resp[0] = cmd->resp[3]; 592 } 593 594 if (stat & TMIO_STAT_CMDTIMEOUT) 595 cmd->error = -ETIMEDOUT; 596 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) 597 cmd->error = -EILSEQ; 598 599 /* If there is data to handle we enable data IRQs here, and 600 * we will ultimatley finish the request in the data_end handler. 601 * If theres no data or we encountered an error, finish now. 602 */ 603 if (host->data && !cmd->error) { 604 if (host->data->flags & MMC_DATA_READ) { 605 if (host->force_pio || !host->chan_rx) 606 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 607 else 608 tasklet_schedule(&host->dma_issue); 609 } else { 610 if (host->force_pio || !host->chan_tx) 611 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 612 else 613 tasklet_schedule(&host->dma_issue); 614 } 615 } else { 616 schedule_work(&host->done); 617 } 618 619out: 620 spin_unlock(&host->lock); 621} 622 623static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host, 624 int *ireg, int *status) 625{ 626 *status = sd_ctrl_read32(host, CTL_STATUS); 627 *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 628 629 pr_debug_status(*status); 630 pr_debug_status(*ireg); 631 632 /* Clear the status except the interrupt status */ 633 sd_ctrl_write32(host, CTL_STATUS, TMIO_MASK_IRQ); 634} 635 636static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 637 int ireg, int status) 638{ 639 struct mmc_host *mmc = host->mmc; 640 641 /* Card insert / remove attempts */ 642 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 643 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 644 TMIO_STAT_CARD_REMOVE); 645 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 646 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 647 !work_pending(&mmc->detect.work)) 648 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 649 return true; 650 } 651 652 return false; 653} 654 655irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid) 656{ 657 unsigned int ireg, status; 658 struct tmio_mmc_host *host = devid; 659 660 tmio_mmc_card_irq_status(host, &ireg, &status); 661 __tmio_mmc_card_detect_irq(host, ireg, status); 662 663 return IRQ_HANDLED; 664} 665EXPORT_SYMBOL(tmio_mmc_card_detect_irq); 666 667static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, 668 int ireg, int status) 669{ 670 /* Command completion */ 671 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 672 tmio_mmc_ack_mmc_irqs(host, 673 TMIO_STAT_CMDRESPEND | 674 TMIO_STAT_CMDTIMEOUT); 675 tmio_mmc_cmd_irq(host, status); 676 return true; 677 } 678 679 /* Data transfer */ 680 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 681 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 682 tmio_mmc_pio_irq(host); 683 return true; 684 } 685 686 /* Data transfer completion */ 687 if (ireg & TMIO_STAT_DATAEND) { 688 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 689 tmio_mmc_data_irq(host); 690 return true; 691 } 692 693 return false; 694} 695 696irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid) 697{ 698 unsigned int ireg, status; 699 struct tmio_mmc_host *host = devid; 700 701 tmio_mmc_card_irq_status(host, &ireg, &status); 702 __tmio_mmc_sdcard_irq(host, ireg, status); 703 704 return IRQ_HANDLED; 705} 706EXPORT_SYMBOL(tmio_mmc_sdcard_irq); 707 708irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid) 709{ 710 struct tmio_mmc_host *host = devid; 711 struct mmc_host *mmc = host->mmc; 712 struct tmio_mmc_data *pdata = host->pdata; 713 unsigned int ireg, status; 714 unsigned int sdio_status; 715 716 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 717 return IRQ_HANDLED; 718 719 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 720 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask; 721 722 sdio_status = status & ~TMIO_SDIO_MASK_ALL; 723 if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK) 724 sdio_status |= 6; 725 726 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 727 728 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) 729 mmc_signal_sdio_irq(mmc); 730 731 return IRQ_HANDLED; 732} 733EXPORT_SYMBOL(tmio_mmc_sdio_irq); 734 735irqreturn_t tmio_mmc_irq(int irq, void *devid) 736{ 737 struct tmio_mmc_host *host = devid; 738 unsigned int ireg, status; 739 740 pr_debug("MMC IRQ begin\n"); 741 742 tmio_mmc_card_irq_status(host, &ireg, &status); 743 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 744 return IRQ_HANDLED; 745 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 746 return IRQ_HANDLED; 747 748 tmio_mmc_sdio_irq(irq, devid); 749 750 return IRQ_HANDLED; 751} 752EXPORT_SYMBOL(tmio_mmc_irq); 753 754static int tmio_mmc_start_data(struct tmio_mmc_host *host, 755 struct mmc_data *data) 756{ 757 struct tmio_mmc_data *pdata = host->pdata; 758 759 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 760 data->blksz, data->blocks); 761 762 /* Some hardware cannot perform 2 byte requests in 4 bit mode */ 763 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) { 764 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 765 766 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 767 pr_err("%s: %d byte block unsupported in 4 bit mode\n", 768 mmc_hostname(host->mmc), data->blksz); 769 return -EINVAL; 770 } 771 } 772 773 tmio_mmc_init_sg(host, data); 774 host->data = data; 775 776 /* Set transfer length / blocksize */ 777 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 778 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 779 780 tmio_mmc_start_dma(host, data); 781 782 return 0; 783} 784 785/* Process requests from the MMC layer */ 786static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 787{ 788 struct tmio_mmc_host *host = mmc_priv(mmc); 789 unsigned long flags; 790 int ret; 791 792 spin_lock_irqsave(&host->lock, flags); 793 794 if (host->mrq) { 795 pr_debug("request not null\n"); 796 if (IS_ERR(host->mrq)) { 797 spin_unlock_irqrestore(&host->lock, flags); 798 mrq->cmd->error = -EAGAIN; 799 mmc_request_done(mmc, mrq); 800 return; 801 } 802 } 803 804 host->last_req_ts = jiffies; 805 wmb(); 806 host->mrq = mrq; 807 808 spin_unlock_irqrestore(&host->lock, flags); 809 810 pm_runtime_get_sync(mmc_dev(mmc)); 811 812 if (mrq->data) { 813 ret = tmio_mmc_start_data(host, mrq->data); 814 if (ret) 815 goto fail; 816 } 817 818 ret = tmio_mmc_start_command(host, mrq->cmd); 819 if (!ret) { 820 schedule_delayed_work(&host->delayed_reset_work, 821 msecs_to_jiffies(2000)); 822 return; 823 } 824 825fail: 826 host->force_pio = false; 827 host->mrq = NULL; 828 mrq->cmd->error = ret; 829 mmc_request_done(mmc, mrq); 830 831 pm_runtime_mark_last_busy(mmc_dev(mmc)); 832 pm_runtime_put_autosuspend(mmc_dev(mmc)); 833} 834 835static int tmio_mmc_clk_update(struct tmio_mmc_host *host) 836{ 837 struct mmc_host *mmc = host->mmc; 838 int ret; 839 840 if (!host->clk_enable) 841 return -ENOTSUPP; 842 843 ret = host->clk_enable(host->pdev, &mmc->f_max); 844 if (!ret) 845 mmc->f_min = mmc->f_max / 512; 846 847 return ret; 848} 849 850static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd) 851{ 852 struct mmc_host *mmc = host->mmc; 853 int ret = 0; 854 855 /* .set_ios() is returning void, so, no chance to report an error */ 856 857 if (host->set_pwr) 858 host->set_pwr(host->pdev, 1); 859 860 if (!IS_ERR(mmc->supply.vmmc)) { 861 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 862 /* 863 * Attention: empiric value. With a b43 WiFi SDIO card this 864 * delay proved necessary for reliable card-insertion probing. 865 * 100us were not enough. Is this the same 140us delay, as in 866 * tmio_mmc_set_ios()? 867 */ 868 udelay(200); 869 } 870 /* 871 * It seems, VccQ should be switched on after Vcc, this is also what the 872 * omap_hsmmc.c driver does. 873 */ 874 if (!IS_ERR(mmc->supply.vqmmc) && !ret) { 875 ret = regulator_enable(mmc->supply.vqmmc); 876 udelay(200); 877 } 878 879 if (ret < 0) 880 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n", 881 ret); 882} 883 884static void tmio_mmc_power_off(struct tmio_mmc_host *host) 885{ 886 struct mmc_host *mmc = host->mmc; 887 888 if (!IS_ERR(mmc->supply.vqmmc)) 889 regulator_disable(mmc->supply.vqmmc); 890 891 if (!IS_ERR(mmc->supply.vmmc)) 892 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 893 894 if (host->set_pwr) 895 host->set_pwr(host->pdev, 0); 896} 897 898static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 899 unsigned char bus_width) 900{ 901 switch (bus_width) { 902 case MMC_BUS_WIDTH_1: 903 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); 904 break; 905 case MMC_BUS_WIDTH_4: 906 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); 907 break; 908 } 909} 910 911/* Set MMC clock / power. 912 * Note: This controller uses a simple divider scheme therefore it cannot 913 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 914 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 915 * slowest setting. 916 */ 917static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 918{ 919 struct tmio_mmc_host *host = mmc_priv(mmc); 920 struct device *dev = &host->pdev->dev; 921 unsigned long flags; 922 923 pm_runtime_get_sync(mmc_dev(mmc)); 924 925 mutex_lock(&host->ios_lock); 926 927 spin_lock_irqsave(&host->lock, flags); 928 if (host->mrq) { 929 if (IS_ERR(host->mrq)) { 930 dev_dbg(dev, 931 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 932 current->comm, task_pid_nr(current), 933 ios->clock, ios->power_mode); 934 host->mrq = ERR_PTR(-EINTR); 935 } else { 936 dev_dbg(dev, 937 "%s.%d: CMD%u active since %lu, now %lu!\n", 938 current->comm, task_pid_nr(current), 939 host->mrq->cmd->opcode, host->last_req_ts, jiffies); 940 } 941 spin_unlock_irqrestore(&host->lock, flags); 942 943 mutex_unlock(&host->ios_lock); 944 return; 945 } 946 947 host->mrq = ERR_PTR(-EBUSY); 948 949 spin_unlock_irqrestore(&host->lock, flags); 950 951 switch (ios->power_mode) { 952 case MMC_POWER_OFF: 953 tmio_mmc_power_off(host); 954 tmio_mmc_clk_stop(host); 955 break; 956 case MMC_POWER_UP: 957 tmio_mmc_set_clock(host, ios->clock); 958 tmio_mmc_power_on(host, ios->vdd); 959 tmio_mmc_clk_start(host); 960 tmio_mmc_set_bus_width(host, ios->bus_width); 961 break; 962 case MMC_POWER_ON: 963 tmio_mmc_set_clock(host, ios->clock); 964 tmio_mmc_clk_start(host); 965 tmio_mmc_set_bus_width(host, ios->bus_width); 966 break; 967 } 968 969 /* Let things settle. delay taken from winCE driver */ 970 udelay(140); 971 if (PTR_ERR(host->mrq) == -EINTR) 972 dev_dbg(&host->pdev->dev, 973 "%s.%d: IOS interrupted: clk %u, mode %u", 974 current->comm, task_pid_nr(current), 975 ios->clock, ios->power_mode); 976 host->mrq = NULL; 977 978 host->clk_cache = ios->clock; 979 980 mutex_unlock(&host->ios_lock); 981 982 pm_runtime_mark_last_busy(mmc_dev(mmc)); 983 pm_runtime_put_autosuspend(mmc_dev(mmc)); 984} 985 986static int tmio_mmc_get_ro(struct mmc_host *mmc) 987{ 988 struct tmio_mmc_host *host = mmc_priv(mmc); 989 struct tmio_mmc_data *pdata = host->pdata; 990 int ret = mmc_gpio_get_ro(mmc); 991 if (ret >= 0) 992 return ret; 993 994 pm_runtime_get_sync(mmc_dev(mmc)); 995 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || 996 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); 997 pm_runtime_mark_last_busy(mmc_dev(mmc)); 998 pm_runtime_put_autosuspend(mmc_dev(mmc)); 999 1000 return ret; 1001} 1002 1003static int tmio_multi_io_quirk(struct mmc_card *card, 1004 unsigned int direction, int blk_size) 1005{ 1006 struct tmio_mmc_host *host = mmc_priv(card->host); 1007 1008 if (host->multi_io_quirk) 1009 return host->multi_io_quirk(card, direction, blk_size); 1010 1011 return blk_size; 1012} 1013 1014static const struct mmc_host_ops tmio_mmc_ops = { 1015 .request = tmio_mmc_request, 1016 .set_ios = tmio_mmc_set_ios, 1017 .get_ro = tmio_mmc_get_ro, 1018 .get_cd = mmc_gpio_get_cd, 1019 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 1020 .multi_io_quirk = tmio_multi_io_quirk, 1021}; 1022 1023static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) 1024{ 1025 struct tmio_mmc_data *pdata = host->pdata; 1026 struct mmc_host *mmc = host->mmc; 1027 1028 mmc_regulator_get_supply(mmc); 1029 1030 /* use ocr_mask if no regulator */ 1031 if (!mmc->ocr_avail) 1032 mmc->ocr_avail = pdata->ocr_mask; 1033 1034 /* 1035 * try again. 1036 * There is possibility that regulator has not been probed 1037 */ 1038 if (!mmc->ocr_avail) 1039 return -EPROBE_DEFER; 1040 1041 return 0; 1042} 1043 1044static void tmio_mmc_of_parse(struct platform_device *pdev, 1045 struct tmio_mmc_data *pdata) 1046{ 1047 const struct device_node *np = pdev->dev.of_node; 1048 if (!np) 1049 return; 1050 1051 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL)) 1052 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE; 1053} 1054 1055struct tmio_mmc_host* 1056tmio_mmc_host_alloc(struct platform_device *pdev) 1057{ 1058 struct tmio_mmc_host *host; 1059 struct mmc_host *mmc; 1060 1061 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); 1062 if (!mmc) 1063 return NULL; 1064 1065 host = mmc_priv(mmc); 1066 host->mmc = mmc; 1067 host->pdev = pdev; 1068 1069 return host; 1070} 1071EXPORT_SYMBOL(tmio_mmc_host_alloc); 1072 1073void tmio_mmc_host_free(struct tmio_mmc_host *host) 1074{ 1075 mmc_free_host(host->mmc); 1076} 1077EXPORT_SYMBOL(tmio_mmc_host_free); 1078 1079int tmio_mmc_host_probe(struct tmio_mmc_host *_host, 1080 struct tmio_mmc_data *pdata) 1081{ 1082 struct platform_device *pdev = _host->pdev; 1083 struct mmc_host *mmc = _host->mmc; 1084 struct resource *res_ctl; 1085 int ret; 1086 u32 irq_mask = TMIO_MASK_CMD; 1087 1088 tmio_mmc_of_parse(pdev, pdata); 1089 1090 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT)) 1091 _host->write16_hook = NULL; 1092 1093 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1094 if (!res_ctl) 1095 return -EINVAL; 1096 1097 ret = mmc_of_parse(mmc); 1098 if (ret < 0) 1099 goto host_free; 1100 1101 _host->pdata = pdata; 1102 platform_set_drvdata(pdev, mmc); 1103 1104 _host->set_pwr = pdata->set_pwr; 1105 _host->set_clk_div = pdata->set_clk_div; 1106 1107 ret = tmio_mmc_init_ocr(_host); 1108 if (ret < 0) 1109 goto host_free; 1110 1111 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl)); 1112 if (!_host->ctl) { 1113 ret = -ENOMEM; 1114 goto host_free; 1115 } 1116 1117 mmc->ops = &tmio_mmc_ops; 1118 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1119 mmc->caps2 |= pdata->capabilities2; 1120 mmc->max_segs = 32; 1121 mmc->max_blk_size = 512; 1122 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) * 1123 mmc->max_segs; 1124 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1125 mmc->max_seg_size = mmc->max_req_size; 1126 1127 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD || 1128 mmc->caps & MMC_CAP_NEEDS_POLL || 1129 mmc->caps & MMC_CAP_NONREMOVABLE || 1130 mmc->slot.cd_irq >= 0); 1131 1132 if (tmio_mmc_clk_update(_host) < 0) { 1133 mmc->f_max = pdata->hclk; 1134 mmc->f_min = mmc->f_max / 512; 1135 } 1136 1137 /* 1138 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from 1139 * looping forever... 1140 */ 1141 if (mmc->f_min == 0) { 1142 ret = -EINVAL; 1143 goto host_free; 1144 } 1145 1146 /* 1147 * While using internal tmio hardware logic for card detection, we need 1148 * to ensure it stays powered for it to work. 1149 */ 1150 if (_host->native_hotplug) 1151 pm_runtime_get_noresume(&pdev->dev); 1152 1153 tmio_mmc_clk_stop(_host); 1154 tmio_mmc_reset(_host); 1155 1156 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK); 1157 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); 1158 1159 /* Unmask the IRQs we want to know about */ 1160 if (!_host->chan_rx) 1161 irq_mask |= TMIO_MASK_READOP; 1162 if (!_host->chan_tx) 1163 irq_mask |= TMIO_MASK_WRITEOP; 1164 if (!_host->native_hotplug) 1165 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1166 1167 _host->sdcard_irq_mask &= ~irq_mask; 1168 1169 _host->sdio_irq_enabled = false; 1170 if (pdata->flags & TMIO_MMC_SDIO_IRQ) { 1171 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 1172 sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask); 1173 sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000); 1174 } 1175 1176 spin_lock_init(&_host->lock); 1177 mutex_init(&_host->ios_lock); 1178 1179 /* Init delayed work for request timeouts */ 1180 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1181 INIT_WORK(&_host->done, tmio_mmc_done_work); 1182 1183 /* See if we also get DMA */ 1184 tmio_mmc_request_dma(_host, pdata); 1185 1186 pm_runtime_set_active(&pdev->dev); 1187 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1188 pm_runtime_use_autosuspend(&pdev->dev); 1189 pm_runtime_enable(&pdev->dev); 1190 1191 ret = mmc_add_host(mmc); 1192 if (ret < 0) { 1193 tmio_mmc_host_remove(_host); 1194 return ret; 1195 } 1196 1197 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1198 1199 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) { 1200 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0); 1201 if (ret < 0) { 1202 tmio_mmc_host_remove(_host); 1203 return ret; 1204 } 1205 mmc_gpiod_request_cd_irq(mmc); 1206 } 1207 1208 return 0; 1209 1210host_free: 1211 1212 return ret; 1213} 1214EXPORT_SYMBOL(tmio_mmc_host_probe); 1215 1216void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1217{ 1218 struct platform_device *pdev = host->pdev; 1219 struct mmc_host *mmc = host->mmc; 1220 1221 if (!host->native_hotplug) 1222 pm_runtime_get_sync(&pdev->dev); 1223 1224 dev_pm_qos_hide_latency_limit(&pdev->dev); 1225 1226 mmc_remove_host(mmc); 1227 cancel_work_sync(&host->done); 1228 cancel_delayed_work_sync(&host->delayed_reset_work); 1229 tmio_mmc_release_dma(host); 1230 1231 pm_runtime_put_sync(&pdev->dev); 1232 pm_runtime_disable(&pdev->dev); 1233 1234 iounmap(host->ctl); 1235} 1236EXPORT_SYMBOL(tmio_mmc_host_remove); 1237 1238#ifdef CONFIG_PM 1239int tmio_mmc_host_runtime_suspend(struct device *dev) 1240{ 1241 struct mmc_host *mmc = dev_get_drvdata(dev); 1242 struct tmio_mmc_host *host = mmc_priv(mmc); 1243 1244 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1245 1246 if (host->clk_cache) 1247 tmio_mmc_clk_stop(host); 1248 1249 if (host->clk_disable) 1250 host->clk_disable(host->pdev); 1251 1252 return 0; 1253} 1254EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend); 1255 1256int tmio_mmc_host_runtime_resume(struct device *dev) 1257{ 1258 struct mmc_host *mmc = dev_get_drvdata(dev); 1259 struct tmio_mmc_host *host = mmc_priv(mmc); 1260 1261 tmio_mmc_reset(host); 1262 tmio_mmc_clk_update(host); 1263 1264 if (host->clk_cache) { 1265 tmio_mmc_set_clock(host, host->clk_cache); 1266 tmio_mmc_clk_start(host); 1267 } 1268 1269 tmio_mmc_enable_dma(host, true); 1270 1271 return 0; 1272} 1273EXPORT_SYMBOL(tmio_mmc_host_runtime_resume); 1274#endif 1275 1276MODULE_LICENSE("GPL v2"); 1277