1/* bnx2x_dcb.h: Broadcom Everest network driver.
2 *
3 * Copyright 2009-2013 Broadcom Corporation
4 *
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9 *
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
13 * consent.
14 *
15 * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
16 * Written by: Dmitry Kravkov
17 *
18 */
19#ifndef BNX2X_DCB_H
20#define BNX2X_DCB_H
21
22#include "bnx2x_hsi.h"
23
24#define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3 /* NW, iSCSI, FCoE */
25struct bnx2x_dcbx_app_params {
26	u32 enabled;
27	u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
28};
29
30#define DCBX_COS_MAX_NUM_E2	DCBX_E2E3_MAX_NUM_COS
31/* bnx2x currently limits numbers of supported COSes to 3 to be extended to 6 */
32#define BNX2X_MAX_COS_SUPPORT	3
33#define DCBX_COS_MAX_NUM_E3B0	BNX2X_MAX_COS_SUPPORT
34#define DCBX_COS_MAX_NUM	BNX2X_MAX_COS_SUPPORT
35
36struct bnx2x_dcbx_cos_params {
37	u32	bw_tbl;
38	u32	pri_bitmask;
39	/*
40	 * strict priority: valid values are 0..5; 0 is highest priority.
41	 * There can't be two COSes with the same priority.
42	 */
43	u8	strict;
44#define BNX2X_DCBX_STRICT_INVALID			DCBX_COS_MAX_NUM
45#define BNX2X_DCBX_STRICT_COS_HIGHEST			0
46#define BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(sp)	((sp) + 1)
47	u8	pauseable;
48};
49
50struct bnx2x_dcbx_pg_params {
51	u32 enabled;
52	u8 num_of_cos; /* valid COS entries */
53	struct bnx2x_dcbx_cos_params	cos_params[DCBX_COS_MAX_NUM];
54};
55
56struct bnx2x_dcbx_pfc_params {
57	u32 enabled;
58	u32 priority_non_pauseable_mask;
59};
60
61struct bnx2x_dcbx_port_params {
62	struct bnx2x_dcbx_pfc_params pfc;
63	struct bnx2x_dcbx_pg_params  ets;
64	struct bnx2x_dcbx_app_params app;
65};
66
67#define BNX2X_DCBX_CONFIG_INV_VALUE			(0xFFFFFFFF)
68#define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE		0
69#define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE		1
70#define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID	(BNX2X_DCBX_CONFIG_INV_VALUE)
71#define BNX2X_IS_ETS_ENABLED(bp) ((bp)->dcb_state == BNX2X_DCB_STATE_ON &&\
72				  (bp)->dcbx_port_params.ets.enabled)
73
74struct bnx2x_config_lldp_params {
75	u32 overwrite_settings;
76	u32 msg_tx_hold;
77	u32 msg_fast_tx;
78	u32 tx_credit_max;
79	u32 msg_tx_interval;
80	u32 tx_fast;
81};
82
83struct bnx2x_admin_priority_app_table {
84		u32 valid;
85		u32 priority;
86#define INVALID_TRAFFIC_TYPE_PRIORITY	(0xFFFFFFFF)
87		u32 traffic_type;
88#define TRAFFIC_TYPE_ETH		0
89#define TRAFFIC_TYPE_PORT		1
90		u32 app_id;
91};
92
93#define DCBX_CONFIG_MAX_APP_PROTOCOL 4
94struct bnx2x_config_dcbx_params {
95	u32 overwrite_settings;
96	u32 admin_dcbx_version;
97	u32 admin_ets_enable;
98	u32 admin_pfc_enable;
99	u32 admin_tc_supported_tx_enable;
100	u32 admin_ets_configuration_tx_enable;
101	u32 admin_ets_recommendation_tx_enable;
102	u32 admin_pfc_tx_enable;
103	u32 admin_application_priority_tx_enable;
104	u32 admin_ets_willing;
105	u32 admin_ets_reco_valid;
106	u32 admin_pfc_willing;
107	u32 admin_app_priority_willing;
108	u32 admin_configuration_bw_precentage[8];
109	u32 admin_configuration_ets_pg[8];
110	u32 admin_recommendation_bw_precentage[8];
111	u32 admin_recommendation_ets_pg[8];
112	u32 admin_pfc_bitmap;
113	struct bnx2x_admin_priority_app_table
114		admin_priority_app_table[DCBX_CONFIG_MAX_APP_PROTOCOL];
115	u32 admin_default_priority;
116};
117
118#define GET_FLAGS(flags, bits)		((flags) & (bits))
119#define SET_FLAGS(flags, bits)		((flags) |= (bits))
120#define RESET_FLAGS(flags, bits)	((flags) &= ~(bits))
121
122enum {
123	DCBX_READ_LOCAL_MIB,
124	DCBX_READ_REMOTE_MIB
125};
126
127#define ETH_TYPE_FCOE		(0x8906)
128#define TCP_PORT_ISCSI		(0xCBC)
129
130#define PFC_VALUE_FRAME_SIZE				(512)
131#define PFC_QUANTA_IN_NANOSEC_FROM_SPEED_MEGA(mega_speed)  \
132				((1000 * PFC_VALUE_FRAME_SIZE)/(mega_speed))
133
134#define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD			130
135#define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD			170
136
137struct cos_entry_help_data {
138	u32			pri_join_mask;
139	u32			cos_bw;
140	u8			strict;
141	bool			pausable;
142};
143
144struct cos_help_data {
145	struct cos_entry_help_data	data[DCBX_COS_MAX_NUM];
146	u8				num_of_cos;
147};
148
149#define DCBX_ILLEGAL_PG				(0xFF)
150#define DCBX_PFC_PRI_MASK			(0xFF)
151#define DCBX_STRICT_PRIORITY			(15)
152#define DCBX_INVALID_COS_BW			(0xFFFFFFFF)
153#define DCBX_PFC_PRI_NON_PAUSE_MASK(bp)		\
154			((bp)->dcbx_port_params.pfc.priority_non_pauseable_mask)
155#define DCBX_PFC_PRI_PAUSE_MASK(bp)		\
156					((u8)~DCBX_PFC_PRI_NON_PAUSE_MASK(bp))
157#define DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri)	\
158				((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp)))
159#define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri)	\
160			(DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri))
161#define DCBX_IS_PFC_PRI_SOME_PAUSE(bp, pg_pri)	\
162			(0 != DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri))
163#define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri)	\
164			(pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri)))
165#define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\
166			((pg_pri) == DCBX_PFC_PRI_GET_NON_PAUSE((bp), (pg_pri)))
167#define IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pg_pri)	\
168			(!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) || \
169			 IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri))))
170
171struct pg_entry_help_data {
172	u8	num_of_dif_pri;
173	u8	pg;
174	u32	pg_priority;
175};
176
177struct pg_help_data {
178	struct pg_entry_help_data	data[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
179	u8				num_of_pg;
180};
181
182/* forward DCB/PFC related declarations */
183struct bnx2x;
184void bnx2x_dcbx_update(struct work_struct *work);
185void bnx2x_dcbx_init_params(struct bnx2x *bp);
186void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled);
187
188enum {
189	BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1,
190	BNX2X_DCBX_STATE_TX_PAUSED,
191	BNX2X_DCBX_STATE_TX_RELEASED
192};
193
194void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state);
195void bnx2x_dcbx_pmf_update(struct bnx2x *bp);
196/* DCB netlink */
197#ifdef BCM_DCBNL
198extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops;
199int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall);
200#endif /* BCM_DCBNL */
201
202int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
203int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
204
205#endif /* BNX2X_DCB_H */
206