1/* Intel Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2015 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21#ifndef _FM10K_H_
22#define _FM10K_H_
23
24#include <linux/types.h>
25#include <linux/etherdevice.h>
26#include <linux/rtnetlink.h>
27#include <linux/if_vlan.h>
28#include <linux/pci.h>
29#include <linux/net_tstamp.h>
30#include <linux/clocksource.h>
31#include <linux/ptp_clock_kernel.h>
32
33#include "fm10k_pf.h"
34#include "fm10k_vf.h"
35
36#define FM10K_MAX_JUMBO_FRAME_SIZE	15358	/* Maximum supported size 15K */
37
38#define MAX_QUEUES	FM10K_MAX_QUEUES_PF
39
40#define FM10K_MIN_RXD		 128
41#define FM10K_MAX_RXD		4096
42#define FM10K_DEFAULT_RXD	 256
43
44#define FM10K_MIN_TXD		 128
45#define FM10K_MAX_TXD		4096
46#define FM10K_DEFAULT_TXD	 256
47#define FM10K_DEFAULT_TX_WORK	 256
48
49#define FM10K_RXBUFFER_256	  256
50#define FM10K_RX_HDR_LEN	FM10K_RXBUFFER_256
51#define FM10K_RXBUFFER_2048	 2048
52#define FM10K_RX_BUFSZ		FM10K_RXBUFFER_2048
53
54/* How many Rx Buffers do we bundle into one write to the hardware ? */
55#define FM10K_RX_BUFFER_WRITE	16	/* Must be power of 2 */
56
57#define FM10K_MAX_STATIONS	63
58struct fm10k_l2_accel {
59	int size;
60	u16 count;
61	u16 dglort;
62	struct rcu_head rcu;
63	struct net_device *macvlan[0];
64};
65
66enum fm10k_ring_state_t {
67	__FM10K_TX_DETECT_HANG,
68	__FM10K_HANG_CHECK_ARMED,
69};
70
71#define check_for_tx_hang(ring) \
72	test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
73#define set_check_for_tx_hang(ring) \
74	set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
75#define clear_check_for_tx_hang(ring) \
76	clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
77
78struct fm10k_tx_buffer {
79	struct fm10k_tx_desc *next_to_watch;
80	struct sk_buff *skb;
81	unsigned int bytecount;
82	u16 gso_segs;
83	u16 tx_flags;
84	DEFINE_DMA_UNMAP_ADDR(dma);
85	DEFINE_DMA_UNMAP_LEN(len);
86};
87
88struct fm10k_rx_buffer {
89	dma_addr_t dma;
90	struct page *page;
91	u32 page_offset;
92};
93
94struct fm10k_queue_stats {
95	u64 packets;
96	u64 bytes;
97};
98
99struct fm10k_tx_queue_stats {
100	u64 restart_queue;
101	u64 csum_err;
102	u64 tx_busy;
103	u64 tx_done_old;
104};
105
106struct fm10k_rx_queue_stats {
107	u64 alloc_failed;
108	u64 csum_err;
109	u64 errors;
110};
111
112struct fm10k_ring {
113	struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
114	struct net_device *netdev;	/* netdev ring belongs to */
115	struct device *dev;		/* device for DMA mapping */
116	struct fm10k_l2_accel __rcu *l2_accel;	/* L2 acceleration list */
117	void *desc;			/* descriptor ring memory */
118	union {
119		struct fm10k_tx_buffer *tx_buffer;
120		struct fm10k_rx_buffer *rx_buffer;
121	};
122	u32 __iomem *tail;
123	unsigned long state;
124	dma_addr_t dma;			/* phys. address of descriptor ring */
125	unsigned int size;		/* length in bytes */
126
127	u8 queue_index;			/* needed for queue management */
128	u8 reg_idx;			/* holds the special value that gets
129					 * the hardware register offset
130					 * associated with this ring, which is
131					 * different for DCB and RSS modes
132					 */
133	u8 qos_pc;			/* priority class of queue */
134	u16 vid;			/* default vlan ID of queue */
135	u16 count;			/* amount of descriptors */
136
137	u16 next_to_alloc;
138	u16 next_to_use;
139	u16 next_to_clean;
140
141	struct fm10k_queue_stats stats;
142	struct u64_stats_sync syncp;
143	union {
144		/* Tx */
145		struct fm10k_tx_queue_stats tx_stats;
146		/* Rx */
147		struct {
148			struct fm10k_rx_queue_stats rx_stats;
149			struct sk_buff *skb;
150		};
151	};
152} ____cacheline_internodealigned_in_smp;
153
154struct fm10k_ring_container {
155	struct fm10k_ring *ring;	/* pointer to linked list of rings */
156	unsigned int total_bytes;	/* total bytes processed this int */
157	unsigned int total_packets;	/* total packets processed this int */
158	u16 work_limit;			/* total work allowed per interrupt */
159	u16 itr;			/* interrupt throttle rate value */
160	u8 count;			/* total number of rings in vector */
161};
162
163#define FM10K_ITR_MAX		0x0FFF	/* maximum value for ITR */
164#define FM10K_ITR_10K		100	/* 100us */
165#define FM10K_ITR_20K		50	/* 50us */
166#define FM10K_ITR_ADAPTIVE	0x8000	/* adaptive interrupt moderation flag */
167
168#define FM10K_ITR_ENABLE	(FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
169
170static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
171{
172	return &ring->netdev->_tx[ring->queue_index];
173}
174
175/* iterator for handling rings in ring container */
176#define fm10k_for_each_ring(pos, head) \
177	for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
178
179#define MAX_Q_VECTORS 256
180#define MIN_Q_VECTORS	1
181enum fm10k_non_q_vectors {
182	FM10K_MBX_VECTOR,
183#define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
184	NON_Q_VECTORS_PF
185};
186
187#define NON_Q_VECTORS(hw)	(((hw)->mac.type == fm10k_mac_pf) ? \
188						NON_Q_VECTORS_PF : \
189						NON_Q_VECTORS_VF)
190#define MIN_MSIX_COUNT(hw)	(MIN_Q_VECTORS + NON_Q_VECTORS(hw))
191
192struct fm10k_q_vector {
193	struct fm10k_intfc *interface;
194	u32 __iomem *itr;	/* pointer to ITR register for this vector */
195	u16 v_idx;		/* index of q_vector within interface array */
196	struct fm10k_ring_container rx, tx;
197
198	struct napi_struct napi;
199	char name[IFNAMSIZ + 9];
200
201#ifdef CONFIG_DEBUG_FS
202	struct dentry *dbg_q_vector;
203#endif /* CONFIG_DEBUG_FS */
204	struct rcu_head rcu;	/* to avoid race with update stats on free */
205
206	/* for dynamic allocation of rings associated with this q_vector */
207	struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
208};
209
210enum fm10k_ring_f_enum {
211	RING_F_RSS,
212	RING_F_QOS,
213	RING_F_ARRAY_SIZE  /* must be last in enum set */
214};
215
216struct fm10k_ring_feature {
217	u16 limit;	/* upper limit on feature indices */
218	u16 indices;	/* current value of indices */
219	u16 mask;	/* Mask used for feature to ring mapping */
220	u16 offset;	/* offset to start of feature */
221};
222
223struct fm10k_iov_data {
224	unsigned int		num_vfs;
225	unsigned int		next_vf_mbx;
226	struct rcu_head		rcu;
227	struct fm10k_vf_info	vf_info[0];
228};
229
230#define fm10k_vxlan_port_for_each(vp, intfc) \
231	list_for_each_entry(vp, &(intfc)->vxlan_port, list)
232struct fm10k_vxlan_port {
233	struct list_head	list;
234	sa_family_t		sa_family;
235	__be16			port;
236};
237
238/* one work queue for entire driver */
239extern struct workqueue_struct *fm10k_workqueue;
240
241struct fm10k_intfc {
242	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
243	struct net_device *netdev;
244	struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
245	struct pci_dev *pdev;
246	unsigned long state;
247
248	u32 flags;
249#define FM10K_FLAG_RESET_REQUESTED		(u32)(1 << 0)
250#define FM10K_FLAG_RSS_FIELD_IPV4_UDP		(u32)(1 << 1)
251#define FM10K_FLAG_RSS_FIELD_IPV6_UDP		(u32)(1 << 2)
252#define FM10K_FLAG_RX_TS_ENABLED		(u32)(1 << 3)
253#define FM10K_FLAG_SWPRI_CONFIG			(u32)(1 << 4)
254	int xcast_mode;
255
256	/* Tx fast path data */
257	int num_tx_queues;
258	u16 tx_itr;
259
260	/* Rx fast path data */
261	int num_rx_queues;
262	u16 rx_itr;
263
264	/* TX */
265	struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
266
267	u64 restart_queue;
268	u64 tx_busy;
269	u64 tx_csum_errors;
270	u64 alloc_failed;
271	u64 rx_csum_errors;
272
273	u64 tx_bytes_nic;
274	u64 tx_packets_nic;
275	u64 rx_bytes_nic;
276	u64 rx_packets_nic;
277	u64 rx_drops_nic;
278	u64 rx_overrun_pf;
279	u64 rx_overrun_vf;
280	u32 tx_timeout_count;
281
282	/* RX */
283	struct fm10k_ring *rx_ring[MAX_QUEUES];
284
285	/* Queueing vectors */
286	struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
287	struct msix_entry *msix_entries;
288	int num_q_vectors;	/* current number of q_vectors for device */
289	struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
290
291	/* SR-IOV information management structure */
292	struct fm10k_iov_data *iov_data;
293
294	struct fm10k_hw_stats stats;
295	struct fm10k_hw hw;
296	u32 __iomem *uc_addr;
297	u32 __iomem *sw_addr;
298	u16 msg_enable;
299	u16 tx_ring_count;
300	u16 rx_ring_count;
301	struct timer_list service_timer;
302	struct work_struct service_task;
303	unsigned long next_stats_update;
304	unsigned long next_tx_hang_check;
305	unsigned long last_reset;
306	unsigned long link_down_event;
307	bool host_ready;
308
309	u32 reta[FM10K_RETA_SIZE];
310	u32 rssrk[FM10K_RSSRK_SIZE];
311
312	/* VXLAN port tracking information */
313	struct list_head vxlan_port;
314
315#ifdef CONFIG_DEBUG_FS
316	struct dentry *dbg_intfc;
317
318#endif /* CONFIG_DEBUG_FS */
319	struct ptp_clock_info ptp_caps;
320	struct ptp_clock *ptp_clock;
321
322	struct sk_buff_head ts_tx_skb_queue;
323	u32 tx_hwtstamp_timeouts;
324
325	struct hwtstamp_config ts_config;
326	/* We are unable to actually adjust the clock beyond the frequency
327	 * value.  Once the clock is started there is no resetting it.  As
328	 * such we maintain a separate offset from the actual hardware clock
329	 * to allow for offset adjustment.
330	 */
331	s64 ptp_adjust;
332	rwlock_t systime_lock;
333#ifdef CONFIG_DCB
334	u8 pfc_en;
335#endif
336	u8 rx_pause;
337
338	/* GLORT resources in use by PF */
339	u16 glort;
340	u16 glort_count;
341
342	/* VLAN ID for updating multicast/unicast lists */
343	u16 vid;
344};
345
346enum fm10k_state_t {
347	__FM10K_RESETTING,
348	__FM10K_DOWN,
349	__FM10K_SERVICE_SCHED,
350	__FM10K_SERVICE_DISABLE,
351	__FM10K_MBX_LOCK,
352	__FM10K_LINK_DOWN,
353};
354
355static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
356{
357	/* busy loop if we cannot obtain the lock as some calls
358	 * such as ndo_set_rx_mode may be made in atomic context
359	 */
360	while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
361		udelay(20);
362}
363
364static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
365{
366	/* flush memory to make sure state is correct */
367	smp_mb__before_atomic();
368	clear_bit(__FM10K_MBX_LOCK, &interface->state);
369}
370
371static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
372{
373	return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
374}
375
376/* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
377static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
378					const u32 stat_err_bits)
379{
380	return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
381}
382
383/* fm10k_desc_unused - calculate if we have unused descriptors */
384static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
385{
386	s16 unused = ring->next_to_clean - ring->next_to_use - 1;
387
388	return likely(unused < 0) ? unused + ring->count : unused;
389}
390
391#define FM10K_TX_DESC(R, i)	\
392	(&(((struct fm10k_tx_desc *)((R)->desc))[i]))
393#define FM10K_RX_DESC(R, i)	\
394	 (&(((union fm10k_rx_desc *)((R)->desc))[i]))
395
396#define FM10K_MAX_TXD_PWR	14
397#define FM10K_MAX_DATA_PER_TXD	(1 << FM10K_MAX_TXD_PWR)
398
399/* Tx Descriptors needed, worst case */
400#define TXD_USE_COUNT(S)	DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
401#define DESC_NEEDED	(MAX_SKB_FRAGS + 4)
402
403enum fm10k_tx_flags {
404	/* Tx offload flags */
405	FM10K_TX_FLAGS_CSUM	= 0x01,
406};
407
408/* This structure is stored as little endian values as that is the native
409 * format of the Rx descriptor.  The ordering of these fields is reversed
410 * from the actual ftag header to allow for a single bswap to take care
411 * of placing all of the values in network order
412 */
413union fm10k_ftag_info {
414	__le64 ftag;
415	struct {
416		/* dglort and sglort combined into a single 32bit desc read */
417		__le32 glort;
418		/* upper 16 bits of vlan are reserved 0 for swpri_type_user */
419		__le32 vlan;
420	} d;
421	struct {
422		__le16 dglort;
423		__le16 sglort;
424		__le16 vlan;
425		__le16 swpri_type_user;
426	} w;
427};
428
429struct fm10k_cb {
430	union {
431		__le64 tstamp;
432		unsigned long ts_tx_timeout;
433	};
434	union fm10k_ftag_info fi;
435};
436
437#define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
438
439/* main */
440extern char fm10k_driver_name[];
441extern const char fm10k_driver_version[];
442int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
443void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
444__be16 fm10k_tx_encap_offload(struct sk_buff *skb);
445netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
446				  struct fm10k_ring *tx_ring);
447void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
448bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
449void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
450
451/* PCI */
452void fm10k_mbx_free_irq(struct fm10k_intfc *);
453int fm10k_mbx_request_irq(struct fm10k_intfc *);
454void fm10k_qv_free_irq(struct fm10k_intfc *interface);
455int fm10k_qv_request_irq(struct fm10k_intfc *interface);
456int fm10k_register_pci_driver(void);
457void fm10k_unregister_pci_driver(void);
458void fm10k_up(struct fm10k_intfc *interface);
459void fm10k_down(struct fm10k_intfc *interface);
460void fm10k_update_stats(struct fm10k_intfc *interface);
461void fm10k_service_event_schedule(struct fm10k_intfc *interface);
462void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
463#ifdef CONFIG_NET_POLL_CONTROLLER
464void fm10k_netpoll(struct net_device *netdev);
465#endif
466
467/* Netdev */
468struct net_device *fm10k_alloc_netdev(void);
469int fm10k_setup_rx_resources(struct fm10k_ring *);
470int fm10k_setup_tx_resources(struct fm10k_ring *);
471void fm10k_free_rx_resources(struct fm10k_ring *);
472void fm10k_free_tx_resources(struct fm10k_ring *);
473void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
474void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
475void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
476				      struct fm10k_tx_buffer *);
477void fm10k_restore_rx_state(struct fm10k_intfc *);
478void fm10k_reset_rx_state(struct fm10k_intfc *);
479int fm10k_setup_tc(struct net_device *dev, u8 tc);
480int fm10k_open(struct net_device *netdev);
481int fm10k_close(struct net_device *netdev);
482
483/* Ethtool */
484void fm10k_set_ethtool_ops(struct net_device *dev);
485
486/* IOV */
487s32 fm10k_iov_event(struct fm10k_intfc *interface);
488s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
489void fm10k_iov_suspend(struct pci_dev *pdev);
490int fm10k_iov_resume(struct pci_dev *pdev);
491void fm10k_iov_disable(struct pci_dev *pdev);
492int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
493s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
494int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
495int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
496			  int vf_idx, u16 vid, u8 qos);
497int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate,
498			int unused);
499int fm10k_ndo_get_vf_config(struct net_device *netdev,
500			    int vf_idx, struct ifla_vf_info *ivi);
501
502/* DebugFS */
503#ifdef CONFIG_DEBUG_FS
504void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector);
505void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector);
506void fm10k_dbg_intfc_init(struct fm10k_intfc *interface);
507void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface);
508void fm10k_dbg_init(void);
509void fm10k_dbg_exit(void);
510#else
511static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {}
512static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {}
513static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {}
514static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {}
515static inline void fm10k_dbg_init(void) {}
516static inline void fm10k_dbg_exit(void) {}
517#endif /* CONFIG_DEBUG_FS */
518
519/* Time Stamping */
520void fm10k_systime_to_hwtstamp(struct fm10k_intfc *interface,
521			       struct skb_shared_hwtstamps *hwtstamp,
522			       u64 systime);
523void fm10k_ts_tx_enqueue(struct fm10k_intfc *interface, struct sk_buff *skb);
524void fm10k_ts_tx_hwtstamp(struct fm10k_intfc *interface, __le16 dglort,
525			  u64 systime);
526void fm10k_ts_reset(struct fm10k_intfc *interface);
527void fm10k_ts_init(struct fm10k_intfc *interface);
528void fm10k_ts_tx_subtask(struct fm10k_intfc *interface);
529void fm10k_ptp_register(struct fm10k_intfc *interface);
530void fm10k_ptp_unregister(struct fm10k_intfc *interface);
531int fm10k_get_ts_config(struct net_device *netdev, struct ifreq *ifr);
532int fm10k_set_ts_config(struct net_device *netdev, struct ifreq *ifr);
533
534/* DCB */
535void fm10k_dcbnl_set_ops(struct net_device *dev);
536#endif /* _FM10K_H_ */
537