1/*******************************************************************************
2
3  Copyright(c) 2006 Tundra Semiconductor Corporation.
4
5  This program is free software; you can redistribute it and/or modify it
6  under the terms of the GNU General Public License as published by the Free
7  Software Foundation; either version 2 of the License, or (at your option)
8  any later version.
9
10  This program is distributed in the hope that it will be useful, but WITHOUT
11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  more details.
14
15  You should have received a copy of the GNU General Public License along with
16  this program; if not, write to the Free Software Foundation, Inc., 59
17  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
18
19*******************************************************************************/
20
21/* This driver is based on the driver code originally developed
22 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
23 * scott.wood@timesys.com  * Copyright (C) 2003 TimeSys Corporation
24 *
25 * Currently changes from original version are:
26 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
27 * - modifications to handle two ports independently and support for
28 *   additional PHY devices (alexandre.bounine@tundra.com)
29 * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
30 *
31 */
32
33#include <linux/module.h>
34#include <linux/types.h>
35#include <linux/interrupt.h>
36#include <linux/net.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/ethtool.h>
40#include <linux/skbuff.h>
41#include <linux/spinlock.h>
42#include <linux/delay.h>
43#include <linux/crc32.h>
44#include <linux/mii.h>
45#include <linux/device.h>
46#include <linux/pci.h>
47#include <linux/rtnetlink.h>
48#include <linux/timer.h>
49#include <linux/platform_device.h>
50#include <linux/gfp.h>
51
52#include <asm/io.h>
53#include <asm/tsi108.h>
54
55#include "tsi108_eth.h"
56
57#define MII_READ_DELAY 10000	/* max link wait time in msec */
58
59#define TSI108_RXRING_LEN     256
60
61/* NOTE: The driver currently does not support receiving packets
62 * larger than the buffer size, so don't decrease this (unless you
63 * want to add such support).
64 */
65#define TSI108_RXBUF_SIZE     1536
66
67#define TSI108_TXRING_LEN     256
68
69#define TSI108_TX_INT_FREQ    64
70
71/* Check the phy status every half a second. */
72#define CHECK_PHY_INTERVAL (HZ/2)
73
74static int tsi108_init_one(struct platform_device *pdev);
75static int tsi108_ether_remove(struct platform_device *pdev);
76
77struct tsi108_prv_data {
78	void  __iomem *regs;	/* Base of normal regs */
79	void  __iomem *phyregs;	/* Base of register bank used for PHY access */
80
81	struct net_device *dev;
82	struct napi_struct napi;
83
84	unsigned int phy;		/* Index of PHY for this interface */
85	unsigned int irq_num;
86	unsigned int id;
87	unsigned int phy_type;
88
89	struct timer_list timer;/* Timer that triggers the check phy function */
90	unsigned int rxtail;	/* Next entry in rxring to read */
91	unsigned int rxhead;	/* Next entry in rxring to give a new buffer */
92	unsigned int rxfree;	/* Number of free, allocated RX buffers */
93
94	unsigned int rxpending;	/* Non-zero if there are still descriptors
95				 * to be processed from a previous descriptor
96				 * interrupt condition that has been cleared */
97
98	unsigned int txtail;	/* Next TX descriptor to check status on */
99	unsigned int txhead;	/* Next TX descriptor to use */
100
101	/* Number of free TX descriptors.  This could be calculated from
102	 * rxhead and rxtail if one descriptor were left unused to disambiguate
103	 * full and empty conditions, but it's simpler to just keep track
104	 * explicitly. */
105
106	unsigned int txfree;
107
108	unsigned int phy_ok;		/* The PHY is currently powered on. */
109
110	/* PHY status (duplex is 1 for half, 2 for full,
111	 * so that the default 0 indicates that neither has
112	 * yet been configured). */
113
114	unsigned int link_up;
115	unsigned int speed;
116	unsigned int duplex;
117
118	tx_desc *txring;
119	rx_desc *rxring;
120	struct sk_buff *txskbs[TSI108_TXRING_LEN];
121	struct sk_buff *rxskbs[TSI108_RXRING_LEN];
122
123	dma_addr_t txdma, rxdma;
124
125	/* txlock nests in misclock and phy_lock */
126
127	spinlock_t txlock, misclock;
128
129	/* stats is used to hold the upper bits of each hardware counter,
130	 * and tmpstats is used to hold the full values for returning
131	 * to the caller of get_stats().  They must be separate in case
132	 * an overflow interrupt occurs before the stats are consumed.
133	 */
134
135	struct net_device_stats stats;
136	struct net_device_stats tmpstats;
137
138	/* These stats are kept separate in hardware, thus require individual
139	 * fields for handling carry.  They are combined in get_stats.
140	 */
141
142	unsigned long rx_fcs;	/* Add to rx_frame_errors */
143	unsigned long rx_short_fcs;	/* Add to rx_frame_errors */
144	unsigned long rx_long_fcs;	/* Add to rx_frame_errors */
145	unsigned long rx_underruns;	/* Add to rx_length_errors */
146	unsigned long rx_overruns;	/* Add to rx_length_errors */
147
148	unsigned long tx_coll_abort;	/* Add to tx_aborted_errors/collisions */
149	unsigned long tx_pause_drop;	/* Add to tx_aborted_errors */
150
151	unsigned long mc_hash[16];
152	u32 msg_enable;			/* debug message level */
153	struct mii_if_info mii_if;
154	unsigned int init_media;
155};
156
157/* Structure for a device driver */
158
159static struct platform_driver tsi_eth_driver = {
160	.probe = tsi108_init_one,
161	.remove = tsi108_ether_remove,
162	.driver	= {
163		.name = "tsi-ethernet",
164	},
165};
166
167static void tsi108_timed_checker(unsigned long dev_ptr);
168
169static void dump_eth_one(struct net_device *dev)
170{
171	struct tsi108_prv_data *data = netdev_priv(dev);
172
173	printk("Dumping %s...\n", dev->name);
174	printk("intstat %x intmask %x phy_ok %d"
175	       " link %d speed %d duplex %d\n",
176	       TSI_READ(TSI108_EC_INTSTAT),
177	       TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
178	       data->link_up, data->speed, data->duplex);
179
180	printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
181	       data->txhead, data->txtail, data->txfree,
182	       TSI_READ(TSI108_EC_TXSTAT),
183	       TSI_READ(TSI108_EC_TXESTAT),
184	       TSI_READ(TSI108_EC_TXERR));
185
186	printk("RX: head %d, tail %d, free %d, stat %x,"
187	       " estat %x, err %x, pending %d\n\n",
188	       data->rxhead, data->rxtail, data->rxfree,
189	       TSI_READ(TSI108_EC_RXSTAT),
190	       TSI_READ(TSI108_EC_RXESTAT),
191	       TSI_READ(TSI108_EC_RXERR), data->rxpending);
192}
193
194/* Synchronization is needed between the thread and up/down events.
195 * Note that the PHY is accessed through the same registers for both
196 * interfaces, so this can't be made interface-specific.
197 */
198
199static DEFINE_SPINLOCK(phy_lock);
200
201static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
202{
203	unsigned i;
204
205	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
206				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
207				(reg << TSI108_MAC_MII_ADDR_REG));
208	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
209	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
210	for (i = 0; i < 100; i++) {
211		if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
212		      (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
213			break;
214		udelay(10);
215	}
216
217	if (i == 100)
218		return 0xffff;
219	else
220		return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
221}
222
223static void tsi108_write_mii(struct tsi108_prv_data *data,
224				int reg, u16 val)
225{
226	unsigned i = 100;
227	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
228				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
229				(reg << TSI108_MAC_MII_ADDR_REG));
230	TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
231	while (i--) {
232		if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
233			TSI108_MAC_MII_IND_BUSY))
234			break;
235		udelay(10);
236	}
237}
238
239static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
240{
241	struct tsi108_prv_data *data = netdev_priv(dev);
242	return tsi108_read_mii(data, reg);
243}
244
245static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
246{
247	struct tsi108_prv_data *data = netdev_priv(dev);
248	tsi108_write_mii(data, reg, val);
249}
250
251static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
252					int reg, u16 val)
253{
254	unsigned i = 1000;
255	TSI_WRITE(TSI108_MAC_MII_ADDR,
256			     (0x1e << TSI108_MAC_MII_ADDR_PHY)
257			     | (reg << TSI108_MAC_MII_ADDR_REG));
258	TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
259	while(i--) {
260		if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
261			return;
262		udelay(10);
263	}
264	printk(KERN_ERR "%s function time out\n", __func__);
265}
266
267static int mii_speed(struct mii_if_info *mii)
268{
269	int advert, lpa, val, media;
270	int lpa2 = 0;
271	int speed;
272
273	if (!mii_link_ok(mii))
274		return 0;
275
276	val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
277	if ((val & BMSR_ANEGCOMPLETE) == 0)
278		return 0;
279
280	advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
281	lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
282	media = mii_nway_result(advert & lpa);
283
284	if (mii->supports_gmii)
285		lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
286
287	speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
288			(media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
289	return speed;
290}
291
292static void tsi108_check_phy(struct net_device *dev)
293{
294	struct tsi108_prv_data *data = netdev_priv(dev);
295	u32 mac_cfg2_reg, portctrl_reg;
296	u32 duplex;
297	u32 speed;
298	unsigned long flags;
299
300	spin_lock_irqsave(&phy_lock, flags);
301
302	if (!data->phy_ok)
303		goto out;
304
305	duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
306	data->init_media = 0;
307
308	if (netif_carrier_ok(dev)) {
309
310		speed = mii_speed(&data->mii_if);
311
312		if ((speed != data->speed) || duplex) {
313
314			mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
315			portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
316
317			mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
318
319			if (speed == 1000) {
320				mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
321				portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
322			} else {
323				mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
324				portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
325			}
326
327			data->speed = speed;
328
329			if (data->mii_if.full_duplex) {
330				mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
331				portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
332				data->duplex = 2;
333			} else {
334				mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
335				portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
336				data->duplex = 1;
337			}
338
339			TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
340			TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
341		}
342
343		if (data->link_up == 0) {
344			/* The manual says it can take 3-4 usecs for the speed change
345			 * to take effect.
346			 */
347			udelay(5);
348
349			spin_lock(&data->txlock);
350			if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
351				netif_wake_queue(dev);
352
353			data->link_up = 1;
354			spin_unlock(&data->txlock);
355		}
356	} else {
357		if (data->link_up == 1) {
358			netif_stop_queue(dev);
359			data->link_up = 0;
360			printk(KERN_NOTICE "%s : link is down\n", dev->name);
361		}
362
363		goto out;
364	}
365
366
367out:
368	spin_unlock_irqrestore(&phy_lock, flags);
369}
370
371static inline void
372tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
373		      unsigned long *upper)
374{
375	if (carry & carry_bit)
376		*upper += carry_shift;
377}
378
379static void tsi108_stat_carry(struct net_device *dev)
380{
381	struct tsi108_prv_data *data = netdev_priv(dev);
382	u32 carry1, carry2;
383
384	spin_lock_irq(&data->misclock);
385
386	carry1 = TSI_READ(TSI108_STAT_CARRY1);
387	carry2 = TSI_READ(TSI108_STAT_CARRY2);
388
389	TSI_WRITE(TSI108_STAT_CARRY1, carry1);
390	TSI_WRITE(TSI108_STAT_CARRY2, carry2);
391
392	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
393			      TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
394
395	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
396			      TSI108_STAT_RXPKTS_CARRY,
397			      &data->stats.rx_packets);
398
399	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
400			      TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
401
402	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
403			      TSI108_STAT_RXMCAST_CARRY,
404			      &data->stats.multicast);
405
406	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
407			      TSI108_STAT_RXALIGN_CARRY,
408			      &data->stats.rx_frame_errors);
409
410	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
411			      TSI108_STAT_RXLENGTH_CARRY,
412			      &data->stats.rx_length_errors);
413
414	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
415			      TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
416
417	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
418			      TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
419
420	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
421			      TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
422
423	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
424			      TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
425
426	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
427			      TSI108_STAT_RXDROP_CARRY,
428			      &data->stats.rx_missed_errors);
429
430	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
431			      TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
432
433	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
434			      TSI108_STAT_TXPKTS_CARRY,
435			      &data->stats.tx_packets);
436
437	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
438			      TSI108_STAT_TXEXDEF_CARRY,
439			      &data->stats.tx_aborted_errors);
440
441	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
442			      TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
443
444	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
445			      TSI108_STAT_TXTCOL_CARRY,
446			      &data->stats.collisions);
447
448	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
449			      TSI108_STAT_TXPAUSEDROP_CARRY,
450			      &data->tx_pause_drop);
451
452	spin_unlock_irq(&data->misclock);
453}
454
455/* Read a stat counter atomically with respect to carries.
456 * data->misclock must be held.
457 */
458static inline unsigned long
459tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
460		 int carry_shift, unsigned long *upper)
461{
462	int carryreg;
463	unsigned long val;
464
465	if (reg < 0xb0)
466		carryreg = TSI108_STAT_CARRY1;
467	else
468		carryreg = TSI108_STAT_CARRY2;
469
470      again:
471	val = TSI_READ(reg) | *upper;
472
473	/* Check to see if it overflowed, but the interrupt hasn't
474	 * been serviced yet.  If so, handle the carry here, and
475	 * try again.
476	 */
477
478	if (unlikely(TSI_READ(carryreg) & carry_bit)) {
479		*upper += carry_shift;
480		TSI_WRITE(carryreg, carry_bit);
481		goto again;
482	}
483
484	return val;
485}
486
487static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
488{
489	unsigned long excol;
490
491	struct tsi108_prv_data *data = netdev_priv(dev);
492	spin_lock_irq(&data->misclock);
493
494	data->tmpstats.rx_packets =
495	    tsi108_read_stat(data, TSI108_STAT_RXPKTS,
496			     TSI108_STAT_CARRY1_RXPKTS,
497			     TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
498
499	data->tmpstats.tx_packets =
500	    tsi108_read_stat(data, TSI108_STAT_TXPKTS,
501			     TSI108_STAT_CARRY2_TXPKTS,
502			     TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
503
504	data->tmpstats.rx_bytes =
505	    tsi108_read_stat(data, TSI108_STAT_RXBYTES,
506			     TSI108_STAT_CARRY1_RXBYTES,
507			     TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
508
509	data->tmpstats.tx_bytes =
510	    tsi108_read_stat(data, TSI108_STAT_TXBYTES,
511			     TSI108_STAT_CARRY2_TXBYTES,
512			     TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
513
514	data->tmpstats.multicast =
515	    tsi108_read_stat(data, TSI108_STAT_RXMCAST,
516			     TSI108_STAT_CARRY1_RXMCAST,
517			     TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
518
519	excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
520				 TSI108_STAT_CARRY2_TXEXCOL,
521				 TSI108_STAT_TXEXCOL_CARRY,
522				 &data->tx_coll_abort);
523
524	data->tmpstats.collisions =
525	    tsi108_read_stat(data, TSI108_STAT_TXTCOL,
526			     TSI108_STAT_CARRY2_TXTCOL,
527			     TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
528
529	data->tmpstats.collisions += excol;
530
531	data->tmpstats.rx_length_errors =
532	    tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
533			     TSI108_STAT_CARRY1_RXLENGTH,
534			     TSI108_STAT_RXLENGTH_CARRY,
535			     &data->stats.rx_length_errors);
536
537	data->tmpstats.rx_length_errors +=
538	    tsi108_read_stat(data, TSI108_STAT_RXRUNT,
539			     TSI108_STAT_CARRY1_RXRUNT,
540			     TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
541
542	data->tmpstats.rx_length_errors +=
543	    tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
544			     TSI108_STAT_CARRY1_RXJUMBO,
545			     TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
546
547	data->tmpstats.rx_frame_errors =
548	    tsi108_read_stat(data, TSI108_STAT_RXALIGN,
549			     TSI108_STAT_CARRY1_RXALIGN,
550			     TSI108_STAT_RXALIGN_CARRY,
551			     &data->stats.rx_frame_errors);
552
553	data->tmpstats.rx_frame_errors +=
554	    tsi108_read_stat(data, TSI108_STAT_RXFCS,
555			     TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
556			     &data->rx_fcs);
557
558	data->tmpstats.rx_frame_errors +=
559	    tsi108_read_stat(data, TSI108_STAT_RXFRAG,
560			     TSI108_STAT_CARRY1_RXFRAG,
561			     TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
562
563	data->tmpstats.rx_missed_errors =
564	    tsi108_read_stat(data, TSI108_STAT_RXDROP,
565			     TSI108_STAT_CARRY1_RXDROP,
566			     TSI108_STAT_RXDROP_CARRY,
567			     &data->stats.rx_missed_errors);
568
569	/* These three are maintained by software. */
570	data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
571	data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
572
573	data->tmpstats.tx_aborted_errors =
574	    tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
575			     TSI108_STAT_CARRY2_TXEXDEF,
576			     TSI108_STAT_TXEXDEF_CARRY,
577			     &data->stats.tx_aborted_errors);
578
579	data->tmpstats.tx_aborted_errors +=
580	    tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
581			     TSI108_STAT_CARRY2_TXPAUSE,
582			     TSI108_STAT_TXPAUSEDROP_CARRY,
583			     &data->tx_pause_drop);
584
585	data->tmpstats.tx_aborted_errors += excol;
586
587	data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
588	data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
589	    data->tmpstats.rx_crc_errors +
590	    data->tmpstats.rx_frame_errors +
591	    data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
592
593	spin_unlock_irq(&data->misclock);
594	return &data->tmpstats;
595}
596
597static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
598{
599	TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
600			     TSI108_EC_RXQ_PTRHIGH_VALID);
601
602	TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
603			     | TSI108_EC_RXCTRL_QUEUE0);
604}
605
606static void tsi108_restart_tx(struct tsi108_prv_data * data)
607{
608	TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
609			     TSI108_EC_TXQ_PTRHIGH_VALID);
610
611	TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
612			     TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
613}
614
615/* txlock must be held by caller, with IRQs disabled, and
616 * with permission to re-enable them when the lock is dropped.
617 */
618static void tsi108_complete_tx(struct net_device *dev)
619{
620	struct tsi108_prv_data *data = netdev_priv(dev);
621	int tx;
622	struct sk_buff *skb;
623	int release = 0;
624
625	while (!data->txfree || data->txhead != data->txtail) {
626		tx = data->txtail;
627
628		if (data->txring[tx].misc & TSI108_TX_OWN)
629			break;
630
631		skb = data->txskbs[tx];
632
633		if (!(data->txring[tx].misc & TSI108_TX_OK))
634			printk("%s: bad tx packet, misc %x\n",
635			       dev->name, data->txring[tx].misc);
636
637		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
638		data->txfree++;
639
640		if (data->txring[tx].misc & TSI108_TX_EOF) {
641			dev_kfree_skb_any(skb);
642			release++;
643		}
644	}
645
646	if (release) {
647		if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
648			netif_wake_queue(dev);
649	}
650}
651
652static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
653{
654	struct tsi108_prv_data *data = netdev_priv(dev);
655	int frags = skb_shinfo(skb)->nr_frags + 1;
656	int i;
657
658	if (!data->phy_ok && net_ratelimit())
659		printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
660
661	if (!data->link_up) {
662		printk(KERN_ERR "%s: Transmit while link is down!\n",
663		       dev->name);
664		netif_stop_queue(dev);
665		return NETDEV_TX_BUSY;
666	}
667
668	if (data->txfree < MAX_SKB_FRAGS + 1) {
669		netif_stop_queue(dev);
670
671		if (net_ratelimit())
672			printk(KERN_ERR "%s: Transmit with full tx ring!\n",
673			       dev->name);
674		return NETDEV_TX_BUSY;
675	}
676
677	if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
678		netif_stop_queue(dev);
679	}
680
681	spin_lock_irq(&data->txlock);
682
683	for (i = 0; i < frags; i++) {
684		int misc = 0;
685		int tx = data->txhead;
686
687		/* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
688		 * the interrupt bit.  TX descriptor-complete interrupts are
689		 * enabled when the queue fills up, and masked when there is
690		 * still free space.  This way, when saturating the outbound
691		 * link, the tx interrupts are kept to a reasonable level.
692		 * When the queue is not full, reclamation of skbs still occurs
693		 * as new packets are transmitted, or on a queue-empty
694		 * interrupt.
695		 */
696
697		if ((tx % TSI108_TX_INT_FREQ == 0) &&
698		    ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
699			misc = TSI108_TX_INT;
700
701		data->txskbs[tx] = skb;
702
703		if (i == 0) {
704			data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
705					skb_headlen(skb), DMA_TO_DEVICE);
706			data->txring[tx].len = skb_headlen(skb);
707			misc |= TSI108_TX_SOF;
708		} else {
709			const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
710
711			data->txring[tx].buf0 = skb_frag_dma_map(NULL, frag,
712								 0,
713								 skb_frag_size(frag),
714								 DMA_TO_DEVICE);
715			data->txring[tx].len = skb_frag_size(frag);
716		}
717
718		if (i == frags - 1)
719			misc |= TSI108_TX_EOF;
720
721		if (netif_msg_pktdata(data)) {
722			int i;
723			printk("%s: Tx Frame contents (%d)\n", dev->name,
724			       skb->len);
725			for (i = 0; i < skb->len; i++)
726				printk(" %2.2x", skb->data[i]);
727			printk(".\n");
728		}
729		data->txring[tx].misc = misc | TSI108_TX_OWN;
730
731		data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
732		data->txfree--;
733	}
734
735	tsi108_complete_tx(dev);
736
737	/* This must be done after the check for completed tx descriptors,
738	 * so that the tail pointer is correct.
739	 */
740
741	if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
742		tsi108_restart_tx(data);
743
744	spin_unlock_irq(&data->txlock);
745	return NETDEV_TX_OK;
746}
747
748static int tsi108_complete_rx(struct net_device *dev, int budget)
749{
750	struct tsi108_prv_data *data = netdev_priv(dev);
751	int done = 0;
752
753	while (data->rxfree && done != budget) {
754		int rx = data->rxtail;
755		struct sk_buff *skb;
756
757		if (data->rxring[rx].misc & TSI108_RX_OWN)
758			break;
759
760		skb = data->rxskbs[rx];
761		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
762		data->rxfree--;
763		done++;
764
765		if (data->rxring[rx].misc & TSI108_RX_BAD) {
766			spin_lock_irq(&data->misclock);
767
768			if (data->rxring[rx].misc & TSI108_RX_CRC)
769				data->stats.rx_crc_errors++;
770			if (data->rxring[rx].misc & TSI108_RX_OVER)
771				data->stats.rx_fifo_errors++;
772
773			spin_unlock_irq(&data->misclock);
774
775			dev_kfree_skb_any(skb);
776			continue;
777		}
778		if (netif_msg_pktdata(data)) {
779			int i;
780			printk("%s: Rx Frame contents (%d)\n",
781			       dev->name, data->rxring[rx].len);
782			for (i = 0; i < data->rxring[rx].len; i++)
783				printk(" %2.2x", skb->data[i]);
784			printk(".\n");
785		}
786
787		skb_put(skb, data->rxring[rx].len);
788		skb->protocol = eth_type_trans(skb, dev);
789		netif_receive_skb(skb);
790	}
791
792	return done;
793}
794
795static int tsi108_refill_rx(struct net_device *dev, int budget)
796{
797	struct tsi108_prv_data *data = netdev_priv(dev);
798	int done = 0;
799
800	while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
801		int rx = data->rxhead;
802		struct sk_buff *skb;
803
804		skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
805		data->rxskbs[rx] = skb;
806		if (!skb)
807			break;
808
809		data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
810							TSI108_RX_SKB_SIZE,
811							DMA_FROM_DEVICE);
812
813		/* Sometimes the hardware sets blen to zero after packet
814		 * reception, even though the manual says that it's only ever
815		 * modified by the driver.
816		 */
817
818		data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
819		data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
820
821		data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
822		data->rxfree++;
823		done++;
824	}
825
826	if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
827			   TSI108_EC_RXSTAT_QUEUE0))
828		tsi108_restart_rx(data, dev);
829
830	return done;
831}
832
833static int tsi108_poll(struct napi_struct *napi, int budget)
834{
835	struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
836	struct net_device *dev = data->dev;
837	u32 estat = TSI_READ(TSI108_EC_RXESTAT);
838	u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
839	int num_received = 0, num_filled = 0;
840
841	intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
842	    TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
843
844	TSI_WRITE(TSI108_EC_RXESTAT, estat);
845	TSI_WRITE(TSI108_EC_INTSTAT, intstat);
846
847	if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
848		num_received = tsi108_complete_rx(dev, budget);
849
850	/* This should normally fill no more slots than the number of
851	 * packets received in tsi108_complete_rx().  The exception
852	 * is when we previously ran out of memory for RX SKBs.  In that
853	 * case, it's helpful to obey the budget, not only so that the
854	 * CPU isn't hogged, but so that memory (which may still be low)
855	 * is not hogged by one device.
856	 *
857	 * A work unit is considered to be two SKBs to allow us to catch
858	 * up when the ring has shrunk due to out-of-memory but we're
859	 * still removing the full budget's worth of packets each time.
860	 */
861
862	if (data->rxfree < TSI108_RXRING_LEN)
863		num_filled = tsi108_refill_rx(dev, budget * 2);
864
865	if (intstat & TSI108_INT_RXERROR) {
866		u32 err = TSI_READ(TSI108_EC_RXERR);
867		TSI_WRITE(TSI108_EC_RXERR, err);
868
869		if (err) {
870			if (net_ratelimit())
871				printk(KERN_DEBUG "%s: RX error %x\n",
872				       dev->name, err);
873
874			if (!(TSI_READ(TSI108_EC_RXSTAT) &
875			      TSI108_EC_RXSTAT_QUEUE0))
876				tsi108_restart_rx(data, dev);
877		}
878	}
879
880	if (intstat & TSI108_INT_RXOVERRUN) {
881		spin_lock_irq(&data->misclock);
882		data->stats.rx_fifo_errors++;
883		spin_unlock_irq(&data->misclock);
884	}
885
886	if (num_received < budget) {
887		data->rxpending = 0;
888		napi_complete(napi);
889
890		TSI_WRITE(TSI108_EC_INTMASK,
891				     TSI_READ(TSI108_EC_INTMASK)
892				     & ~(TSI108_INT_RXQUEUE0
893					 | TSI108_INT_RXTHRESH |
894					 TSI108_INT_RXOVERRUN |
895					 TSI108_INT_RXERROR |
896					 TSI108_INT_RXWAIT));
897	} else {
898		data->rxpending = 1;
899	}
900
901	return num_received;
902}
903
904static void tsi108_rx_int(struct net_device *dev)
905{
906	struct tsi108_prv_data *data = netdev_priv(dev);
907
908	/* A race could cause dev to already be scheduled, so it's not an
909	 * error if that happens (and interrupts shouldn't be re-masked,
910	 * because that can cause harmful races, if poll has already
911	 * unmasked them but not cleared LINK_STATE_SCHED).
912	 *
913	 * This can happen if this code races with tsi108_poll(), which masks
914	 * the interrupts after tsi108_irq_one() read the mask, but before
915	 * napi_schedule is called.  It could also happen due to calls
916	 * from tsi108_check_rxring().
917	 */
918
919	if (napi_schedule_prep(&data->napi)) {
920		/* Mask, rather than ack, the receive interrupts.  The ack
921		 * will happen in tsi108_poll().
922		 */
923
924		TSI_WRITE(TSI108_EC_INTMASK,
925				     TSI_READ(TSI108_EC_INTMASK) |
926				     TSI108_INT_RXQUEUE0
927				     | TSI108_INT_RXTHRESH |
928				     TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
929				     TSI108_INT_RXWAIT);
930		__napi_schedule(&data->napi);
931	} else {
932		if (!netif_running(dev)) {
933			/* This can happen if an interrupt occurs while the
934			 * interface is being brought down, as the START
935			 * bit is cleared before the stop function is called.
936			 *
937			 * In this case, the interrupts must be masked, or
938			 * they will continue indefinitely.
939			 *
940			 * There's a race here if the interface is brought down
941			 * and then up in rapid succession, as the device could
942			 * be made running after the above check and before
943			 * the masking below.  This will only happen if the IRQ
944			 * thread has a lower priority than the task brining
945			 * up the interface.  Fixing this race would likely
946			 * require changes in generic code.
947			 */
948
949			TSI_WRITE(TSI108_EC_INTMASK,
950					     TSI_READ
951					     (TSI108_EC_INTMASK) |
952					     TSI108_INT_RXQUEUE0 |
953					     TSI108_INT_RXTHRESH |
954					     TSI108_INT_RXOVERRUN |
955					     TSI108_INT_RXERROR |
956					     TSI108_INT_RXWAIT);
957		}
958	}
959}
960
961/* If the RX ring has run out of memory, try periodically
962 * to allocate some more, as otherwise poll would never
963 * get called (apart from the initial end-of-queue condition).
964 *
965 * This is called once per second (by default) from the thread.
966 */
967
968static void tsi108_check_rxring(struct net_device *dev)
969{
970	struct tsi108_prv_data *data = netdev_priv(dev);
971
972	/* A poll is scheduled, as opposed to caling tsi108_refill_rx
973	 * directly, so as to keep the receive path single-threaded
974	 * (and thus not needing a lock).
975	 */
976
977	if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
978		tsi108_rx_int(dev);
979}
980
981static void tsi108_tx_int(struct net_device *dev)
982{
983	struct tsi108_prv_data *data = netdev_priv(dev);
984	u32 estat = TSI_READ(TSI108_EC_TXESTAT);
985
986	TSI_WRITE(TSI108_EC_TXESTAT, estat);
987	TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
988			     TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
989	if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
990		u32 err = TSI_READ(TSI108_EC_TXERR);
991		TSI_WRITE(TSI108_EC_TXERR, err);
992
993		if (err && net_ratelimit())
994			printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
995	}
996
997	if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
998		spin_lock(&data->txlock);
999		tsi108_complete_tx(dev);
1000		spin_unlock(&data->txlock);
1001	}
1002}
1003
1004
1005static irqreturn_t tsi108_irq(int irq, void *dev_id)
1006{
1007	struct net_device *dev = dev_id;
1008	struct tsi108_prv_data *data = netdev_priv(dev);
1009	u32 stat = TSI_READ(TSI108_EC_INTSTAT);
1010
1011	if (!(stat & TSI108_INT_ANY))
1012		return IRQ_NONE;	/* Not our interrupt */
1013
1014	stat &= ~TSI_READ(TSI108_EC_INTMASK);
1015
1016	if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
1017		    TSI108_INT_TXERROR))
1018		tsi108_tx_int(dev);
1019	if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1020		    TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1021		    TSI108_INT_RXERROR))
1022		tsi108_rx_int(dev);
1023
1024	if (stat & TSI108_INT_SFN) {
1025		if (net_ratelimit())
1026			printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1027		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1028	}
1029
1030	if (stat & TSI108_INT_STATCARRY) {
1031		tsi108_stat_carry(dev);
1032		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1033	}
1034
1035	return IRQ_HANDLED;
1036}
1037
1038static void tsi108_stop_ethernet(struct net_device *dev)
1039{
1040	struct tsi108_prv_data *data = netdev_priv(dev);
1041	int i = 1000;
1042	/* Disable all TX and RX queues ... */
1043	TSI_WRITE(TSI108_EC_TXCTRL, 0);
1044	TSI_WRITE(TSI108_EC_RXCTRL, 0);
1045
1046	/* ...and wait for them to become idle */
1047	while(i--) {
1048		if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1049			break;
1050		udelay(10);
1051	}
1052	i = 1000;
1053	while(i--){
1054		if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1055			return;
1056		udelay(10);
1057	}
1058	printk(KERN_ERR "%s function time out\n", __func__);
1059}
1060
1061static void tsi108_reset_ether(struct tsi108_prv_data * data)
1062{
1063	TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1064	udelay(100);
1065	TSI_WRITE(TSI108_MAC_CFG1, 0);
1066
1067	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1068	udelay(100);
1069	TSI_WRITE(TSI108_EC_PORTCTRL,
1070			     TSI_READ(TSI108_EC_PORTCTRL) &
1071			     ~TSI108_EC_PORTCTRL_STATRST);
1072
1073	TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1074	udelay(100);
1075	TSI_WRITE(TSI108_EC_TXCFG,
1076			     TSI_READ(TSI108_EC_TXCFG) &
1077			     ~TSI108_EC_TXCFG_RST);
1078
1079	TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1080	udelay(100);
1081	TSI_WRITE(TSI108_EC_RXCFG,
1082			     TSI_READ(TSI108_EC_RXCFG) &
1083			     ~TSI108_EC_RXCFG_RST);
1084
1085	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1086			     TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1087			     TSI108_MAC_MII_MGMT_RST);
1088	udelay(100);
1089	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1090			     (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1091			     ~(TSI108_MAC_MII_MGMT_RST |
1092			       TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1093}
1094
1095static int tsi108_get_mac(struct net_device *dev)
1096{
1097	struct tsi108_prv_data *data = netdev_priv(dev);
1098	u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1099	u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1100
1101	/* Note that the octets are reversed from what the manual says,
1102	 * producing an even weirder ordering...
1103	 */
1104	if (word2 == 0 && word1 == 0) {
1105		dev->dev_addr[0] = 0x00;
1106		dev->dev_addr[1] = 0x06;
1107		dev->dev_addr[2] = 0xd2;
1108		dev->dev_addr[3] = 0x00;
1109		dev->dev_addr[4] = 0x00;
1110		if (0x8 == data->phy)
1111			dev->dev_addr[5] = 0x01;
1112		else
1113			dev->dev_addr[5] = 0x02;
1114
1115		word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1116
1117		word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1118		    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1119
1120		TSI_WRITE(TSI108_MAC_ADDR1, word1);
1121		TSI_WRITE(TSI108_MAC_ADDR2, word2);
1122	} else {
1123		dev->dev_addr[0] = (word2 >> 16) & 0xff;
1124		dev->dev_addr[1] = (word2 >> 24) & 0xff;
1125		dev->dev_addr[2] = (word1 >> 0) & 0xff;
1126		dev->dev_addr[3] = (word1 >> 8) & 0xff;
1127		dev->dev_addr[4] = (word1 >> 16) & 0xff;
1128		dev->dev_addr[5] = (word1 >> 24) & 0xff;
1129	}
1130
1131	if (!is_valid_ether_addr(dev->dev_addr)) {
1132		printk(KERN_ERR
1133		       "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
1134		       dev->name, word1, word2);
1135		return -EINVAL;
1136	}
1137
1138	return 0;
1139}
1140
1141static int tsi108_set_mac(struct net_device *dev, void *addr)
1142{
1143	struct tsi108_prv_data *data = netdev_priv(dev);
1144	u32 word1, word2;
1145	int i;
1146
1147	if (!is_valid_ether_addr(addr))
1148		return -EADDRNOTAVAIL;
1149
1150	for (i = 0; i < 6; i++)
1151		/* +2 is for the offset of the HW addr type */
1152		dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1153
1154	word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1155
1156	word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1157	    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1158
1159	spin_lock_irq(&data->misclock);
1160	TSI_WRITE(TSI108_MAC_ADDR1, word1);
1161	TSI_WRITE(TSI108_MAC_ADDR2, word2);
1162	spin_lock(&data->txlock);
1163
1164	if (data->txfree && data->link_up)
1165		netif_wake_queue(dev);
1166
1167	spin_unlock(&data->txlock);
1168	spin_unlock_irq(&data->misclock);
1169	return 0;
1170}
1171
1172/* Protected by dev->xmit_lock. */
1173static void tsi108_set_rx_mode(struct net_device *dev)
1174{
1175	struct tsi108_prv_data *data = netdev_priv(dev);
1176	u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1177
1178	if (dev->flags & IFF_PROMISC) {
1179		rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1180		rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1181		goto out;
1182	}
1183
1184	rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1185
1186	if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
1187		int i;
1188		struct netdev_hw_addr *ha;
1189		rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1190
1191		memset(data->mc_hash, 0, sizeof(data->mc_hash));
1192
1193		netdev_for_each_mc_addr(ha, dev) {
1194			u32 hash, crc;
1195
1196			crc = ether_crc(6, ha->addr);
1197			hash = crc >> 23;
1198			__set_bit(hash, &data->mc_hash[0]);
1199		}
1200
1201		TSI_WRITE(TSI108_EC_HASHADDR,
1202				     TSI108_EC_HASHADDR_AUTOINC |
1203				     TSI108_EC_HASHADDR_MCAST);
1204
1205		for (i = 0; i < 16; i++) {
1206			/* The manual says that the hardware may drop
1207			 * back-to-back writes to the data register.
1208			 */
1209			udelay(1);
1210			TSI_WRITE(TSI108_EC_HASHDATA,
1211					     data->mc_hash[i]);
1212		}
1213	}
1214
1215      out:
1216	TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1217}
1218
1219static void tsi108_init_phy(struct net_device *dev)
1220{
1221	struct tsi108_prv_data *data = netdev_priv(dev);
1222	u32 i = 0;
1223	u16 phyval = 0;
1224	unsigned long flags;
1225
1226	spin_lock_irqsave(&phy_lock, flags);
1227
1228	tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1229	while (--i) {
1230		if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1231			break;
1232		udelay(10);
1233	}
1234	if (i == 0)
1235		printk(KERN_ERR "%s function time out\n", __func__);
1236
1237	if (data->phy_type == TSI108_PHY_BCM54XX) {
1238		tsi108_write_mii(data, 0x09, 0x0300);
1239		tsi108_write_mii(data, 0x10, 0x1020);
1240		tsi108_write_mii(data, 0x1c, 0x8c00);
1241	}
1242
1243	tsi108_write_mii(data,
1244			 MII_BMCR,
1245			 BMCR_ANENABLE | BMCR_ANRESTART);
1246	while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1247		cpu_relax();
1248
1249	/* Set G/MII mode and receive clock select in TBI control #2.  The
1250	 * second port won't work if this isn't done, even though we don't
1251	 * use TBI mode.
1252	 */
1253
1254	tsi108_write_tbi(data, 0x11, 0x30);
1255
1256	/* FIXME: It seems to take more than 2 back-to-back reads to the
1257	 * PHY_STAT register before the link up status bit is set.
1258	 */
1259
1260	data->link_up = 0;
1261
1262	while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1263		 BMSR_LSTATUS)) {
1264		if (i++ > (MII_READ_DELAY / 10)) {
1265			break;
1266		}
1267		spin_unlock_irqrestore(&phy_lock, flags);
1268		msleep(10);
1269		spin_lock_irqsave(&phy_lock, flags);
1270	}
1271
1272	data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
1273	printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1274	data->phy_ok = 1;
1275	data->init_media = 1;
1276	spin_unlock_irqrestore(&phy_lock, flags);
1277}
1278
1279static void tsi108_kill_phy(struct net_device *dev)
1280{
1281	struct tsi108_prv_data *data = netdev_priv(dev);
1282	unsigned long flags;
1283
1284	spin_lock_irqsave(&phy_lock, flags);
1285	tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1286	data->phy_ok = 0;
1287	spin_unlock_irqrestore(&phy_lock, flags);
1288}
1289
1290static int tsi108_open(struct net_device *dev)
1291{
1292	int i;
1293	struct tsi108_prv_data *data = netdev_priv(dev);
1294	unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1295	unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1296
1297	i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1298	if (i != 0) {
1299		printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1300		       data->id, data->irq_num);
1301		return i;
1302	} else {
1303		dev->irq = data->irq_num;
1304		printk(KERN_NOTICE
1305		       "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1306		       data->id, dev->irq, dev->name);
1307	}
1308
1309	data->rxring = dma_zalloc_coherent(NULL, rxring_size, &data->rxdma,
1310					   GFP_KERNEL);
1311	if (!data->rxring)
1312		return -ENOMEM;
1313
1314	data->txring = dma_zalloc_coherent(NULL, txring_size, &data->txdma,
1315					   GFP_KERNEL);
1316	if (!data->txring) {
1317		pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
1318		return -ENOMEM;
1319	}
1320
1321	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1322		data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1323		data->rxring[i].blen = TSI108_RXBUF_SIZE;
1324		data->rxring[i].vlan = 0;
1325	}
1326
1327	data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1328
1329	data->rxtail = 0;
1330	data->rxhead = 0;
1331
1332	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1333		struct sk_buff *skb;
1334
1335		skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
1336		if (!skb) {
1337			/* Bah.  No memory for now, but maybe we'll get
1338			 * some more later.
1339			 * For now, we'll live with the smaller ring.
1340			 */
1341			printk(KERN_WARNING
1342			       "%s: Could only allocate %d receive skb(s).\n",
1343			       dev->name, i);
1344			data->rxhead = i;
1345			break;
1346		}
1347
1348		data->rxskbs[i] = skb;
1349		data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1350		data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1351	}
1352
1353	data->rxfree = i;
1354	TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1355
1356	for (i = 0; i < TSI108_TXRING_LEN; i++) {
1357		data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1358		data->txring[i].misc = 0;
1359	}
1360
1361	data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1362	data->txtail = 0;
1363	data->txhead = 0;
1364	data->txfree = TSI108_TXRING_LEN;
1365	TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1366	tsi108_init_phy(dev);
1367
1368	napi_enable(&data->napi);
1369
1370	setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
1371	mod_timer(&data->timer, jiffies + 1);
1372
1373	tsi108_restart_rx(data, dev);
1374
1375	TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1376
1377	TSI_WRITE(TSI108_EC_INTMASK,
1378			     ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1379			       TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1380			       TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1381			       TSI108_INT_SFN | TSI108_INT_STATCARRY));
1382
1383	TSI_WRITE(TSI108_MAC_CFG1,
1384			     TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1385	netif_start_queue(dev);
1386	return 0;
1387}
1388
1389static int tsi108_close(struct net_device *dev)
1390{
1391	struct tsi108_prv_data *data = netdev_priv(dev);
1392
1393	netif_stop_queue(dev);
1394	napi_disable(&data->napi);
1395
1396	del_timer_sync(&data->timer);
1397
1398	tsi108_stop_ethernet(dev);
1399	tsi108_kill_phy(dev);
1400	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1401	TSI_WRITE(TSI108_MAC_CFG1, 0);
1402
1403	/* Check for any pending TX packets, and drop them. */
1404
1405	while (!data->txfree || data->txhead != data->txtail) {
1406		int tx = data->txtail;
1407		struct sk_buff *skb;
1408		skb = data->txskbs[tx];
1409		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1410		data->txfree++;
1411		dev_kfree_skb(skb);
1412	}
1413
1414	free_irq(data->irq_num, dev);
1415
1416	/* Discard the RX ring. */
1417
1418	while (data->rxfree) {
1419		int rx = data->rxtail;
1420		struct sk_buff *skb;
1421
1422		skb = data->rxskbs[rx];
1423		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1424		data->rxfree--;
1425		dev_kfree_skb(skb);
1426	}
1427
1428	dma_free_coherent(0,
1429			    TSI108_RXRING_LEN * sizeof(rx_desc),
1430			    data->rxring, data->rxdma);
1431	dma_free_coherent(0,
1432			    TSI108_TXRING_LEN * sizeof(tx_desc),
1433			    data->txring, data->txdma);
1434
1435	return 0;
1436}
1437
1438static void tsi108_init_mac(struct net_device *dev)
1439{
1440	struct tsi108_prv_data *data = netdev_priv(dev);
1441
1442	TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1443			     TSI108_MAC_CFG2_PADCRC);
1444
1445	TSI_WRITE(TSI108_EC_TXTHRESH,
1446			     (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1447			     (192 << TSI108_EC_TXTHRESH_STOPFILL));
1448
1449	TSI_WRITE(TSI108_STAT_CARRYMASK1,
1450			     ~(TSI108_STAT_CARRY1_RXBYTES |
1451			       TSI108_STAT_CARRY1_RXPKTS |
1452			       TSI108_STAT_CARRY1_RXFCS |
1453			       TSI108_STAT_CARRY1_RXMCAST |
1454			       TSI108_STAT_CARRY1_RXALIGN |
1455			       TSI108_STAT_CARRY1_RXLENGTH |
1456			       TSI108_STAT_CARRY1_RXRUNT |
1457			       TSI108_STAT_CARRY1_RXJUMBO |
1458			       TSI108_STAT_CARRY1_RXFRAG |
1459			       TSI108_STAT_CARRY1_RXJABBER |
1460			       TSI108_STAT_CARRY1_RXDROP));
1461
1462	TSI_WRITE(TSI108_STAT_CARRYMASK2,
1463			     ~(TSI108_STAT_CARRY2_TXBYTES |
1464			       TSI108_STAT_CARRY2_TXPKTS |
1465			       TSI108_STAT_CARRY2_TXEXDEF |
1466			       TSI108_STAT_CARRY2_TXEXCOL |
1467			       TSI108_STAT_CARRY2_TXTCOL |
1468			       TSI108_STAT_CARRY2_TXPAUSE));
1469
1470	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1471	TSI_WRITE(TSI108_MAC_CFG1, 0);
1472
1473	TSI_WRITE(TSI108_EC_RXCFG,
1474			     TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1475
1476	TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1477			     TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1478			     TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1479						TSI108_EC_TXQ_CFG_SFNPORT));
1480
1481	TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1482			     TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1483			     TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1484						TSI108_EC_RXQ_CFG_SFNPORT));
1485
1486	TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1487			     TSI108_EC_TXQ_BUFCFG_BURST256 |
1488			     TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1489						TSI108_EC_TXQ_BUFCFG_SFNPORT));
1490
1491	TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1492			     TSI108_EC_RXQ_BUFCFG_BURST256 |
1493			     TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1494						TSI108_EC_RXQ_BUFCFG_SFNPORT));
1495
1496	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1497}
1498
1499static int tsi108_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1500{
1501	struct tsi108_prv_data *data = netdev_priv(dev);
1502	unsigned long flags;
1503	int rc;
1504
1505	spin_lock_irqsave(&data->txlock, flags);
1506	rc = mii_ethtool_gset(&data->mii_if, cmd);
1507	spin_unlock_irqrestore(&data->txlock, flags);
1508
1509	return rc;
1510}
1511
1512static int tsi108_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1513{
1514	struct tsi108_prv_data *data = netdev_priv(dev);
1515	unsigned long flags;
1516	int rc;
1517
1518	spin_lock_irqsave(&data->txlock, flags);
1519	rc = mii_ethtool_sset(&data->mii_if, cmd);
1520	spin_unlock_irqrestore(&data->txlock, flags);
1521
1522	return rc;
1523}
1524
1525static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1526{
1527	struct tsi108_prv_data *data = netdev_priv(dev);
1528	if (!netif_running(dev))
1529		return -EINVAL;
1530	return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1531}
1532
1533static const struct ethtool_ops tsi108_ethtool_ops = {
1534	.get_link 	= ethtool_op_get_link,
1535	.get_settings	= tsi108_get_settings,
1536	.set_settings	= tsi108_set_settings,
1537};
1538
1539static const struct net_device_ops tsi108_netdev_ops = {
1540	.ndo_open		= tsi108_open,
1541	.ndo_stop		= tsi108_close,
1542	.ndo_start_xmit		= tsi108_send_packet,
1543	.ndo_set_rx_mode	= tsi108_set_rx_mode,
1544	.ndo_get_stats		= tsi108_get_stats,
1545	.ndo_do_ioctl		= tsi108_do_ioctl,
1546	.ndo_set_mac_address	= tsi108_set_mac,
1547	.ndo_validate_addr	= eth_validate_addr,
1548	.ndo_change_mtu		= eth_change_mtu,
1549};
1550
1551static int
1552tsi108_init_one(struct platform_device *pdev)
1553{
1554	struct net_device *dev = NULL;
1555	struct tsi108_prv_data *data = NULL;
1556	hw_info *einfo;
1557	int err = 0;
1558
1559	einfo = dev_get_platdata(&pdev->dev);
1560
1561	if (NULL == einfo) {
1562		printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1563		       pdev->id);
1564		return -ENODEV;
1565	}
1566
1567	/* Create an ethernet device instance */
1568
1569	dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1570	if (!dev)
1571		return -ENOMEM;
1572
1573	printk("tsi108_eth%d: probe...\n", pdev->id);
1574	data = netdev_priv(dev);
1575	data->dev = dev;
1576
1577	pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1578			pdev->id, einfo->regs, einfo->phyregs,
1579			einfo->phy, einfo->irq_num);
1580
1581	data->regs = ioremap(einfo->regs, 0x400);
1582	if (NULL == data->regs) {
1583		err = -ENOMEM;
1584		goto regs_fail;
1585	}
1586
1587	data->phyregs = ioremap(einfo->phyregs, 0x400);
1588	if (NULL == data->phyregs) {
1589		err = -ENOMEM;
1590		goto phyregs_fail;
1591	}
1592/* MII setup */
1593	data->mii_if.dev = dev;
1594	data->mii_if.mdio_read = tsi108_mdio_read;
1595	data->mii_if.mdio_write = tsi108_mdio_write;
1596	data->mii_if.phy_id = einfo->phy;
1597	data->mii_if.phy_id_mask = 0x1f;
1598	data->mii_if.reg_num_mask = 0x1f;
1599
1600	data->phy = einfo->phy;
1601	data->phy_type = einfo->phy_type;
1602	data->irq_num = einfo->irq_num;
1603	data->id = pdev->id;
1604	netif_napi_add(dev, &data->napi, tsi108_poll, 64);
1605	dev->netdev_ops = &tsi108_netdev_ops;
1606	dev->ethtool_ops = &tsi108_ethtool_ops;
1607
1608	/* Apparently, the Linux networking code won't use scatter-gather
1609	 * if the hardware doesn't do checksums.  However, it's faster
1610	 * to checksum in place and use SG, as (among other reasons)
1611	 * the cache won't be dirtied (which then has to be flushed
1612	 * before DMA).  The checksumming is done by the driver (via
1613	 * a new function skb_csum_dev() in net/core/skbuff.c).
1614	 */
1615
1616	dev->features = NETIF_F_HIGHDMA;
1617
1618	spin_lock_init(&data->txlock);
1619	spin_lock_init(&data->misclock);
1620
1621	tsi108_reset_ether(data);
1622	tsi108_kill_phy(dev);
1623
1624	if ((err = tsi108_get_mac(dev)) != 0) {
1625		printk(KERN_ERR "%s: Invalid MAC address.  Please correct.\n",
1626		       dev->name);
1627		goto register_fail;
1628	}
1629
1630	tsi108_init_mac(dev);
1631	err = register_netdev(dev);
1632	if (err) {
1633		printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1634				dev->name);
1635		goto register_fail;
1636	}
1637
1638	platform_set_drvdata(pdev, dev);
1639	printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
1640	       dev->name, dev->dev_addr);
1641#ifdef DEBUG
1642	data->msg_enable = DEBUG;
1643	dump_eth_one(dev);
1644#endif
1645
1646	return 0;
1647
1648register_fail:
1649	iounmap(data->phyregs);
1650
1651phyregs_fail:
1652	iounmap(data->regs);
1653
1654regs_fail:
1655	free_netdev(dev);
1656	return err;
1657}
1658
1659/* There's no way to either get interrupts from the PHY when
1660 * something changes, or to have the Tsi108 automatically communicate
1661 * with the PHY to reconfigure itself.
1662 *
1663 * Thus, we have to do it using a timer.
1664 */
1665
1666static void tsi108_timed_checker(unsigned long dev_ptr)
1667{
1668	struct net_device *dev = (struct net_device *)dev_ptr;
1669	struct tsi108_prv_data *data = netdev_priv(dev);
1670
1671	tsi108_check_phy(dev);
1672	tsi108_check_rxring(dev);
1673	mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1674}
1675
1676static int tsi108_ether_remove(struct platform_device *pdev)
1677{
1678	struct net_device *dev = platform_get_drvdata(pdev);
1679	struct tsi108_prv_data *priv = netdev_priv(dev);
1680
1681	unregister_netdev(dev);
1682	tsi108_stop_ethernet(dev);
1683	iounmap(priv->regs);
1684	iounmap(priv->phyregs);
1685	free_netdev(dev);
1686
1687	return 0;
1688}
1689module_platform_driver(tsi_eth_driver);
1690
1691MODULE_AUTHOR("Tundra Semiconductor Corporation");
1692MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1693MODULE_LICENSE("GPL");
1694MODULE_ALIAS("platform:tsi-ethernet");
1695