1#include <linux/sh_intc.h> 2#include <linux/irq.h> 3#include <linux/irqdomain.h> 4#include <linux/list.h> 5#include <linux/kernel.h> 6#include <linux/types.h> 7#include <linux/radix-tree.h> 8#include <linux/device.h> 9 10#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \ 11 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \ 12 ((addr_e) << 16) | ((addr_d << 24))) 13 14#define _INTC_SHIFT(h) (h & 0x1f) 15#define _INTC_WIDTH(h) ((h >> 5) & 0xf) 16#define _INTC_FN(h) ((h >> 9) & 0xf) 17#define _INTC_MODE(h) ((h >> 13) & 0x7) 18#define _INTC_ADDR_E(h) ((h >> 16) & 0xff) 19#define _INTC_ADDR_D(h) ((h >> 24) & 0xff) 20 21#ifdef CONFIG_SMP 22#define IS_SMP(x) (x.smp) 23#define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c)) 24#define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1) 25#else 26#define IS_SMP(x) 0 27#define INTC_REG(d, x, c) (d->reg[(x)]) 28#define SMP_NR(d, x) 1 29#endif 30 31struct intc_handle_int { 32 unsigned int irq; 33 unsigned long handle; 34}; 35 36struct intc_window { 37 phys_addr_t phys; 38 void __iomem *virt; 39 unsigned long size; 40}; 41 42struct intc_map_entry { 43 intc_enum enum_id; 44 struct intc_desc_int *desc; 45}; 46 47struct intc_subgroup_entry { 48 unsigned int pirq; 49 intc_enum enum_id; 50 unsigned long handle; 51}; 52 53struct intc_desc_int { 54 struct list_head list; 55 struct device dev; 56 struct radix_tree_root tree; 57 raw_spinlock_t lock; 58 unsigned int index; 59 unsigned long *reg; 60#ifdef CONFIG_SMP 61 unsigned long *smp; 62#endif 63 unsigned int nr_reg; 64 struct intc_handle_int *prio; 65 unsigned int nr_prio; 66 struct intc_handle_int *sense; 67 unsigned int nr_sense; 68 struct intc_window *window; 69 unsigned int nr_windows; 70 struct irq_domain *domain; 71 struct irq_chip chip; 72 bool skip_suspend; 73}; 74 75 76enum { 77 REG_FN_ERR = 0, 78 REG_FN_TEST_BASE = 1, 79 REG_FN_WRITE_BASE = 5, 80 REG_FN_MODIFY_BASE = 9 81}; 82 83enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */ 84 MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */ 85 MODE_DUAL_REG, /* Two registers, set bit to enable / disable */ 86 MODE_PRIO_REG, /* Priority value written to enable interrupt */ 87 MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */ 88}; 89 90static inline struct intc_desc_int *get_intc_desc(unsigned int irq) 91{ 92 struct irq_chip *chip = irq_get_chip(irq); 93 94 return container_of(chip, struct intc_desc_int, chip); 95} 96 97/* 98 * Grumble. 99 */ 100static inline void activate_irq(int irq) 101{ 102#ifdef CONFIG_ARM 103 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it 104 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE. 105 */ 106 set_irq_flags(irq, IRQF_VALID); 107#else 108 /* same effect on other architectures */ 109 irq_set_noprobe(irq); 110#endif 111} 112 113static inline int intc_handle_int_cmp(const void *a, const void *b) 114{ 115 const struct intc_handle_int *_a = a; 116 const struct intc_handle_int *_b = b; 117 118 return _a->irq - _b->irq; 119} 120 121/* access.c */ 122extern unsigned long 123(*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data); 124 125extern unsigned long 126(*intc_enable_fns[])(unsigned long addr, unsigned long handle, 127 unsigned long (*fn)(unsigned long, 128 unsigned long, unsigned long), 129 unsigned int irq); 130extern unsigned long 131(*intc_disable_fns[])(unsigned long addr, unsigned long handle, 132 unsigned long (*fn)(unsigned long, 133 unsigned long, unsigned long), 134 unsigned int irq); 135extern unsigned long 136(*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle, 137 unsigned long (*fn)(unsigned long, 138 unsigned long, unsigned long), 139 unsigned int irq); 140 141unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address); 142unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address); 143unsigned int intc_set_field_from_handle(unsigned int value, 144 unsigned int field_value, 145 unsigned int handle); 146unsigned long intc_get_field_from_handle(unsigned int value, 147 unsigned int handle); 148 149/* balancing.c */ 150#ifdef CONFIG_INTC_BALANCING 151void intc_balancing_enable(unsigned int irq); 152void intc_balancing_disable(unsigned int irq); 153void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc, 154 struct intc_desc_int *d, intc_enum id); 155#else 156static inline void intc_balancing_enable(unsigned int irq) { } 157static inline void intc_balancing_disable(unsigned int irq) { } 158static inline void 159intc_set_dist_handle(unsigned int irq, struct intc_desc *desc, 160 struct intc_desc_int *d, intc_enum id) { } 161#endif 162 163/* chip.c */ 164extern struct irq_chip intc_irq_chip; 165void _intc_enable(struct irq_data *data, unsigned long handle); 166 167/* core.c */ 168extern struct list_head intc_list; 169extern raw_spinlock_t intc_big_lock; 170extern struct bus_type intc_subsys; 171 172unsigned int intc_get_dfl_prio_level(void); 173unsigned int intc_get_prio_level(unsigned int irq); 174void intc_set_prio_level(unsigned int irq, unsigned int level); 175 176/* handle.c */ 177unsigned int intc_get_mask_handle(struct intc_desc *desc, 178 struct intc_desc_int *d, 179 intc_enum enum_id, int do_grps); 180unsigned int intc_get_prio_handle(struct intc_desc *desc, 181 struct intc_desc_int *d, 182 intc_enum enum_id, int do_grps); 183unsigned int intc_get_sense_handle(struct intc_desc *desc, 184 struct intc_desc_int *d, 185 intc_enum enum_id); 186void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc, 187 struct intc_desc_int *d, intc_enum id); 188unsigned long intc_get_ack_handle(unsigned int irq); 189void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d, 190 intc_enum enum_id, int enable); 191 192/* irqdomain.c */ 193void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw); 194 195/* virq.c */ 196void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d); 197void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d); 198struct intc_map_entry *intc_irq_xlate_get(unsigned int irq); 199