1/*
2 * Copyright (c) 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
18 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
19 */
20
21#ifndef __DMAR_H__
22#define __DMAR_H__
23
24#include <linux/acpi.h>
25#include <linux/types.h>
26#include <linux/msi.h>
27#include <linux/irqreturn.h>
28#include <linux/rwsem.h>
29#include <linux/rcupdate.h>
30
31struct acpi_dmar_header;
32
33#ifdef	CONFIG_X86
34# define	DMAR_UNITS_SUPPORTED	MAX_IO_APICS
35#else
36# define	DMAR_UNITS_SUPPORTED	64
37#endif
38
39/* DMAR Flags */
40#define DMAR_INTR_REMAP		0x1
41#define DMAR_X2APIC_OPT_OUT	0x2
42
43struct intel_iommu;
44
45struct dmar_dev_scope {
46	struct device __rcu *dev;
47	u8 bus;
48	u8 devfn;
49};
50
51#ifdef CONFIG_DMAR_TABLE
52extern struct acpi_table_header *dmar_tbl;
53struct dmar_drhd_unit {
54	struct list_head list;		/* list of drhd units	*/
55	struct  acpi_dmar_header *hdr;	/* ACPI header		*/
56	u64	reg_base_addr;		/* register base address*/
57	struct	dmar_dev_scope *devices;/* target device array	*/
58	int	devices_cnt;		/* target device count	*/
59	u16	segment;		/* PCI domain		*/
60	u8	ignored:1; 		/* ignore drhd		*/
61	u8	include_all:1;
62	struct intel_iommu *iommu;
63};
64
65struct dmar_pci_path {
66	u8 bus;
67	u8 device;
68	u8 function;
69};
70
71struct dmar_pci_notify_info {
72	struct pci_dev			*dev;
73	unsigned long			event;
74	int				bus;
75	u16				seg;
76	u16				level;
77	struct dmar_pci_path		path[];
78}  __attribute__((packed));
79
80extern struct rw_semaphore dmar_global_lock;
81extern struct list_head dmar_drhd_units;
82
83#define for_each_drhd_unit(drhd) \
84	list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)
85
86#define for_each_active_drhd_unit(drhd)					\
87	list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)		\
88		if (drhd->ignored) {} else
89
90#define for_each_active_iommu(i, drhd)					\
91	list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)		\
92		if (i=drhd->iommu, drhd->ignored) {} else
93
94#define for_each_iommu(i, drhd)						\
95	list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)		\
96		if (i=drhd->iommu, 0) {} else
97
98static inline bool dmar_rcu_check(void)
99{
100	return rwsem_is_locked(&dmar_global_lock) ||
101	       system_state == SYSTEM_BOOTING;
102}
103
104#define	dmar_rcu_dereference(p)	rcu_dereference_check((p), dmar_rcu_check())
105
106#define	for_each_dev_scope(a, c, p, d)	\
107	for ((p) = 0; ((d) = (p) < (c) ? dmar_rcu_dereference((a)[(p)].dev) : \
108			NULL, (p) < (c)); (p)++)
109
110#define	for_each_active_dev_scope(a, c, p, d)	\
111	for_each_dev_scope((a), (c), (p), (d))	if (!(d)) { continue; } else
112
113extern int dmar_table_init(void);
114extern int dmar_dev_scope_init(void);
115extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
116				struct dmar_dev_scope **devices, u16 segment);
117extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
118extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt);
119extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
120				 void *start, void*end, u16 segment,
121				 struct dmar_dev_scope *devices,
122				 int devices_cnt);
123extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
124				 u16 segment, struct dmar_dev_scope *devices,
125				 int count);
126/* Intel IOMMU detection */
127extern int detect_intel_iommu(void);
128extern int enable_drhd_fault_handling(void);
129extern int dmar_device_add(acpi_handle handle);
130extern int dmar_device_remove(acpi_handle handle);
131
132static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg)
133{
134	return 0;
135}
136
137#ifdef CONFIG_INTEL_IOMMU
138extern int iommu_detected, no_iommu;
139extern int intel_iommu_init(void);
140extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg);
141extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg);
142extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg);
143extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg);
144extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
145extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
146#else /* !CONFIG_INTEL_IOMMU: */
147static inline int intel_iommu_init(void) { return -ENODEV; }
148
149#define	dmar_parse_one_rmrr		dmar_res_noop
150#define	dmar_parse_one_atsr		dmar_res_noop
151#define	dmar_check_one_atsr		dmar_res_noop
152#define	dmar_release_one_atsr		dmar_res_noop
153
154static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
155{
156	return 0;
157}
158
159static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
160{
161	return 0;
162}
163#endif /* CONFIG_INTEL_IOMMU */
164
165#ifdef CONFIG_IRQ_REMAP
166extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
167#else  /* CONFIG_IRQ_REMAP */
168static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
169{ return 0; }
170#endif /* CONFIG_IRQ_REMAP */
171
172#else /* CONFIG_DMAR_TABLE */
173
174static inline int dmar_device_add(void *handle)
175{
176	return 0;
177}
178
179static inline int dmar_device_remove(void *handle)
180{
181	return 0;
182}
183
184#endif /* CONFIG_DMAR_TABLE */
185
186struct irte {
187	union {
188		struct {
189			__u64	present 	: 1,
190				fpd		: 1,
191				dst_mode	: 1,
192				redir_hint	: 1,
193				trigger_mode	: 1,
194				dlvry_mode	: 3,
195				avail		: 4,
196				__reserved_1	: 4,
197				vector		: 8,
198				__reserved_2	: 8,
199				dest_id		: 32;
200		};
201		__u64 low;
202	};
203
204	union {
205		struct {
206			__u64	sid		: 16,
207				sq		: 2,
208				svt		: 2,
209				__reserved_3	: 44;
210		};
211		__u64 high;
212	};
213};
214
215enum {
216	IRQ_REMAP_XAPIC_MODE,
217	IRQ_REMAP_X2APIC_MODE,
218};
219
220/* Can't use the common MSI interrupt functions
221 * since DMAR is not a pci device
222 */
223struct irq_data;
224extern void dmar_msi_unmask(struct irq_data *data);
225extern void dmar_msi_mask(struct irq_data *data);
226extern void dmar_msi_read(int irq, struct msi_msg *msg);
227extern void dmar_msi_write(int irq, struct msi_msg *msg);
228extern int dmar_set_interrupt(struct intel_iommu *iommu);
229extern irqreturn_t dmar_fault(int irq, void *dev_id);
230extern int arch_setup_dmar_msi(unsigned int irq);
231
232#endif /* __DMAR_H__ */
233