1#ifndef __MACH_MXC_SDMA_H__
2#define __MACH_MXC_SDMA_H__
3
4/**
5 * struct sdma_script_start_addrs - SDMA script start pointers
6 *
7 * start addresses of the different functions in the physical
8 * address space of the SDMA engine.
9 */
10struct sdma_script_start_addrs {
11	s32 ap_2_ap_addr;
12	s32 ap_2_bp_addr;
13	s32 ap_2_ap_fixed_addr;
14	s32 bp_2_ap_addr;
15	s32 loopback_on_dsp_side_addr;
16	s32 mcu_interrupt_only_addr;
17	s32 firi_2_per_addr;
18	s32 firi_2_mcu_addr;
19	s32 per_2_firi_addr;
20	s32 mcu_2_firi_addr;
21	s32 uart_2_per_addr;
22	s32 uart_2_mcu_addr;
23	s32 per_2_app_addr;
24	s32 mcu_2_app_addr;
25	s32 per_2_per_addr;
26	s32 uartsh_2_per_addr;
27	s32 uartsh_2_mcu_addr;
28	s32 per_2_shp_addr;
29	s32 mcu_2_shp_addr;
30	s32 ata_2_mcu_addr;
31	s32 mcu_2_ata_addr;
32	s32 app_2_per_addr;
33	s32 app_2_mcu_addr;
34	s32 shp_2_per_addr;
35	s32 shp_2_mcu_addr;
36	s32 mshc_2_mcu_addr;
37	s32 mcu_2_mshc_addr;
38	s32 spdif_2_mcu_addr;
39	s32 mcu_2_spdif_addr;
40	s32 asrc_2_mcu_addr;
41	s32 ext_mem_2_ipu_addr;
42	s32 descrambler_addr;
43	s32 dptc_dvfs_addr;
44	s32 utra_addr;
45	s32 ram_code_start_addr;
46	/* End of v1 array */
47	s32 mcu_2_ssish_addr;
48	s32 ssish_2_mcu_addr;
49	s32 hdmi_dma_addr;
50	/* End of v2 array */
51	s32 zcanfd_2_mcu_addr;
52	s32 zqspi_2_mcu_addr;
53	/* End of v3 array */
54};
55
56/**
57 * struct sdma_platform_data - platform specific data for SDMA engine
58 *
59 * @fw_name		The firmware name
60 * @script_addrs	SDMA scripts addresses in SDMA ROM
61 */
62struct sdma_platform_data {
63	char *fw_name;
64	struct sdma_script_start_addrs *script_addrs;
65};
66
67#endif /* __MACH_MXC_SDMA_H__ */
68