1/*
2 * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef __SOC_TEGRA_FUSE_H__
18#define __SOC_TEGRA_FUSE_H__
19
20#define TEGRA20		0x20
21#define TEGRA30		0x30
22#define TEGRA114	0x35
23#define TEGRA124	0x40
24#define TEGRA132	0x13
25
26#define TEGRA_FUSE_SKU_CALIB_0	0xf0
27#define TEGRA30_FUSE_SATA_CALIB	0x124
28
29#ifndef __ASSEMBLY__
30
31u32 tegra_read_chipid(void);
32u8 tegra_get_chip_id(void);
33
34enum tegra_revision {
35	TEGRA_REVISION_UNKNOWN = 0,
36	TEGRA_REVISION_A01,
37	TEGRA_REVISION_A02,
38	TEGRA_REVISION_A03,
39	TEGRA_REVISION_A03p,
40	TEGRA_REVISION_A04,
41	TEGRA_REVISION_MAX,
42};
43
44struct tegra_sku_info {
45	int sku_id;
46	int cpu_process_id;
47	int cpu_speedo_id;
48	int cpu_speedo_value;
49	int cpu_iddq_value;
50	int core_process_id;
51	int soc_speedo_id;
52	int gpu_speedo_id;
53	int gpu_process_id;
54	int gpu_speedo_value;
55	enum tegra_revision revision;
56};
57
58u32 tegra_read_straps(void);
59u32 tegra_read_chipid(void);
60int tegra_fuse_readl(unsigned long offset, u32 *value);
61
62extern struct tegra_sku_info tegra_sku_info;
63
64#endif /* __ASSEMBLY__ */
65
66#endif /* __SOC_TEGRA_FUSE_H__ */
67