1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef KFD_IOCTL_H_INCLUDED
24#define KFD_IOCTL_H_INCLUDED
25
26#include <linux/types.h>
27#include <linux/ioctl.h>
28
29#define KFD_IOCTL_MAJOR_VERSION 1
30#define KFD_IOCTL_MINOR_VERSION 0
31
32struct kfd_ioctl_get_version_args {
33	uint32_t major_version;	/* from KFD */
34	uint32_t minor_version;	/* from KFD */
35};
36
37/* For kfd_ioctl_create_queue_args.queue_type. */
38#define KFD_IOC_QUEUE_TYPE_COMPUTE	0
39#define KFD_IOC_QUEUE_TYPE_SDMA		1
40#define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL	2
41
42#define KFD_MAX_QUEUE_PERCENTAGE	100
43#define KFD_MAX_QUEUE_PRIORITY		15
44
45struct kfd_ioctl_create_queue_args {
46	uint64_t ring_base_address;	/* to KFD */
47	uint64_t write_pointer_address;	/* from KFD */
48	uint64_t read_pointer_address;	/* from KFD */
49	uint64_t doorbell_offset;	/* from KFD */
50
51	uint32_t ring_size;		/* to KFD */
52	uint32_t gpu_id;		/* to KFD */
53	uint32_t queue_type;		/* to KFD */
54	uint32_t queue_percentage;	/* to KFD */
55	uint32_t queue_priority;	/* to KFD */
56	uint32_t queue_id;		/* from KFD */
57
58	uint64_t eop_buffer_address;	/* to KFD */
59	uint64_t eop_buffer_size;	/* to KFD */
60	uint64_t ctx_save_restore_address; /* to KFD */
61	uint64_t ctx_save_restore_size;	/* to KFD */
62};
63
64struct kfd_ioctl_destroy_queue_args {
65	uint32_t queue_id;		/* to KFD */
66	uint32_t pad;
67};
68
69struct kfd_ioctl_update_queue_args {
70	uint64_t ring_base_address;	/* to KFD */
71
72	uint32_t queue_id;		/* to KFD */
73	uint32_t ring_size;		/* to KFD */
74	uint32_t queue_percentage;	/* to KFD */
75	uint32_t queue_priority;	/* to KFD */
76};
77
78/* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */
79#define KFD_IOC_CACHE_POLICY_COHERENT 0
80#define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
81
82struct kfd_ioctl_set_memory_policy_args {
83	uint64_t alternate_aperture_base;	/* to KFD */
84	uint64_t alternate_aperture_size;	/* to KFD */
85
86	uint32_t gpu_id;			/* to KFD */
87	uint32_t default_policy;		/* to KFD */
88	uint32_t alternate_policy;		/* to KFD */
89	uint32_t pad;
90};
91
92/*
93 * All counters are monotonic. They are used for profiling of compute jobs.
94 * The profiling is done by userspace.
95 *
96 * In case of GPU reset, the counter should not be affected.
97 */
98
99struct kfd_ioctl_get_clock_counters_args {
100	uint64_t gpu_clock_counter;	/* from KFD */
101	uint64_t cpu_clock_counter;	/* from KFD */
102	uint64_t system_clock_counter;	/* from KFD */
103	uint64_t system_clock_freq;	/* from KFD */
104
105	uint32_t gpu_id;		/* to KFD */
106	uint32_t pad;
107};
108
109#define NUM_OF_SUPPORTED_GPUS 7
110
111struct kfd_process_device_apertures {
112	uint64_t lds_base;		/* from KFD */
113	uint64_t lds_limit;		/* from KFD */
114	uint64_t scratch_base;		/* from KFD */
115	uint64_t scratch_limit;		/* from KFD */
116	uint64_t gpuvm_base;		/* from KFD */
117	uint64_t gpuvm_limit;		/* from KFD */
118	uint32_t gpu_id;		/* from KFD */
119	uint32_t pad;
120};
121
122struct kfd_ioctl_get_process_apertures_args {
123	struct kfd_process_device_apertures
124			process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */
125
126	/* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
127	uint32_t num_of_nodes;
128	uint32_t pad;
129};
130
131#define AMDKFD_IOCTL_BASE 'K'
132#define AMDKFD_IO(nr)			_IO(AMDKFD_IOCTL_BASE, nr)
133#define AMDKFD_IOR(nr, type)		_IOR(AMDKFD_IOCTL_BASE, nr, type)
134#define AMDKFD_IOW(nr, type)		_IOW(AMDKFD_IOCTL_BASE, nr, type)
135#define AMDKFD_IOWR(nr, type)		_IOWR(AMDKFD_IOCTL_BASE, nr, type)
136
137#define AMDKFD_IOC_GET_VERSION			\
138		AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
139
140#define AMDKFD_IOC_CREATE_QUEUE			\
141		AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
142
143#define AMDKFD_IOC_DESTROY_QUEUE		\
144		AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
145
146#define AMDKFD_IOC_SET_MEMORY_POLICY		\
147		AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
148
149#define AMDKFD_IOC_GET_CLOCK_COUNTERS		\
150		AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
151
152#define AMDKFD_IOC_GET_PROCESS_APERTURES	\
153		AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
154
155#define AMDKFD_IOC_UPDATE_QUEUE			\
156		AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
157
158#define AMDKFD_COMMAND_START		0x01
159#define AMDKFD_COMMAND_END		0x08
160
161#endif
162