1/*
2    ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
3    Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
4
5    This program is free software; you can redistribute it and/or modify
6    it under the terms of the GNU General Public License as published by
7    the Free Software Foundation; either version 2 of the License, or
8    (at your option) any later version.
9
10    This program is distributed in the hope that it will be useful,
11    but WITHOUT ANY WARRANTY; without even the implied warranty of
12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13    GNU General Public License for more details.
14
15    You should have received a copy of the GNU General Public License
16    along with this program; if not, write to the Free Software
17    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
18*/
19
20#include <linux/delay.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/slab.h>
24#include <linux/ioport.h>
25#include <linux/io.h>
26#include <sound/core.h>
27#include <sound/tlv.h>
28#include <sound/ad1816a.h>
29
30#include <asm/dma.h>
31
32static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
33{
34	int timeout;
35
36	for (timeout = 1000; timeout-- > 0; udelay(10))
37		if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
38			return 0;
39
40	snd_printk(KERN_WARNING "chip busy.\n");
41	return -EBUSY;
42}
43
44static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
45{
46	snd_ad1816a_busy_wait(chip);
47	return inb(AD1816A_REG(reg));
48}
49
50static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
51			    unsigned char value)
52{
53	snd_ad1816a_busy_wait(chip);
54	outb(value, AD1816A_REG(reg));
55}
56
57static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
58				 unsigned char mask, unsigned char value)
59{
60	snd_ad1816a_out(chip, reg,
61		(value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
62}
63
64static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
65{
66	snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
67	return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
68		(snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
69}
70
71static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
72			      unsigned short value)
73{
74	snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
75	snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
76	snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
77}
78
79static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
80				   unsigned short mask, unsigned short value)
81{
82	snd_ad1816a_write(chip, reg,
83		(value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
84}
85
86
87static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
88					    unsigned int format, int channels)
89{
90	unsigned char retval = AD1816A_FMT_LINEAR_8;
91
92	switch (format) {
93	case SNDRV_PCM_FORMAT_MU_LAW:
94		retval = AD1816A_FMT_ULAW_8;
95		break;
96	case SNDRV_PCM_FORMAT_A_LAW:
97		retval = AD1816A_FMT_ALAW_8;
98		break;
99	case SNDRV_PCM_FORMAT_S16_LE:
100		retval = AD1816A_FMT_LINEAR_16_LIT;
101		break;
102	case SNDRV_PCM_FORMAT_S16_BE:
103		retval = AD1816A_FMT_LINEAR_16_BIG;
104	}
105	return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
106}
107
108static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
109{
110	unsigned long flags;
111
112	spin_lock_irqsave(&chip->lock, flags);
113
114	if (chip->mode & mode) {
115		spin_unlock_irqrestore(&chip->lock, flags);
116		return -EAGAIN;
117	}
118
119	switch ((mode &= AD1816A_MODE_OPEN)) {
120	case AD1816A_MODE_PLAYBACK:
121		snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
122			AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
123		snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
124			AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
125		break;
126	case AD1816A_MODE_CAPTURE:
127		snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
128			AD1816A_CAPTURE_IRQ_PENDING, 0x00);
129		snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
130			AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
131		break;
132	case AD1816A_MODE_TIMER:
133		snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
134			AD1816A_TIMER_IRQ_PENDING, 0x00);
135		snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
136			AD1816A_TIMER_IRQ_ENABLE, 0xffff);
137	}
138	chip->mode |= mode;
139
140	spin_unlock_irqrestore(&chip->lock, flags);
141	return 0;
142}
143
144static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
145{
146	unsigned long flags;
147
148	spin_lock_irqsave(&chip->lock, flags);
149
150	switch ((mode &= AD1816A_MODE_OPEN)) {
151	case AD1816A_MODE_PLAYBACK:
152		snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
153			AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
154		snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
155			AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
156		break;
157	case AD1816A_MODE_CAPTURE:
158		snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
159			AD1816A_CAPTURE_IRQ_PENDING, 0x00);
160		snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
161			AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
162		break;
163	case AD1816A_MODE_TIMER:
164		snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
165			AD1816A_TIMER_IRQ_PENDING, 0x00);
166		snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
167			AD1816A_TIMER_IRQ_ENABLE, 0x0000);
168	}
169	if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN))
170		chip->mode = 0;
171
172	spin_unlock_irqrestore(&chip->lock, flags);
173}
174
175
176static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
177			       int channel, int cmd, int iscapture)
178{
179	int error = 0;
180
181	switch (cmd) {
182	case SNDRV_PCM_TRIGGER_START:
183	case SNDRV_PCM_TRIGGER_STOP:
184		spin_lock(&chip->lock);
185		cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
186		/* if (what & AD1816A_PLAYBACK_ENABLE) */
187		/* That is not valid, because playback and capture enable
188		 * are the same bit pattern, just to different addresses
189		 */
190		if (! iscapture)
191			snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
192				AD1816A_PLAYBACK_ENABLE, cmd);
193		else
194			snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
195				AD1816A_CAPTURE_ENABLE, cmd);
196		spin_unlock(&chip->lock);
197		break;
198	default:
199		snd_printk(KERN_WARNING "invalid trigger mode 0x%x.\n", what);
200		error = -EINVAL;
201	}
202
203	return error;
204}
205
206static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
207{
208	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
209	return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
210				   SNDRV_PCM_STREAM_PLAYBACK, cmd, 0);
211}
212
213static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
214{
215	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
216	return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
217				   SNDRV_PCM_STREAM_CAPTURE, cmd, 1);
218}
219
220static int snd_ad1816a_hw_params(struct snd_pcm_substream *substream,
221				 struct snd_pcm_hw_params *hw_params)
222{
223	return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
224}
225
226static int snd_ad1816a_hw_free(struct snd_pcm_substream *substream)
227{
228	return snd_pcm_lib_free_pages(substream);
229}
230
231static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
232{
233	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
234	unsigned long flags;
235	struct snd_pcm_runtime *runtime = substream->runtime;
236	unsigned int size, rate;
237
238	spin_lock_irqsave(&chip->lock, flags);
239
240	chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
241	snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
242		AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
243
244	snd_dma_program(chip->dma1, runtime->dma_addr, size,
245			DMA_MODE_WRITE | DMA_AUTOINIT);
246
247	rate = runtime->rate;
248	if (chip->clock_freq)
249		rate = (rate * 33000) / chip->clock_freq;
250	snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
251	snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
252		AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
253		snd_ad1816a_get_format(chip, runtime->format,
254			runtime->channels));
255
256	snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
257		snd_pcm_lib_period_bytes(substream) / 4 - 1);
258
259	spin_unlock_irqrestore(&chip->lock, flags);
260	return 0;
261}
262
263static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
264{
265	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
266	unsigned long flags;
267	struct snd_pcm_runtime *runtime = substream->runtime;
268	unsigned int size, rate;
269
270	spin_lock_irqsave(&chip->lock, flags);
271
272	chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
273	snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
274		AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
275
276	snd_dma_program(chip->dma2, runtime->dma_addr, size,
277			DMA_MODE_READ | DMA_AUTOINIT);
278
279	rate = runtime->rate;
280	if (chip->clock_freq)
281		rate = (rate * 33000) / chip->clock_freq;
282	snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
283	snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
284		AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
285		snd_ad1816a_get_format(chip, runtime->format,
286			runtime->channels));
287
288	snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
289		snd_pcm_lib_period_bytes(substream) / 4 - 1);
290
291	spin_unlock_irqrestore(&chip->lock, flags);
292	return 0;
293}
294
295
296static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
297{
298	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
299	size_t ptr;
300	if (!(chip->mode & AD1816A_MODE_PLAYBACK))
301		return 0;
302	ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
303	return bytes_to_frames(substream->runtime, ptr);
304}
305
306static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
307{
308	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
309	size_t ptr;
310	if (!(chip->mode & AD1816A_MODE_CAPTURE))
311		return 0;
312	ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
313	return bytes_to_frames(substream->runtime, ptr);
314}
315
316
317static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id)
318{
319	struct snd_ad1816a *chip = dev_id;
320	unsigned char status;
321
322	spin_lock(&chip->lock);
323	status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
324	spin_unlock(&chip->lock);
325
326	if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
327		snd_pcm_period_elapsed(chip->playback_substream);
328
329	if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
330		snd_pcm_period_elapsed(chip->capture_substream);
331
332	if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
333		snd_timer_interrupt(chip->timer, chip->timer->sticks);
334
335	spin_lock(&chip->lock);
336	snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
337	spin_unlock(&chip->lock);
338	return IRQ_HANDLED;
339}
340
341
342static struct snd_pcm_hardware snd_ad1816a_playback = {
343	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
344				 SNDRV_PCM_INFO_MMAP_VALID),
345	.formats =		(SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
346				 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
347				 SNDRV_PCM_FMTBIT_S16_BE),
348	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
349	.rate_min =		4000,
350	.rate_max =		55200,
351	.channels_min =		1,
352	.channels_max =		2,
353	.buffer_bytes_max =	(128*1024),
354	.period_bytes_min =	64,
355	.period_bytes_max =	(128*1024),
356	.periods_min =		1,
357	.periods_max =		1024,
358	.fifo_size =		0,
359};
360
361static struct snd_pcm_hardware snd_ad1816a_capture = {
362	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
363				 SNDRV_PCM_INFO_MMAP_VALID),
364	.formats =		(SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
365				 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
366				 SNDRV_PCM_FMTBIT_S16_BE),
367	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
368	.rate_min =		4000,
369	.rate_max =		55200,
370	.channels_min =		1,
371	.channels_max =		2,
372	.buffer_bytes_max =	(128*1024),
373	.period_bytes_min =	64,
374	.period_bytes_max =	(128*1024),
375	.periods_min =		1,
376	.periods_max =		1024,
377	.fifo_size =		0,
378};
379
380static int snd_ad1816a_timer_close(struct snd_timer *timer)
381{
382	struct snd_ad1816a *chip = snd_timer_chip(timer);
383	snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
384	return 0;
385}
386
387static int snd_ad1816a_timer_open(struct snd_timer *timer)
388{
389	struct snd_ad1816a *chip = snd_timer_chip(timer);
390	snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
391	return 0;
392}
393
394static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
395{
396	if (snd_BUG_ON(!timer))
397		return 0;
398
399	return 10000;
400}
401
402static int snd_ad1816a_timer_start(struct snd_timer *timer)
403{
404	unsigned short bits;
405	unsigned long flags;
406	struct snd_ad1816a *chip = snd_timer_chip(timer);
407	spin_lock_irqsave(&chip->lock, flags);
408	bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
409
410	if (!(bits & AD1816A_TIMER_ENABLE)) {
411		snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
412			timer->sticks & 0xffff);
413
414		snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
415			AD1816A_TIMER_ENABLE, 0xffff);
416	}
417	spin_unlock_irqrestore(&chip->lock, flags);
418	return 0;
419}
420
421static int snd_ad1816a_timer_stop(struct snd_timer *timer)
422{
423	unsigned long flags;
424	struct snd_ad1816a *chip = snd_timer_chip(timer);
425	spin_lock_irqsave(&chip->lock, flags);
426
427	snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
428		AD1816A_TIMER_ENABLE, 0x0000);
429
430	spin_unlock_irqrestore(&chip->lock, flags);
431	return 0;
432}
433
434static struct snd_timer_hardware snd_ad1816a_timer_table = {
435	.flags =	SNDRV_TIMER_HW_AUTO,
436	.resolution =	10000,
437	.ticks =	65535,
438	.open =		snd_ad1816a_timer_open,
439	.close =	snd_ad1816a_timer_close,
440	.c_resolution =	snd_ad1816a_timer_resolution,
441	.start =	snd_ad1816a_timer_start,
442	.stop =		snd_ad1816a_timer_stop,
443};
444
445static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
446{
447	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
448	struct snd_pcm_runtime *runtime = substream->runtime;
449	int error;
450
451	if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0)
452		return error;
453	runtime->hw = snd_ad1816a_playback;
454	snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
455	snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
456	chip->playback_substream = substream;
457	return 0;
458}
459
460static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
461{
462	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
463	struct snd_pcm_runtime *runtime = substream->runtime;
464	int error;
465
466	if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0)
467		return error;
468	runtime->hw = snd_ad1816a_capture;
469	snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
470	snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
471	chip->capture_substream = substream;
472	return 0;
473}
474
475static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
476{
477	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
478
479	chip->playback_substream = NULL;
480	snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
481	return 0;
482}
483
484static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
485{
486	struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
487
488	chip->capture_substream = NULL;
489	snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
490	return 0;
491}
492
493
494static void snd_ad1816a_init(struct snd_ad1816a *chip)
495{
496	unsigned long flags;
497
498	spin_lock_irqsave(&chip->lock, flags);
499
500	snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
501	snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
502		AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
503	snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
504		AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
505	snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
506	snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
507		AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
508	snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
509	snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
510
511	spin_unlock_irqrestore(&chip->lock, flags);
512}
513
514#ifdef CONFIG_PM
515void snd_ad1816a_suspend(struct snd_ad1816a *chip)
516{
517	int reg;
518	unsigned long flags;
519
520	snd_pcm_suspend_all(chip->pcm);
521	spin_lock_irqsave(&chip->lock, flags);
522	for (reg = 0; reg < 48; reg++)
523		chip->image[reg] = snd_ad1816a_read(chip, reg);
524	spin_unlock_irqrestore(&chip->lock, flags);
525}
526
527void snd_ad1816a_resume(struct snd_ad1816a *chip)
528{
529	int reg;
530	unsigned long flags;
531
532	snd_ad1816a_init(chip);
533	spin_lock_irqsave(&chip->lock, flags);
534	for (reg = 0; reg < 48; reg++)
535		snd_ad1816a_write(chip, reg, chip->image[reg]);
536	spin_unlock_irqrestore(&chip->lock, flags);
537}
538#endif
539
540static int snd_ad1816a_probe(struct snd_ad1816a *chip)
541{
542	unsigned long flags;
543
544	spin_lock_irqsave(&chip->lock, flags);
545
546	switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
547	case 0:
548		chip->hardware = AD1816A_HW_AD1815;
549		break;
550	case 1:
551		chip->hardware = AD1816A_HW_AD18MAX10;
552		break;
553	case 3:
554		chip->hardware = AD1816A_HW_AD1816A;
555		break;
556	default:
557		chip->hardware = AD1816A_HW_AUTO;
558	}
559
560	spin_unlock_irqrestore(&chip->lock, flags);
561	return 0;
562}
563
564static int snd_ad1816a_free(struct snd_ad1816a *chip)
565{
566	release_and_free_resource(chip->res_port);
567	if (chip->irq >= 0)
568		free_irq(chip->irq, (void *) chip);
569	if (chip->dma1 >= 0) {
570		snd_dma_disable(chip->dma1);
571		free_dma(chip->dma1);
572	}
573	if (chip->dma2 >= 0) {
574		snd_dma_disable(chip->dma2);
575		free_dma(chip->dma2);
576	}
577	return 0;
578}
579
580static int snd_ad1816a_dev_free(struct snd_device *device)
581{
582	struct snd_ad1816a *chip = device->device_data;
583	return snd_ad1816a_free(chip);
584}
585
586static const char *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
587{
588	switch (chip->hardware) {
589	case AD1816A_HW_AD1816A: return "AD1816A";
590	case AD1816A_HW_AD1815:	return "AD1815";
591	case AD1816A_HW_AD18MAX10: return "AD18max10";
592	default:
593		snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n",
594			chip->version, chip->hardware);
595		return "AD1816A - unknown";
596	}
597}
598
599int snd_ad1816a_create(struct snd_card *card,
600		       unsigned long port, int irq, int dma1, int dma2,
601		       struct snd_ad1816a *chip)
602{
603        static struct snd_device_ops ops = {
604		.dev_free =	snd_ad1816a_dev_free,
605	};
606	int error;
607
608	chip->irq = -1;
609	chip->dma1 = -1;
610	chip->dma2 = -1;
611
612	if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) {
613		snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
614		snd_ad1816a_free(chip);
615		return -EBUSY;
616	}
617	if (request_irq(irq, snd_ad1816a_interrupt, 0, "AD1816A", (void *) chip)) {
618		snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
619		snd_ad1816a_free(chip);
620		return -EBUSY;
621	}
622	chip->irq = irq;
623	if (request_dma(dma1, "AD1816A - 1")) {
624		snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
625		snd_ad1816a_free(chip);
626		return -EBUSY;
627	}
628	chip->dma1 = dma1;
629	if (request_dma(dma2, "AD1816A - 2")) {
630		snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
631		snd_ad1816a_free(chip);
632		return -EBUSY;
633	}
634	chip->dma2 = dma2;
635
636	chip->card = card;
637	chip->port = port;
638	spin_lock_init(&chip->lock);
639
640	if ((error = snd_ad1816a_probe(chip))) {
641		snd_ad1816a_free(chip);
642		return error;
643	}
644
645	snd_ad1816a_init(chip);
646
647	/* Register device */
648	if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
649		snd_ad1816a_free(chip);
650		return error;
651	}
652
653	return 0;
654}
655
656static struct snd_pcm_ops snd_ad1816a_playback_ops = {
657	.open =		snd_ad1816a_playback_open,
658	.close =	snd_ad1816a_playback_close,
659	.ioctl =	snd_pcm_lib_ioctl,
660	.hw_params =	snd_ad1816a_hw_params,
661	.hw_free =	snd_ad1816a_hw_free,
662	.prepare =	snd_ad1816a_playback_prepare,
663	.trigger =	snd_ad1816a_playback_trigger,
664	.pointer =	snd_ad1816a_playback_pointer,
665};
666
667static struct snd_pcm_ops snd_ad1816a_capture_ops = {
668	.open =		snd_ad1816a_capture_open,
669	.close =	snd_ad1816a_capture_close,
670	.ioctl =	snd_pcm_lib_ioctl,
671	.hw_params =	snd_ad1816a_hw_params,
672	.hw_free =	snd_ad1816a_hw_free,
673	.prepare =	snd_ad1816a_capture_prepare,
674	.trigger =	snd_ad1816a_capture_trigger,
675	.pointer =	snd_ad1816a_capture_pointer,
676};
677
678int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device)
679{
680	int error;
681	struct snd_pcm *pcm;
682
683	if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm)))
684		return error;
685
686	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
687	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
688
689	pcm->private_data = chip;
690	pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
691
692	strcpy(pcm->name, snd_ad1816a_chip_id(chip));
693	snd_ad1816a_init(chip);
694
695	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
696					      snd_dma_isa_data(),
697					      64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
698
699	chip->pcm = pcm;
700	return 0;
701}
702
703int snd_ad1816a_timer(struct snd_ad1816a *chip, int device)
704{
705	struct snd_timer *timer;
706	struct snd_timer_id tid;
707	int error;
708
709	tid.dev_class = SNDRV_TIMER_CLASS_CARD;
710	tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
711	tid.card = chip->card->number;
712	tid.device = device;
713	tid.subdevice = 0;
714	if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0)
715		return error;
716	strcpy(timer->name, snd_ad1816a_chip_id(chip));
717	timer->private_data = chip;
718	chip->timer = timer;
719	timer->hw = snd_ad1816a_timer_table;
720	return 0;
721}
722
723/*
724 *
725 */
726
727static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
728{
729	static const char * const texts[8] = {
730		"Line", "Mix", "CD", "Synth", "Video",
731		"Mic", "Phone",
732	};
733
734	return snd_ctl_enum_info(uinfo, 2, 7, texts);
735}
736
737static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
738{
739	struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
740	unsigned long flags;
741	unsigned short val;
742
743	spin_lock_irqsave(&chip->lock, flags);
744	val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
745	spin_unlock_irqrestore(&chip->lock, flags);
746	ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
747	ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
748	return 0;
749}
750
751static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
752{
753	struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
754	unsigned long flags;
755	unsigned short val;
756	int change;
757
758	if (ucontrol->value.enumerated.item[0] > 6 ||
759	    ucontrol->value.enumerated.item[1] > 6)
760		return -EINVAL;
761	val = (ucontrol->value.enumerated.item[0] << 12) |
762	      (ucontrol->value.enumerated.item[1] << 4);
763	spin_lock_irqsave(&chip->lock, flags);
764	change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
765	snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
766	spin_unlock_irqrestore(&chip->lock, flags);
767	return change;
768}
769
770#define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv)	\
771{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
772  .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
773  .name = xname, .info = snd_ad1816a_info_single, \
774  .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
775  .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
776  .tlv = { .p = (xtlv) } }
777#define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
778{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
779  .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
780  .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
781
782static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
783{
784	int mask = (kcontrol->private_value >> 16) & 0xff;
785
786	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
787	uinfo->count = 1;
788	uinfo->value.integer.min = 0;
789	uinfo->value.integer.max = mask;
790	return 0;
791}
792
793static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
794{
795	struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
796	unsigned long flags;
797	int reg = kcontrol->private_value & 0xff;
798	int shift = (kcontrol->private_value >> 8) & 0xff;
799	int mask = (kcontrol->private_value >> 16) & 0xff;
800	int invert = (kcontrol->private_value >> 24) & 0xff;
801
802	spin_lock_irqsave(&chip->lock, flags);
803	ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
804	spin_unlock_irqrestore(&chip->lock, flags);
805	if (invert)
806		ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
807	return 0;
808}
809
810static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
811{
812	struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
813	unsigned long flags;
814	int reg = kcontrol->private_value & 0xff;
815	int shift = (kcontrol->private_value >> 8) & 0xff;
816	int mask = (kcontrol->private_value >> 16) & 0xff;
817	int invert = (kcontrol->private_value >> 24) & 0xff;
818	int change;
819	unsigned short old_val, val;
820
821	val = (ucontrol->value.integer.value[0] & mask);
822	if (invert)
823		val = mask - val;
824	val <<= shift;
825	spin_lock_irqsave(&chip->lock, flags);
826	old_val = snd_ad1816a_read(chip, reg);
827	val = (old_val & ~(mask << shift)) | val;
828	change = val != old_val;
829	snd_ad1816a_write(chip, reg, val);
830	spin_unlock_irqrestore(&chip->lock, flags);
831	return change;
832}
833
834#define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
835{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
836  .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
837  .name = xname, .info = snd_ad1816a_info_double,		\
838  .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
839  .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
840  .tlv = { .p = (xtlv) } }
841
842#define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
843{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
844  .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
845  .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
846
847static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
848{
849	int mask = (kcontrol->private_value >> 16) & 0xff;
850
851	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
852	uinfo->count = 2;
853	uinfo->value.integer.min = 0;
854	uinfo->value.integer.max = mask;
855	return 0;
856}
857
858static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
859{
860	struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
861	unsigned long flags;
862	int reg = kcontrol->private_value & 0xff;
863	int shift_left = (kcontrol->private_value >> 8) & 0x0f;
864	int shift_right = (kcontrol->private_value >> 12) & 0x0f;
865	int mask = (kcontrol->private_value >> 16) & 0xff;
866	int invert = (kcontrol->private_value >> 24) & 0xff;
867	unsigned short val;
868
869	spin_lock_irqsave(&chip->lock, flags);
870	val = snd_ad1816a_read(chip, reg);
871	ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
872	ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
873	spin_unlock_irqrestore(&chip->lock, flags);
874	if (invert) {
875		ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
876		ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
877	}
878	return 0;
879}
880
881static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
882{
883	struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
884	unsigned long flags;
885	int reg = kcontrol->private_value & 0xff;
886	int shift_left = (kcontrol->private_value >> 8) & 0x0f;
887	int shift_right = (kcontrol->private_value >> 12) & 0x0f;
888	int mask = (kcontrol->private_value >> 16) & 0xff;
889	int invert = (kcontrol->private_value >> 24) & 0xff;
890	int change;
891	unsigned short old_val, val1, val2;
892
893	val1 = ucontrol->value.integer.value[0] & mask;
894	val2 = ucontrol->value.integer.value[1] & mask;
895	if (invert) {
896		val1 = mask - val1;
897		val2 = mask - val2;
898	}
899	val1 <<= shift_left;
900	val2 <<= shift_right;
901	spin_lock_irqsave(&chip->lock, flags);
902	old_val = snd_ad1816a_read(chip, reg);
903	val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
904	change = val1 != old_val;
905	snd_ad1816a_write(chip, reg, val1);
906	spin_unlock_irqrestore(&chip->lock, flags);
907	return change;
908}
909
910static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
911static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
912static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
913static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
914static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
915
916static struct snd_kcontrol_new snd_ad1816a_controls[] = {
917AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
918AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1,
919		   db_scale_5bit),
920AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
921AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1,
922		   db_scale_6bit),
923AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
924AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1,
925		   db_scale_5bit_12db_max),
926AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
927AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1,
928		   db_scale_5bit_12db_max),
929AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
930AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1,
931		   db_scale_5bit_12db_max),
932AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
933AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1,
934		   db_scale_6bit),
935AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
936AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1,
937		   db_scale_5bit_12db_max),
938AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
939AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
940AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1,
941		   db_scale_5bit_12db_max),
942AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
943AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1,
944		   db_scale_4bit),
945AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
946AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1,
947		   db_scale_5bit),
948{
949	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
950	.name = "Capture Source",
951	.info = snd_ad1816a_info_mux,
952	.get = snd_ad1816a_get_mux,
953	.put = snd_ad1816a_put_mux,
954},
955AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
956AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0,
957		   db_scale_rec_gain),
958AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
959AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
960};
961
962int snd_ad1816a_mixer(struct snd_ad1816a *chip)
963{
964	struct snd_card *card;
965	unsigned int idx;
966	int err;
967
968	if (snd_BUG_ON(!chip || !chip->card))
969		return -EINVAL;
970
971	card = chip->card;
972
973	strcpy(card->mixername, snd_ad1816a_chip_id(chip));
974
975	for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
976		if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0)
977			return err;
978	}
979	return 0;
980}
981