1/* 2 * uda134x.c -- UDA134X ALSA SoC Codec driver 3 * 4 * Modifications by Christian Pellegrin <chripell@evolware.org> 5 * 6 * Copyright 2007 Dension Audio Systems Ltd. 7 * Author: Zoltan Devai 8 * 9 * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 16#include <linux/module.h> 17#include <linux/delay.h> 18#include <linux/slab.h> 19#include <sound/pcm.h> 20#include <sound/pcm_params.h> 21#include <sound/soc.h> 22#include <sound/initval.h> 23 24#include <sound/uda134x.h> 25#include <sound/l3.h> 26 27#include "uda134x.h" 28 29 30#define UDA134X_RATES SNDRV_PCM_RATE_8000_48000 31#define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \ 32 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE) 33 34struct uda134x_priv { 35 int sysclk; 36 int dai_fmt; 37 38 struct snd_pcm_substream *master_substream; 39 struct snd_pcm_substream *slave_substream; 40}; 41 42/* In-data addresses are hard-coded into the reg-cache values */ 43static const char uda134x_reg[UDA134X_REGS_NUM] = { 44 /* Extended address registers */ 45 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 46 /* Status, data regs */ 47 0x00, 0x83, 0x00, 0x40, 0x80, 0xC0, 0x00, 48}; 49 50/* 51 * The codec has no support for reading its registers except for peak level... 52 */ 53static inline unsigned int uda134x_read_reg_cache(struct snd_soc_codec *codec, 54 unsigned int reg) 55{ 56 u8 *cache = codec->reg_cache; 57 58 if (reg >= UDA134X_REGS_NUM) 59 return -1; 60 return cache[reg]; 61} 62 63/* 64 * Write the register cache 65 */ 66static inline void uda134x_write_reg_cache(struct snd_soc_codec *codec, 67 u8 reg, unsigned int value) 68{ 69 u8 *cache = codec->reg_cache; 70 71 if (reg >= UDA134X_REGS_NUM) 72 return; 73 cache[reg] = value; 74} 75 76/* 77 * Write to the uda134x registers 78 * 79 */ 80static int uda134x_write(struct snd_soc_codec *codec, unsigned int reg, 81 unsigned int value) 82{ 83 int ret; 84 u8 addr; 85 u8 data = value; 86 struct uda134x_platform_data *pd = codec->control_data; 87 88 pr_debug("%s reg: %02X, value:%02X\n", __func__, reg, value); 89 90 if (reg >= UDA134X_REGS_NUM) { 91 printk(KERN_ERR "%s unknown register: reg: %u", 92 __func__, reg); 93 return -EINVAL; 94 } 95 96 uda134x_write_reg_cache(codec, reg, value); 97 98 switch (reg) { 99 case UDA134X_STATUS0: 100 case UDA134X_STATUS1: 101 addr = UDA134X_STATUS_ADDR; 102 break; 103 case UDA134X_DATA000: 104 case UDA134X_DATA001: 105 case UDA134X_DATA010: 106 case UDA134X_DATA011: 107 addr = UDA134X_DATA0_ADDR; 108 break; 109 case UDA134X_DATA1: 110 addr = UDA134X_DATA1_ADDR; 111 break; 112 default: 113 /* It's an extended address register */ 114 addr = (reg | UDA134X_EXTADDR_PREFIX); 115 116 ret = l3_write(&pd->l3, 117 UDA134X_DATA0_ADDR, &addr, 1); 118 if (ret != 1) 119 return -EIO; 120 121 addr = UDA134X_DATA0_ADDR; 122 data = (value | UDA134X_EXTDATA_PREFIX); 123 break; 124 } 125 126 ret = l3_write(&pd->l3, 127 addr, &data, 1); 128 if (ret != 1) 129 return -EIO; 130 131 return 0; 132} 133 134static inline void uda134x_reset(struct snd_soc_codec *codec) 135{ 136 u8 reset_reg = uda134x_read_reg_cache(codec, UDA134X_STATUS0); 137 uda134x_write(codec, UDA134X_STATUS0, reset_reg | (1<<6)); 138 msleep(1); 139 uda134x_write(codec, UDA134X_STATUS0, reset_reg & ~(1<<6)); 140} 141 142static int uda134x_mute(struct snd_soc_dai *dai, int mute) 143{ 144 struct snd_soc_codec *codec = dai->codec; 145 u8 mute_reg = uda134x_read_reg_cache(codec, UDA134X_DATA010); 146 147 pr_debug("%s mute: %d\n", __func__, mute); 148 149 if (mute) 150 mute_reg |= (1<<2); 151 else 152 mute_reg &= ~(1<<2); 153 154 uda134x_write(codec, UDA134X_DATA010, mute_reg); 155 156 return 0; 157} 158 159static int uda134x_startup(struct snd_pcm_substream *substream, 160 struct snd_soc_dai *dai) 161{ 162 struct snd_soc_codec *codec = dai->codec; 163 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec); 164 struct snd_pcm_runtime *master_runtime; 165 166 if (uda134x->master_substream) { 167 master_runtime = uda134x->master_substream->runtime; 168 169 pr_debug("%s constraining to %d bits at %d\n", __func__, 170 master_runtime->sample_bits, 171 master_runtime->rate); 172 173 snd_pcm_hw_constraint_minmax(substream->runtime, 174 SNDRV_PCM_HW_PARAM_RATE, 175 master_runtime->rate, 176 master_runtime->rate); 177 178 snd_pcm_hw_constraint_minmax(substream->runtime, 179 SNDRV_PCM_HW_PARAM_SAMPLE_BITS, 180 master_runtime->sample_bits, 181 master_runtime->sample_bits); 182 183 uda134x->slave_substream = substream; 184 } else 185 uda134x->master_substream = substream; 186 187 return 0; 188} 189 190static void uda134x_shutdown(struct snd_pcm_substream *substream, 191 struct snd_soc_dai *dai) 192{ 193 struct snd_soc_codec *codec = dai->codec; 194 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec); 195 196 if (uda134x->master_substream == substream) 197 uda134x->master_substream = uda134x->slave_substream; 198 199 uda134x->slave_substream = NULL; 200} 201 202static int uda134x_hw_params(struct snd_pcm_substream *substream, 203 struct snd_pcm_hw_params *params, 204 struct snd_soc_dai *dai) 205{ 206 struct snd_soc_codec *codec = dai->codec; 207 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec); 208 u8 hw_params; 209 210 if (substream == uda134x->slave_substream) { 211 pr_debug("%s ignoring hw_params for slave substream\n", 212 __func__); 213 return 0; 214 } 215 216 hw_params = uda134x_read_reg_cache(codec, UDA134X_STATUS0); 217 hw_params &= STATUS0_SYSCLK_MASK; 218 hw_params &= STATUS0_DAIFMT_MASK; 219 220 pr_debug("%s sysclk: %d, rate:%d\n", __func__, 221 uda134x->sysclk, params_rate(params)); 222 223 /* set SYSCLK / fs ratio */ 224 switch (uda134x->sysclk / params_rate(params)) { 225 case 512: 226 break; 227 case 384: 228 hw_params |= (1<<4); 229 break; 230 case 256: 231 hw_params |= (1<<5); 232 break; 233 default: 234 printk(KERN_ERR "%s unsupported fs\n", __func__); 235 return -EINVAL; 236 } 237 238 pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__, 239 uda134x->dai_fmt, params_format(params)); 240 241 /* set DAI format and word length */ 242 switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 243 case SND_SOC_DAIFMT_I2S: 244 break; 245 case SND_SOC_DAIFMT_RIGHT_J: 246 switch (params_width(params)) { 247 case 16: 248 hw_params |= (1<<1); 249 break; 250 case 18: 251 hw_params |= (1<<2); 252 break; 253 case 20: 254 hw_params |= ((1<<2) | (1<<1)); 255 break; 256 default: 257 printk(KERN_ERR "%s unsupported format (right)\n", 258 __func__); 259 return -EINVAL; 260 } 261 break; 262 case SND_SOC_DAIFMT_LEFT_J: 263 hw_params |= (1<<3); 264 break; 265 default: 266 printk(KERN_ERR "%s unsupported format\n", __func__); 267 return -EINVAL; 268 } 269 270 uda134x_write(codec, UDA134X_STATUS0, hw_params); 271 272 return 0; 273} 274 275static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai, 276 int clk_id, unsigned int freq, int dir) 277{ 278 struct snd_soc_codec *codec = codec_dai->codec; 279 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec); 280 281 pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__, 282 clk_id, freq, dir); 283 284 /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable 285 because the codec is slave. Of course limitations of the clock 286 master (the IIS controller) apply. 287 We'll error out on set_hw_params if it's not OK */ 288 if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) { 289 uda134x->sysclk = freq; 290 return 0; 291 } 292 293 printk(KERN_ERR "%s unsupported sysclk\n", __func__); 294 return -EINVAL; 295} 296 297static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai, 298 unsigned int fmt) 299{ 300 struct snd_soc_codec *codec = codec_dai->codec; 301 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec); 302 303 pr_debug("%s fmt: %08X\n", __func__, fmt); 304 305 /* codec supports only full slave mode */ 306 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) { 307 printk(KERN_ERR "%s unsupported slave mode\n", __func__); 308 return -EINVAL; 309 } 310 311 /* no support for clock inversion */ 312 if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) { 313 printk(KERN_ERR "%s unsupported clock inversion\n", __func__); 314 return -EINVAL; 315 } 316 317 /* We can't setup DAI format here as it depends on the word bit num */ 318 /* so let's just store the value for later */ 319 uda134x->dai_fmt = fmt; 320 321 return 0; 322} 323 324static int uda134x_set_bias_level(struct snd_soc_codec *codec, 325 enum snd_soc_bias_level level) 326{ 327 struct uda134x_platform_data *pd = codec->control_data; 328 int i; 329 u8 *cache = codec->reg_cache; 330 331 pr_debug("%s bias level %d\n", __func__, level); 332 333 switch (level) { 334 case SND_SOC_BIAS_ON: 335 break; 336 case SND_SOC_BIAS_PREPARE: 337 /* power on */ 338 if (pd->power) { 339 pd->power(1); 340 /* Sync reg_cache with the hardware */ 341 for (i = 0; i < ARRAY_SIZE(uda134x_reg); i++) 342 codec->driver->write(codec, i, *cache++); 343 } 344 break; 345 case SND_SOC_BIAS_STANDBY: 346 break; 347 case SND_SOC_BIAS_OFF: 348 /* power off */ 349 if (pd->power) 350 pd->power(0); 351 break; 352 } 353 codec->dapm.bias_level = level; 354 return 0; 355} 356 357static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1", 358 "Minimum2", "Maximum"}; 359static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; 360static const char *uda134x_mixmode[] = {"Differential", "Analog1", 361 "Analog2", "Both"}; 362 363static const struct soc_enum uda134x_mixer_enum[] = { 364SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting), 365SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph), 366SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode), 367}; 368 369static const struct snd_kcontrol_new uda1341_snd_controls[] = { 370SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1), 371SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0), 372SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1), 373SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1), 374 375SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0), 376SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0), 377 378SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0), 379SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0), 380 381SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]), 382SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]), 383SOC_ENUM("Input Mux", uda134x_mixer_enum[2]), 384 385SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0), 386SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1), 387SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0), 388 389SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0), 390SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0), 391SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0), 392SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0), 393SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0), 394SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0), 395}; 396 397static const struct snd_kcontrol_new uda1340_snd_controls[] = { 398SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1), 399 400SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0), 401SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0), 402 403SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]), 404SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]), 405 406SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0), 407}; 408 409static const struct snd_kcontrol_new uda1345_snd_controls[] = { 410SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1), 411 412SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]), 413 414SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0), 415}; 416 417/* UDA1341 has the DAC/ADC power down in STATUS1 */ 418static const struct snd_soc_dapm_widget uda1341_dapm_widgets[] = { 419 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_STATUS1, 0, 0), 420 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_STATUS1, 1, 0), 421}; 422 423/* UDA1340/4/5 has the DAC/ADC pwoer down in DATA0 11 */ 424static const struct snd_soc_dapm_widget uda1340_dapm_widgets[] = { 425 SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_DATA011, 0, 0), 426 SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_DATA011, 1, 0), 427}; 428 429/* Common DAPM widgets */ 430static const struct snd_soc_dapm_widget uda134x_dapm_widgets[] = { 431 SND_SOC_DAPM_INPUT("VINL1"), 432 SND_SOC_DAPM_INPUT("VINR1"), 433 SND_SOC_DAPM_INPUT("VINL2"), 434 SND_SOC_DAPM_INPUT("VINR2"), 435 SND_SOC_DAPM_OUTPUT("VOUTL"), 436 SND_SOC_DAPM_OUTPUT("VOUTR"), 437}; 438 439static const struct snd_soc_dapm_route uda134x_dapm_routes[] = { 440 { "ADC", NULL, "VINL1" }, 441 { "ADC", NULL, "VINR1" }, 442 { "ADC", NULL, "VINL2" }, 443 { "ADC", NULL, "VINR2" }, 444 { "VOUTL", NULL, "DAC" }, 445 { "VOUTR", NULL, "DAC" }, 446}; 447 448static const struct snd_soc_dai_ops uda134x_dai_ops = { 449 .startup = uda134x_startup, 450 .shutdown = uda134x_shutdown, 451 .hw_params = uda134x_hw_params, 452 .digital_mute = uda134x_mute, 453 .set_sysclk = uda134x_set_dai_sysclk, 454 .set_fmt = uda134x_set_dai_fmt, 455}; 456 457static struct snd_soc_dai_driver uda134x_dai = { 458 .name = "uda134x-hifi", 459 /* playback capabilities */ 460 .playback = { 461 .stream_name = "Playback", 462 .channels_min = 1, 463 .channels_max = 2, 464 .rates = UDA134X_RATES, 465 .formats = UDA134X_FORMATS, 466 }, 467 /* capture capabilities */ 468 .capture = { 469 .stream_name = "Capture", 470 .channels_min = 1, 471 .channels_max = 2, 472 .rates = UDA134X_RATES, 473 .formats = UDA134X_FORMATS, 474 }, 475 /* pcm operations */ 476 .ops = &uda134x_dai_ops, 477}; 478 479static int uda134x_soc_probe(struct snd_soc_codec *codec) 480{ 481 struct uda134x_priv *uda134x; 482 struct uda134x_platform_data *pd = codec->component.card->dev->platform_data; 483 const struct snd_soc_dapm_widget *widgets; 484 unsigned num_widgets; 485 486 int ret; 487 488 printk(KERN_INFO "UDA134X SoC Audio Codec\n"); 489 490 if (!pd) { 491 printk(KERN_ERR "UDA134X SoC codec: " 492 "missing L3 bitbang function\n"); 493 return -ENODEV; 494 } 495 496 switch (pd->model) { 497 case UDA134X_UDA1340: 498 case UDA134X_UDA1341: 499 case UDA134X_UDA1344: 500 case UDA134X_UDA1345: 501 break; 502 default: 503 printk(KERN_ERR "UDA134X SoC codec: " 504 "unsupported model %d\n", 505 pd->model); 506 return -EINVAL; 507 } 508 509 uda134x = kzalloc(sizeof(struct uda134x_priv), GFP_KERNEL); 510 if (uda134x == NULL) 511 return -ENOMEM; 512 snd_soc_codec_set_drvdata(codec, uda134x); 513 514 codec->control_data = pd; 515 516 if (pd->power) 517 pd->power(1); 518 519 uda134x_reset(codec); 520 521 if (pd->model == UDA134X_UDA1341) { 522 widgets = uda1341_dapm_widgets; 523 num_widgets = ARRAY_SIZE(uda1341_dapm_widgets); 524 } else { 525 widgets = uda1340_dapm_widgets; 526 num_widgets = ARRAY_SIZE(uda1340_dapm_widgets); 527 } 528 529 ret = snd_soc_dapm_new_controls(&codec->dapm, widgets, num_widgets); 530 if (ret) { 531 printk(KERN_ERR "%s failed to register dapm controls: %d", 532 __func__, ret); 533 kfree(uda134x); 534 return ret; 535 } 536 537 switch (pd->model) { 538 case UDA134X_UDA1340: 539 case UDA134X_UDA1344: 540 ret = snd_soc_add_codec_controls(codec, uda1340_snd_controls, 541 ARRAY_SIZE(uda1340_snd_controls)); 542 break; 543 case UDA134X_UDA1341: 544 ret = snd_soc_add_codec_controls(codec, uda1341_snd_controls, 545 ARRAY_SIZE(uda1341_snd_controls)); 546 break; 547 case UDA134X_UDA1345: 548 ret = snd_soc_add_codec_controls(codec, uda1345_snd_controls, 549 ARRAY_SIZE(uda1345_snd_controls)); 550 break; 551 default: 552 printk(KERN_ERR "%s unknown codec type: %d", 553 __func__, pd->model); 554 kfree(uda134x); 555 return -EINVAL; 556 } 557 558 if (ret < 0) { 559 printk(KERN_ERR "UDA134X: failed to register controls\n"); 560 kfree(uda134x); 561 return ret; 562 } 563 564 return 0; 565} 566 567/* power down chip */ 568static int uda134x_soc_remove(struct snd_soc_codec *codec) 569{ 570 struct uda134x_priv *uda134x = snd_soc_codec_get_drvdata(codec); 571 572 kfree(uda134x); 573 return 0; 574} 575 576static struct snd_soc_codec_driver soc_codec_dev_uda134x = { 577 .probe = uda134x_soc_probe, 578 .remove = uda134x_soc_remove, 579 .reg_cache_size = sizeof(uda134x_reg), 580 .reg_word_size = sizeof(u8), 581 .reg_cache_default = uda134x_reg, 582 .reg_cache_step = 1, 583 .read = uda134x_read_reg_cache, 584 .set_bias_level = uda134x_set_bias_level, 585 .suspend_bias_off = true, 586 587 .dapm_widgets = uda134x_dapm_widgets, 588 .num_dapm_widgets = ARRAY_SIZE(uda134x_dapm_widgets), 589 .dapm_routes = uda134x_dapm_routes, 590 .num_dapm_routes = ARRAY_SIZE(uda134x_dapm_routes), 591}; 592 593static int uda134x_codec_probe(struct platform_device *pdev) 594{ 595 return snd_soc_register_codec(&pdev->dev, 596 &soc_codec_dev_uda134x, &uda134x_dai, 1); 597} 598 599static int uda134x_codec_remove(struct platform_device *pdev) 600{ 601 snd_soc_unregister_codec(&pdev->dev); 602 return 0; 603} 604 605static struct platform_driver uda134x_codec_driver = { 606 .driver = { 607 .name = "uda134x-codec", 608 }, 609 .probe = uda134x_codec_probe, 610 .remove = uda134x_codec_remove, 611}; 612 613module_platform_driver(uda134x_codec_driver); 614 615MODULE_DESCRIPTION("UDA134X ALSA soc codec driver"); 616MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>"); 617MODULE_LICENSE("GPL"); 618