1#ifndef _WM8737_H 2#define _WM8737_H 3 4/* 5 * wm8737.c -- WM8523 ALSA SoC Audio driver 6 * 7 * Copyright 2010 Wolfson Microelectronics plc 8 * 9 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 16/* 17 * Register values. 18 */ 19#define WM8737_LEFT_PGA_VOLUME 0x00 20#define WM8737_RIGHT_PGA_VOLUME 0x01 21#define WM8737_AUDIO_PATH_L 0x02 22#define WM8737_AUDIO_PATH_R 0x03 23#define WM8737_3D_ENHANCE 0x04 24#define WM8737_ADC_CONTROL 0x05 25#define WM8737_POWER_MANAGEMENT 0x06 26#define WM8737_AUDIO_FORMAT 0x07 27#define WM8737_CLOCKING 0x08 28#define WM8737_MIC_PREAMP_CONTROL 0x09 29#define WM8737_MISC_BIAS_CONTROL 0x0A 30#define WM8737_NOISE_GATE 0x0B 31#define WM8737_ALC1 0x0C 32#define WM8737_ALC2 0x0D 33#define WM8737_ALC3 0x0E 34#define WM8737_RESET 0x0F 35 36#define WM8737_REGISTER_COUNT 16 37#define WM8737_MAX_REGISTER 0x0F 38 39/* 40 * Field Definitions. 41 */ 42 43/* 44 * R0 (0x00) - Left PGA volume 45 */ 46#define WM8737_LVU 0x0100 /* LVU */ 47#define WM8737_LVU_MASK 0x0100 /* LVU */ 48#define WM8737_LVU_SHIFT 8 /* LVU */ 49#define WM8737_LVU_WIDTH 1 /* LVU */ 50#define WM8737_LINVOL_MASK 0x00FF /* LINVOL - [7:0] */ 51#define WM8737_LINVOL_SHIFT 0 /* LINVOL - [7:0] */ 52#define WM8737_LINVOL_WIDTH 8 /* LINVOL - [7:0] */ 53 54/* 55 * R1 (0x01) - Right PGA volume 56 */ 57#define WM8737_RVU 0x0100 /* RVU */ 58#define WM8737_RVU_MASK 0x0100 /* RVU */ 59#define WM8737_RVU_SHIFT 8 /* RVU */ 60#define WM8737_RVU_WIDTH 1 /* RVU */ 61#define WM8737_RINVOL_MASK 0x00FF /* RINVOL - [7:0] */ 62#define WM8737_RINVOL_SHIFT 0 /* RINVOL - [7:0] */ 63#define WM8737_RINVOL_WIDTH 8 /* RINVOL - [7:0] */ 64 65/* 66 * R2 (0x02) - AUDIO path L 67 */ 68#define WM8737_LINSEL_MASK 0x0180 /* LINSEL - [8:7] */ 69#define WM8737_LINSEL_SHIFT 7 /* LINSEL - [8:7] */ 70#define WM8737_LINSEL_WIDTH 2 /* LINSEL - [8:7] */ 71#define WM8737_LMICBOOST_MASK 0x0060 /* LMICBOOST - [6:5] */ 72#define WM8737_LMICBOOST_SHIFT 5 /* LMICBOOST - [6:5] */ 73#define WM8737_LMICBOOST_WIDTH 2 /* LMICBOOST - [6:5] */ 74#define WM8737_LMBE 0x0010 /* LMBE */ 75#define WM8737_LMBE_MASK 0x0010 /* LMBE */ 76#define WM8737_LMBE_SHIFT 4 /* LMBE */ 77#define WM8737_LMBE_WIDTH 1 /* LMBE */ 78#define WM8737_LMZC 0x0008 /* LMZC */ 79#define WM8737_LMZC_MASK 0x0008 /* LMZC */ 80#define WM8737_LMZC_SHIFT 3 /* LMZC */ 81#define WM8737_LMZC_WIDTH 1 /* LMZC */ 82#define WM8737_LPZC 0x0004 /* LPZC */ 83#define WM8737_LPZC_MASK 0x0004 /* LPZC */ 84#define WM8737_LPZC_SHIFT 2 /* LPZC */ 85#define WM8737_LPZC_WIDTH 1 /* LPZC */ 86#define WM8737_LZCTO_MASK 0x0003 /* LZCTO - [1:0] */ 87#define WM8737_LZCTO_SHIFT 0 /* LZCTO - [1:0] */ 88#define WM8737_LZCTO_WIDTH 2 /* LZCTO - [1:0] */ 89 90/* 91 * R3 (0x03) - AUDIO path R 92 */ 93#define WM8737_RINSEL_MASK 0x0180 /* RINSEL - [8:7] */ 94#define WM8737_RINSEL_SHIFT 7 /* RINSEL - [8:7] */ 95#define WM8737_RINSEL_WIDTH 2 /* RINSEL - [8:7] */ 96#define WM8737_RMICBOOST_MASK 0x0060 /* RMICBOOST - [6:5] */ 97#define WM8737_RMICBOOST_SHIFT 5 /* RMICBOOST - [6:5] */ 98#define WM8737_RMICBOOST_WIDTH 2 /* RMICBOOST - [6:5] */ 99#define WM8737_RMBE 0x0010 /* RMBE */ 100#define WM8737_RMBE_MASK 0x0010 /* RMBE */ 101#define WM8737_RMBE_SHIFT 4 /* RMBE */ 102#define WM8737_RMBE_WIDTH 1 /* RMBE */ 103#define WM8737_RMZC 0x0008 /* RMZC */ 104#define WM8737_RMZC_MASK 0x0008 /* RMZC */ 105#define WM8737_RMZC_SHIFT 3 /* RMZC */ 106#define WM8737_RMZC_WIDTH 1 /* RMZC */ 107#define WM8737_RPZC 0x0004 /* RPZC */ 108#define WM8737_RPZC_MASK 0x0004 /* RPZC */ 109#define WM8737_RPZC_SHIFT 2 /* RPZC */ 110#define WM8737_RPZC_WIDTH 1 /* RPZC */ 111#define WM8737_RZCTO_MASK 0x0003 /* RZCTO - [1:0] */ 112#define WM8737_RZCTO_SHIFT 0 /* RZCTO - [1:0] */ 113#define WM8737_RZCTO_WIDTH 2 /* RZCTO - [1:0] */ 114 115/* 116 * R4 (0x04) - 3D Enhance 117 */ 118#define WM8737_DIV2 0x0080 /* DIV2 */ 119#define WM8737_DIV2_MASK 0x0080 /* DIV2 */ 120#define WM8737_DIV2_SHIFT 7 /* DIV2 */ 121#define WM8737_DIV2_WIDTH 1 /* DIV2 */ 122#define WM8737_3DLC 0x0040 /* 3DLC */ 123#define WM8737_3DLC_MASK 0x0040 /* 3DLC */ 124#define WM8737_3DLC_SHIFT 6 /* 3DLC */ 125#define WM8737_3DLC_WIDTH 1 /* 3DLC */ 126#define WM8737_3DUC 0x0020 /* 3DUC */ 127#define WM8737_3DUC_MASK 0x0020 /* 3DUC */ 128#define WM8737_3DUC_SHIFT 5 /* 3DUC */ 129#define WM8737_3DUC_WIDTH 1 /* 3DUC */ 130#define WM8737_3DDEPTH_MASK 0x001E /* 3DDEPTH - [4:1] */ 131#define WM8737_3DDEPTH_SHIFT 1 /* 3DDEPTH - [4:1] */ 132#define WM8737_3DDEPTH_WIDTH 4 /* 3DDEPTH - [4:1] */ 133#define WM8737_3DE 0x0001 /* 3DE */ 134#define WM8737_3DE_MASK 0x0001 /* 3DE */ 135#define WM8737_3DE_SHIFT 0 /* 3DE */ 136#define WM8737_3DE_WIDTH 1 /* 3DE */ 137 138/* 139 * R5 (0x05) - ADC Control 140 */ 141#define WM8737_MONOMIX_MASK 0x0180 /* MONOMIX - [8:7] */ 142#define WM8737_MONOMIX_SHIFT 7 /* MONOMIX - [8:7] */ 143#define WM8737_MONOMIX_WIDTH 2 /* MONOMIX - [8:7] */ 144#define WM8737_POLARITY_MASK 0x0060 /* POLARITY - [6:5] */ 145#define WM8737_POLARITY_SHIFT 5 /* POLARITY - [6:5] */ 146#define WM8737_POLARITY_WIDTH 2 /* POLARITY - [6:5] */ 147#define WM8737_HPOR 0x0010 /* HPOR */ 148#define WM8737_HPOR_MASK 0x0010 /* HPOR */ 149#define WM8737_HPOR_SHIFT 4 /* HPOR */ 150#define WM8737_HPOR_WIDTH 1 /* HPOR */ 151#define WM8737_LP 0x0004 /* LP */ 152#define WM8737_LP_MASK 0x0004 /* LP */ 153#define WM8737_LP_SHIFT 2 /* LP */ 154#define WM8737_LP_WIDTH 1 /* LP */ 155#define WM8737_MONOUT 0x0002 /* MONOUT */ 156#define WM8737_MONOUT_MASK 0x0002 /* MONOUT */ 157#define WM8737_MONOUT_SHIFT 1 /* MONOUT */ 158#define WM8737_MONOUT_WIDTH 1 /* MONOUT */ 159#define WM8737_ADCHPD 0x0001 /* ADCHPD */ 160#define WM8737_ADCHPD_MASK 0x0001 /* ADCHPD */ 161#define WM8737_ADCHPD_SHIFT 0 /* ADCHPD */ 162#define WM8737_ADCHPD_WIDTH 1 /* ADCHPD */ 163 164/* 165 * R6 (0x06) - Power Management 166 */ 167#define WM8737_VMID 0x0100 /* VMID */ 168#define WM8737_VMID_MASK 0x0100 /* VMID */ 169#define WM8737_VMID_SHIFT 8 /* VMID */ 170#define WM8737_VMID_WIDTH 1 /* VMID */ 171#define WM8737_VREF 0x0080 /* VREF */ 172#define WM8737_VREF_MASK 0x0080 /* VREF */ 173#define WM8737_VREF_SHIFT 7 /* VREF */ 174#define WM8737_VREF_WIDTH 1 /* VREF */ 175#define WM8737_AI 0x0040 /* AI */ 176#define WM8737_AI_MASK 0x0040 /* AI */ 177#define WM8737_AI_SHIFT 6 /* AI */ 178#define WM8737_AI_WIDTH 1 /* AI */ 179#define WM8737_PGL 0x0020 /* PGL */ 180#define WM8737_PGL_MASK 0x0020 /* PGL */ 181#define WM8737_PGL_SHIFT 5 /* PGL */ 182#define WM8737_PGL_WIDTH 1 /* PGL */ 183#define WM8737_PGR 0x0010 /* PGR */ 184#define WM8737_PGR_MASK 0x0010 /* PGR */ 185#define WM8737_PGR_SHIFT 4 /* PGR */ 186#define WM8737_PGR_WIDTH 1 /* PGR */ 187#define WM8737_ADL 0x0008 /* ADL */ 188#define WM8737_ADL_MASK 0x0008 /* ADL */ 189#define WM8737_ADL_SHIFT 3 /* ADL */ 190#define WM8737_ADL_WIDTH 1 /* ADL */ 191#define WM8737_ADR 0x0004 /* ADR */ 192#define WM8737_ADR_MASK 0x0004 /* ADR */ 193#define WM8737_ADR_SHIFT 2 /* ADR */ 194#define WM8737_ADR_WIDTH 1 /* ADR */ 195#define WM8737_MICBIAS_MASK 0x0003 /* MICBIAS - [1:0] */ 196#define WM8737_MICBIAS_SHIFT 0 /* MICBIAS - [1:0] */ 197#define WM8737_MICBIAS_WIDTH 2 /* MICBIAS - [1:0] */ 198 199/* 200 * R7 (0x07) - Audio Format 201 */ 202#define WM8737_SDODIS 0x0080 /* SDODIS */ 203#define WM8737_SDODIS_MASK 0x0080 /* SDODIS */ 204#define WM8737_SDODIS_SHIFT 7 /* SDODIS */ 205#define WM8737_SDODIS_WIDTH 1 /* SDODIS */ 206#define WM8737_MS 0x0040 /* MS */ 207#define WM8737_MS_MASK 0x0040 /* MS */ 208#define WM8737_MS_SHIFT 6 /* MS */ 209#define WM8737_MS_WIDTH 1 /* MS */ 210#define WM8737_LRP 0x0010 /* LRP */ 211#define WM8737_LRP_MASK 0x0010 /* LRP */ 212#define WM8737_LRP_SHIFT 4 /* LRP */ 213#define WM8737_LRP_WIDTH 1 /* LRP */ 214#define WM8737_WL_MASK 0x000C /* WL - [3:2] */ 215#define WM8737_WL_SHIFT 2 /* WL - [3:2] */ 216#define WM8737_WL_WIDTH 2 /* WL - [3:2] */ 217#define WM8737_FORMAT_MASK 0x0003 /* FORMAT - [1:0] */ 218#define WM8737_FORMAT_SHIFT 0 /* FORMAT - [1:0] */ 219#define WM8737_FORMAT_WIDTH 2 /* FORMAT - [1:0] */ 220 221/* 222 * R8 (0x08) - Clocking 223 */ 224#define WM8737_AUTODETECT 0x0080 /* AUTODETECT */ 225#define WM8737_AUTODETECT_MASK 0x0080 /* AUTODETECT */ 226#define WM8737_AUTODETECT_SHIFT 7 /* AUTODETECT */ 227#define WM8737_AUTODETECT_WIDTH 1 /* AUTODETECT */ 228#define WM8737_CLKDIV2 0x0040 /* CLKDIV2 */ 229#define WM8737_CLKDIV2_MASK 0x0040 /* CLKDIV2 */ 230#define WM8737_CLKDIV2_SHIFT 6 /* CLKDIV2 */ 231#define WM8737_CLKDIV2_WIDTH 1 /* CLKDIV2 */ 232#define WM8737_SR_MASK 0x003E /* SR - [5:1] */ 233#define WM8737_SR_SHIFT 1 /* SR - [5:1] */ 234#define WM8737_SR_WIDTH 5 /* SR - [5:1] */ 235#define WM8737_USB_MODE 0x0001 /* USB MODE */ 236#define WM8737_USB_MODE_MASK 0x0001 /* USB MODE */ 237#define WM8737_USB_MODE_SHIFT 0 /* USB MODE */ 238#define WM8737_USB_MODE_WIDTH 1 /* USB MODE */ 239 240/* 241 * R9 (0x09) - MIC Preamp Control 242 */ 243#define WM8737_RBYPEN 0x0008 /* RBYPEN */ 244#define WM8737_RBYPEN_MASK 0x0008 /* RBYPEN */ 245#define WM8737_RBYPEN_SHIFT 3 /* RBYPEN */ 246#define WM8737_RBYPEN_WIDTH 1 /* RBYPEN */ 247#define WM8737_LBYPEN 0x0004 /* LBYPEN */ 248#define WM8737_LBYPEN_MASK 0x0004 /* LBYPEN */ 249#define WM8737_LBYPEN_SHIFT 2 /* LBYPEN */ 250#define WM8737_LBYPEN_WIDTH 1 /* LBYPEN */ 251#define WM8737_MBCTRL_MASK 0x0003 /* MBCTRL - [1:0] */ 252#define WM8737_MBCTRL_SHIFT 0 /* MBCTRL - [1:0] */ 253#define WM8737_MBCTRL_WIDTH 2 /* MBCTRL - [1:0] */ 254 255/* 256 * R10 (0x0A) - Misc Bias Control 257 */ 258#define WM8737_VMIDSEL_MASK 0x000C /* VMIDSEL - [3:2] */ 259#define WM8737_VMIDSEL_SHIFT 2 /* VMIDSEL - [3:2] */ 260#define WM8737_VMIDSEL_WIDTH 2 /* VMIDSEL - [3:2] */ 261#define WM8737_LINPUT1_DC_BIAS_ENABLE 0x0002 /* LINPUT1 DC BIAS ENABLE */ 262#define WM8737_LINPUT1_DC_BIAS_ENABLE_MASK 0x0002 /* LINPUT1 DC BIAS ENABLE */ 263#define WM8737_LINPUT1_DC_BIAS_ENABLE_SHIFT 1 /* LINPUT1 DC BIAS ENABLE */ 264#define WM8737_LINPUT1_DC_BIAS_ENABLE_WIDTH 1 /* LINPUT1 DC BIAS ENABLE */ 265#define WM8737_RINPUT1_DC_BIAS_ENABLE 0x0001 /* RINPUT1 DC BIAS ENABLE */ 266#define WM8737_RINPUT1_DC_BIAS_ENABLE_MASK 0x0001 /* RINPUT1 DC BIAS ENABLE */ 267#define WM8737_RINPUT1_DC_BIAS_ENABLE_SHIFT 0 /* RINPUT1 DC BIAS ENABLE */ 268#define WM8737_RINPUT1_DC_BIAS_ENABLE_WIDTH 1 /* RINPUT1 DC BIAS ENABLE */ 269 270/* 271 * R11 (0x0B) - Noise Gate 272 */ 273#define WM8737_NGTH_MASK 0x001C /* NGTH - [4:2] */ 274#define WM8737_NGTH_SHIFT 2 /* NGTH - [4:2] */ 275#define WM8737_NGTH_WIDTH 3 /* NGTH - [4:2] */ 276#define WM8737_NGAT 0x0001 /* NGAT */ 277#define WM8737_NGAT_MASK 0x0001 /* NGAT */ 278#define WM8737_NGAT_SHIFT 0 /* NGAT */ 279#define WM8737_NGAT_WIDTH 1 /* NGAT */ 280 281/* 282 * R12 (0x0C) - ALC1 283 */ 284#define WM8737_ALCSEL_MASK 0x0180 /* ALCSEL - [8:7] */ 285#define WM8737_ALCSEL_SHIFT 7 /* ALCSEL - [8:7] */ 286#define WM8737_ALCSEL_WIDTH 2 /* ALCSEL - [8:7] */ 287#define WM8737_MAX_GAIN_MASK 0x0070 /* MAX GAIN - [6:4] */ 288#define WM8737_MAX_GAIN_SHIFT 4 /* MAX GAIN - [6:4] */ 289#define WM8737_MAX_GAIN_WIDTH 3 /* MAX GAIN - [6:4] */ 290#define WM8737_ALCL_MASK 0x000F /* ALCL - [3:0] */ 291#define WM8737_ALCL_SHIFT 0 /* ALCL - [3:0] */ 292#define WM8737_ALCL_WIDTH 4 /* ALCL - [3:0] */ 293 294/* 295 * R13 (0x0D) - ALC2 296 */ 297#define WM8737_ALCZCE 0x0010 /* ALCZCE */ 298#define WM8737_ALCZCE_MASK 0x0010 /* ALCZCE */ 299#define WM8737_ALCZCE_SHIFT 4 /* ALCZCE */ 300#define WM8737_ALCZCE_WIDTH 1 /* ALCZCE */ 301#define WM8737_HLD_MASK 0x000F /* HLD - [3:0] */ 302#define WM8737_HLD_SHIFT 0 /* HLD - [3:0] */ 303#define WM8737_HLD_WIDTH 4 /* HLD - [3:0] */ 304 305/* 306 * R14 (0x0E) - ALC3 307 */ 308#define WM8737_DCY_MASK 0x00F0 /* DCY - [7:4] */ 309#define WM8737_DCY_SHIFT 4 /* DCY - [7:4] */ 310#define WM8737_DCY_WIDTH 4 /* DCY - [7:4] */ 311#define WM8737_ATK_MASK 0x000F /* ATK - [3:0] */ 312#define WM8737_ATK_SHIFT 0 /* ATK - [3:0] */ 313#define WM8737_ATK_WIDTH 4 /* ATK - [3:0] */ 314 315/* 316 * R15 (0x0F) - Reset 317 */ 318#define WM8737_RESET_MASK 0x01FF /* RESET - [8:0] */ 319#define WM8737_RESET_SHIFT 0 /* RESET - [8:0] */ 320#define WM8737_RESET_WIDTH 9 /* RESET - [8:0] */ 321 322#endif 323