1/*
2 * siu_pcm.c - ALSA driver for Renesas SH7343, SH7722 SIU peripheral.
3 *
4 * Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 * Copyright (C) 2006 Carlos Munoz <carlos@kenati.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21#include <linux/delay.h>
22#include <linux/dma-mapping.h>
23#include <linux/dmaengine.h>
24#include <linux/interrupt.h>
25#include <linux/module.h>
26#include <linux/platform_device.h>
27
28#include <sound/control.h>
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/pcm_params.h>
32#include <sound/soc.h>
33
34#include <asm/siu.h>
35
36#include "siu.h"
37
38#define GET_MAX_PERIODS(buf_bytes, period_bytes) \
39				((buf_bytes) / (period_bytes))
40#define PERIOD_OFFSET(buf_addr, period_num, period_bytes) \
41				((buf_addr) + ((period_num) * (period_bytes)))
42
43#define RWF_STM_RD		0x01		/* Read in progress */
44#define RWF_STM_WT		0x02		/* Write in progress */
45
46struct siu_port *siu_ports[SIU_PORT_NUM];
47
48/* transfersize is number of u32 dma transfers per period */
49static int siu_pcm_stmwrite_stop(struct siu_port *port_info)
50{
51	struct siu_info *info = siu_i2s_data;
52	u32 __iomem *base = info->reg;
53	struct siu_stream *siu_stream = &port_info->playback;
54	u32 stfifo;
55
56	if (!siu_stream->rw_flg)
57		return -EPERM;
58
59	/* output FIFO disable */
60	stfifo = siu_read32(base + SIU_STFIFO);
61	siu_write32(base + SIU_STFIFO, stfifo & ~0x0c180c18);
62	pr_debug("%s: STFIFO %x -> %x\n", __func__,
63		 stfifo, stfifo & ~0x0c180c18);
64
65	/* during stmwrite clear */
66	siu_stream->rw_flg = 0;
67
68	return 0;
69}
70
71static int siu_pcm_stmwrite_start(struct siu_port *port_info)
72{
73	struct siu_stream *siu_stream = &port_info->playback;
74
75	if (siu_stream->rw_flg)
76		return -EPERM;
77
78	/* Current period in buffer */
79	port_info->playback.cur_period = 0;
80
81	/* during stmwrite flag set */
82	siu_stream->rw_flg = RWF_STM_WT;
83
84	/* DMA transfer start */
85	tasklet_schedule(&siu_stream->tasklet);
86
87	return 0;
88}
89
90static void siu_dma_tx_complete(void *arg)
91{
92	struct siu_stream *siu_stream = arg;
93
94	if (!siu_stream->rw_flg)
95		return;
96
97	/* Update completed period count */
98	if (++siu_stream->cur_period >=
99	    GET_MAX_PERIODS(siu_stream->buf_bytes,
100			    siu_stream->period_bytes))
101		siu_stream->cur_period = 0;
102
103	pr_debug("%s: done period #%d (%u/%u bytes), cookie %d\n",
104		__func__, siu_stream->cur_period,
105		siu_stream->cur_period * siu_stream->period_bytes,
106		siu_stream->buf_bytes, siu_stream->cookie);
107
108	tasklet_schedule(&siu_stream->tasklet);
109
110	/* Notify alsa: a period is done */
111	snd_pcm_period_elapsed(siu_stream->substream);
112}
113
114static int siu_pcm_wr_set(struct siu_port *port_info,
115			  dma_addr_t buff, u32 size)
116{
117	struct siu_info *info = siu_i2s_data;
118	u32 __iomem *base = info->reg;
119	struct siu_stream *siu_stream = &port_info->playback;
120	struct snd_pcm_substream *substream = siu_stream->substream;
121	struct device *dev = substream->pcm->card->dev;
122	struct dma_async_tx_descriptor *desc;
123	dma_cookie_t cookie;
124	struct scatterlist sg;
125	u32 stfifo;
126
127	sg_init_table(&sg, 1);
128	sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
129		    size, offset_in_page(buff));
130	sg_dma_len(&sg) = size;
131	sg_dma_address(&sg) = buff;
132
133	desc = dmaengine_prep_slave_sg(siu_stream->chan,
134		&sg, 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
135	if (!desc) {
136		dev_err(dev, "Failed to allocate a dma descriptor\n");
137		return -ENOMEM;
138	}
139
140	desc->callback = siu_dma_tx_complete;
141	desc->callback_param = siu_stream;
142	cookie = dmaengine_submit(desc);
143	if (cookie < 0) {
144		dev_err(dev, "Failed to submit a dma transfer\n");
145		return cookie;
146	}
147
148	siu_stream->tx_desc = desc;
149	siu_stream->cookie = cookie;
150
151	dma_async_issue_pending(siu_stream->chan);
152
153	/* only output FIFO enable */
154	stfifo = siu_read32(base + SIU_STFIFO);
155	siu_write32(base + SIU_STFIFO, stfifo | (port_info->stfifo & 0x0c180c18));
156	dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
157		stfifo, stfifo | (port_info->stfifo & 0x0c180c18));
158
159	return 0;
160}
161
162static int siu_pcm_rd_set(struct siu_port *port_info,
163			  dma_addr_t buff, size_t size)
164{
165	struct siu_info *info = siu_i2s_data;
166	u32 __iomem *base = info->reg;
167	struct siu_stream *siu_stream = &port_info->capture;
168	struct snd_pcm_substream *substream = siu_stream->substream;
169	struct device *dev = substream->pcm->card->dev;
170	struct dma_async_tx_descriptor *desc;
171	dma_cookie_t cookie;
172	struct scatterlist sg;
173	u32 stfifo;
174
175	dev_dbg(dev, "%s: %u@%llx\n", __func__, size, (unsigned long long)buff);
176
177	sg_init_table(&sg, 1);
178	sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
179		    size, offset_in_page(buff));
180	sg_dma_len(&sg) = size;
181	sg_dma_address(&sg) = buff;
182
183	desc = dmaengine_prep_slave_sg(siu_stream->chan,
184		&sg, 1, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
185	if (!desc) {
186		dev_err(dev, "Failed to allocate dma descriptor\n");
187		return -ENOMEM;
188	}
189
190	desc->callback = siu_dma_tx_complete;
191	desc->callback_param = siu_stream;
192	cookie = dmaengine_submit(desc);
193	if (cookie < 0) {
194		dev_err(dev, "Failed to submit dma descriptor\n");
195		return cookie;
196	}
197
198	siu_stream->tx_desc = desc;
199	siu_stream->cookie = cookie;
200
201	dma_async_issue_pending(siu_stream->chan);
202
203	/* only input FIFO enable */
204	stfifo = siu_read32(base + SIU_STFIFO);
205	siu_write32(base + SIU_STFIFO, siu_read32(base + SIU_STFIFO) |
206		    (port_info->stfifo & 0x13071307));
207	dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
208		stfifo, stfifo | (port_info->stfifo & 0x13071307));
209
210	return 0;
211}
212
213static void siu_io_tasklet(unsigned long data)
214{
215	struct siu_stream *siu_stream = (struct siu_stream *)data;
216	struct snd_pcm_substream *substream = siu_stream->substream;
217	struct device *dev = substream->pcm->card->dev;
218	struct snd_pcm_runtime *rt = substream->runtime;
219	struct siu_port *port_info = siu_port_info(substream);
220
221	dev_dbg(dev, "%s: flags %x\n", __func__, siu_stream->rw_flg);
222
223	if (!siu_stream->rw_flg) {
224		dev_dbg(dev, "%s: stream inactive\n", __func__);
225		return;
226	}
227
228	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
229		dma_addr_t buff;
230		size_t count;
231		u8 *virt;
232
233		buff = (dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
234						siu_stream->cur_period,
235						siu_stream->period_bytes);
236		virt = PERIOD_OFFSET(rt->dma_area,
237				     siu_stream->cur_period,
238				     siu_stream->period_bytes);
239		count = siu_stream->period_bytes;
240
241		/* DMA transfer start */
242		siu_pcm_rd_set(port_info, buff, count);
243	} else {
244		siu_pcm_wr_set(port_info,
245			       (dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
246						siu_stream->cur_period,
247						siu_stream->period_bytes),
248			       siu_stream->period_bytes);
249	}
250}
251
252/* Capture */
253static int siu_pcm_stmread_start(struct siu_port *port_info)
254{
255	struct siu_stream *siu_stream = &port_info->capture;
256
257	if (siu_stream->xfer_cnt > 0x1000000)
258		return -EINVAL;
259	if (siu_stream->rw_flg)
260		return -EPERM;
261
262	/* Current period in buffer */
263	siu_stream->cur_period = 0;
264
265	/* during stmread flag set */
266	siu_stream->rw_flg = RWF_STM_RD;
267
268	tasklet_schedule(&siu_stream->tasklet);
269
270	return 0;
271}
272
273static int siu_pcm_stmread_stop(struct siu_port *port_info)
274{
275	struct siu_info *info = siu_i2s_data;
276	u32 __iomem *base = info->reg;
277	struct siu_stream *siu_stream = &port_info->capture;
278	struct device *dev = siu_stream->substream->pcm->card->dev;
279	u32 stfifo;
280
281	if (!siu_stream->rw_flg)
282		return -EPERM;
283
284	/* input FIFO disable */
285	stfifo = siu_read32(base + SIU_STFIFO);
286	siu_write32(base + SIU_STFIFO, stfifo & ~0x13071307);
287	dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
288		stfifo, stfifo & ~0x13071307);
289
290	/* during stmread flag clear */
291	siu_stream->rw_flg = 0;
292
293	return 0;
294}
295
296static int siu_pcm_hw_params(struct snd_pcm_substream *ss,
297			     struct snd_pcm_hw_params *hw_params)
298{
299	struct siu_info *info = siu_i2s_data;
300	struct device *dev = ss->pcm->card->dev;
301	int ret;
302
303	dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);
304
305	ret = snd_pcm_lib_malloc_pages(ss, params_buffer_bytes(hw_params));
306	if (ret < 0)
307		dev_err(dev, "snd_pcm_lib_malloc_pages() failed\n");
308
309	return ret;
310}
311
312static int siu_pcm_hw_free(struct snd_pcm_substream *ss)
313{
314	struct siu_info *info = siu_i2s_data;
315	struct siu_port	*port_info = siu_port_info(ss);
316	struct device *dev = ss->pcm->card->dev;
317	struct siu_stream *siu_stream;
318
319	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
320		siu_stream = &port_info->playback;
321	else
322		siu_stream = &port_info->capture;
323
324	dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);
325
326	return snd_pcm_lib_free_pages(ss);
327}
328
329static bool filter(struct dma_chan *chan, void *slave)
330{
331	struct sh_dmae_slave *param = slave;
332
333	pr_debug("%s: slave ID %d\n", __func__, param->shdma_slave.slave_id);
334
335	chan->private = &param->shdma_slave;
336	return true;
337}
338
339static int siu_pcm_open(struct snd_pcm_substream *ss)
340{
341	/* Playback / Capture */
342	struct snd_soc_pcm_runtime *rtd = ss->private_data;
343	struct siu_platform *pdata = rtd->platform->dev->platform_data;
344	struct siu_info *info = siu_i2s_data;
345	struct siu_port *port_info = siu_port_info(ss);
346	struct siu_stream *siu_stream;
347	u32 port = info->port_id;
348	struct device *dev = ss->pcm->card->dev;
349	dma_cap_mask_t mask;
350	struct sh_dmae_slave *param;
351
352	dma_cap_zero(mask);
353	dma_cap_set(DMA_SLAVE, mask);
354
355	dev_dbg(dev, "%s, port=%d@%p\n", __func__, port, port_info);
356
357	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK) {
358		siu_stream = &port_info->playback;
359		param = &siu_stream->param;
360		param->shdma_slave.slave_id = port ? pdata->dma_slave_tx_b :
361			pdata->dma_slave_tx_a;
362	} else {
363		siu_stream = &port_info->capture;
364		param = &siu_stream->param;
365		param->shdma_slave.slave_id = port ? pdata->dma_slave_rx_b :
366			pdata->dma_slave_rx_a;
367	}
368
369	/* Get DMA channel */
370	siu_stream->chan = dma_request_channel(mask, filter, param);
371	if (!siu_stream->chan) {
372		dev_err(dev, "DMA channel allocation failed!\n");
373		return -EBUSY;
374	}
375
376	siu_stream->substream = ss;
377
378	return 0;
379}
380
381static int siu_pcm_close(struct snd_pcm_substream *ss)
382{
383	struct siu_info *info = siu_i2s_data;
384	struct device *dev = ss->pcm->card->dev;
385	struct siu_port *port_info = siu_port_info(ss);
386	struct siu_stream *siu_stream;
387
388	dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);
389
390	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
391		siu_stream = &port_info->playback;
392	else
393		siu_stream = &port_info->capture;
394
395	dma_release_channel(siu_stream->chan);
396	siu_stream->chan = NULL;
397
398	siu_stream->substream = NULL;
399
400	return 0;
401}
402
403static int siu_pcm_prepare(struct snd_pcm_substream *ss)
404{
405	struct siu_info *info = siu_i2s_data;
406	struct siu_port *port_info = siu_port_info(ss);
407	struct device *dev = ss->pcm->card->dev;
408	struct snd_pcm_runtime 	*rt = ss->runtime;
409	struct siu_stream *siu_stream;
410	snd_pcm_sframes_t xfer_cnt;
411
412	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
413		siu_stream = &port_info->playback;
414	else
415		siu_stream = &port_info->capture;
416
417	rt = siu_stream->substream->runtime;
418
419	siu_stream->buf_bytes = snd_pcm_lib_buffer_bytes(ss);
420	siu_stream->period_bytes = snd_pcm_lib_period_bytes(ss);
421
422	dev_dbg(dev, "%s: port=%d, %d channels, period=%u bytes\n", __func__,
423		info->port_id, rt->channels, siu_stream->period_bytes);
424
425	/* We only support buffers that are multiples of the period */
426	if (siu_stream->buf_bytes % siu_stream->period_bytes) {
427		dev_err(dev, "%s() - buffer=%d not multiple of period=%d\n",
428		       __func__, siu_stream->buf_bytes,
429		       siu_stream->period_bytes);
430		return -EINVAL;
431	}
432
433	xfer_cnt = bytes_to_frames(rt, siu_stream->period_bytes);
434	if (!xfer_cnt || xfer_cnt > 0x1000000)
435		return -EINVAL;
436
437	siu_stream->format = rt->format;
438	siu_stream->xfer_cnt = xfer_cnt;
439
440	dev_dbg(dev, "port=%d buf=%lx buf_bytes=%d period_bytes=%d "
441		"format=%d channels=%d xfer_cnt=%d\n", info->port_id,
442		(unsigned long)rt->dma_addr, siu_stream->buf_bytes,
443		siu_stream->period_bytes,
444		siu_stream->format, rt->channels, (int)xfer_cnt);
445
446	return 0;
447}
448
449static int siu_pcm_trigger(struct snd_pcm_substream *ss, int cmd)
450{
451	struct siu_info *info = siu_i2s_data;
452	struct device *dev = ss->pcm->card->dev;
453	struct siu_port *port_info = siu_port_info(ss);
454	int ret;
455
456	dev_dbg(dev, "%s: port=%d@%p, cmd=%d\n", __func__,
457		info->port_id, port_info, cmd);
458
459	switch (cmd) {
460	case SNDRV_PCM_TRIGGER_START:
461		if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
462			ret = siu_pcm_stmwrite_start(port_info);
463		else
464			ret = siu_pcm_stmread_start(port_info);
465
466		if (ret < 0)
467			dev_warn(dev, "%s: start failed on port=%d\n",
468				 __func__, info->port_id);
469
470		break;
471	case SNDRV_PCM_TRIGGER_STOP:
472		if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
473			siu_pcm_stmwrite_stop(port_info);
474		else
475			siu_pcm_stmread_stop(port_info);
476		ret = 0;
477
478		break;
479	default:
480		dev_err(dev, "%s() unsupported cmd=%d\n", __func__, cmd);
481		ret = -EINVAL;
482	}
483
484	return ret;
485}
486
487/*
488 * So far only resolution of one period is supported, subject to extending the
489 * dmangine API
490 */
491static snd_pcm_uframes_t siu_pcm_pointer_dma(struct snd_pcm_substream *ss)
492{
493	struct device *dev = ss->pcm->card->dev;
494	struct siu_info *info = siu_i2s_data;
495	u32 __iomem *base = info->reg;
496	struct siu_port *port_info = siu_port_info(ss);
497	struct snd_pcm_runtime *rt = ss->runtime;
498	size_t ptr;
499	struct siu_stream *siu_stream;
500
501	if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
502		siu_stream = &port_info->playback;
503	else
504		siu_stream = &port_info->capture;
505
506	/*
507	 * ptr is the offset into the buffer where the dma is currently at. We
508	 * check if the dma buffer has just wrapped.
509	 */
510	ptr = PERIOD_OFFSET(rt->dma_addr,
511			    siu_stream->cur_period,
512			    siu_stream->period_bytes) - rt->dma_addr;
513
514	dev_dbg(dev,
515		"%s: port=%d, events %x, FSTS %x, xferred %u/%u, cookie %d\n",
516		__func__, info->port_id, siu_read32(base + SIU_EVNTC),
517		siu_read32(base + SIU_SBFSTS), ptr, siu_stream->buf_bytes,
518		siu_stream->cookie);
519
520	if (ptr >= siu_stream->buf_bytes)
521		ptr = 0;
522
523	return bytes_to_frames(ss->runtime, ptr);
524}
525
526static int siu_pcm_new(struct snd_soc_pcm_runtime *rtd)
527{
528	/* card->dev == socdev->dev, see snd_soc_new_pcms() */
529	struct snd_card *card = rtd->card->snd_card;
530	struct snd_pcm *pcm = rtd->pcm;
531	struct siu_info *info = siu_i2s_data;
532	struct platform_device *pdev = to_platform_device(card->dev);
533	int ret;
534	int i;
535
536	/* pdev->id selects between SIUA and SIUB */
537	if (pdev->id < 0 || pdev->id >= SIU_PORT_NUM)
538		return -EINVAL;
539
540	info->port_id = pdev->id;
541
542	/*
543	 * While the siu has 2 ports, only one port can be on at a time (only 1
544	 * SPB). So far all the boards using the siu had only one of the ports
545	 * wired to a codec. To simplify things, we only register one port with
546	 * alsa. In case both ports are needed, it should be changed here
547	 */
548	for (i = pdev->id; i < pdev->id + 1; i++) {
549		struct siu_port **port_info = &siu_ports[i];
550
551		ret = siu_init_port(i, port_info, card);
552		if (ret < 0)
553			return ret;
554
555		ret = snd_pcm_lib_preallocate_pages_for_all(pcm,
556				SNDRV_DMA_TYPE_DEV, NULL,
557				SIU_BUFFER_BYTES_MAX, SIU_BUFFER_BYTES_MAX);
558		if (ret < 0) {
559			dev_err(card->dev,
560			       "snd_pcm_lib_preallocate_pages_for_all() err=%d",
561				ret);
562			goto fail;
563		}
564
565		(*port_info)->pcm = pcm;
566
567		/* IO tasklets */
568		tasklet_init(&(*port_info)->playback.tasklet, siu_io_tasklet,
569			     (unsigned long)&(*port_info)->playback);
570		tasklet_init(&(*port_info)->capture.tasklet, siu_io_tasklet,
571			     (unsigned long)&(*port_info)->capture);
572	}
573
574	dev_info(card->dev, "SuperH SIU driver initialized.\n");
575	return 0;
576
577fail:
578	siu_free_port(siu_ports[pdev->id]);
579	dev_err(card->dev, "SIU: failed to initialize.\n");
580	return ret;
581}
582
583static void siu_pcm_free(struct snd_pcm *pcm)
584{
585	struct platform_device *pdev = to_platform_device(pcm->card->dev);
586	struct siu_port *port_info = siu_ports[pdev->id];
587
588	tasklet_kill(&port_info->capture.tasklet);
589	tasklet_kill(&port_info->playback.tasklet);
590
591	siu_free_port(port_info);
592
593	dev_dbg(pcm->card->dev, "%s\n", __func__);
594}
595
596static struct snd_pcm_ops siu_pcm_ops = {
597	.open		= siu_pcm_open,
598	.close		= siu_pcm_close,
599	.ioctl		= snd_pcm_lib_ioctl,
600	.hw_params	= siu_pcm_hw_params,
601	.hw_free	= siu_pcm_hw_free,
602	.prepare	= siu_pcm_prepare,
603	.trigger	= siu_pcm_trigger,
604	.pointer	= siu_pcm_pointer_dma,
605};
606
607struct snd_soc_platform_driver siu_platform = {
608	.ops			= &siu_pcm_ops,
609	.pcm_new	= siu_pcm_new,
610	.pcm_free	= siu_pcm_free,
611};
612EXPORT_SYMBOL_GPL(siu_platform);
613