PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 22861 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT                                                                   0x0
PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 15464 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT                                                                   0x0
PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 16795 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT                                                                   0x0
PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 16667 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT                                                                   0x0
PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 5691 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 0x00000000
PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 5630 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 0x0
PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 6418 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 0x0
PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 6952 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define PA_CL_UCP_2_Y__DATA_REGISTER__SHIFT 0x0