BIT                 7 arch/arm/mach-davinci/sleep.S #define BIT(nr)			(1 << (nr))
BIT                24 arch/arm/mach-omap2/sleep33xx.S #define BIT(nr)			(1 << (nr))
BIT                26 arch/arm/mach-omap2/sleep43xx.S #define BIT(nr)			(1 << (nr))
BIT               121 drivers/auxdisplay/img-ascii-lcd.c #define SEAD3_REG_LCD_CTRL_SETDRAM	BIT(7)
BIT               124 drivers/auxdisplay/img-ascii-lcd.c #define SEAD3_REG_CPLD_STATUS_BUSY	BIT(0)
BIT               126 drivers/auxdisplay/img-ascii-lcd.c #define SEAD3_REG_CPLD_DATA_BUSY	BIT(7)
BIT               301 drivers/gpu/drm/i915/gem/i915_gem_object.h #define I915_MAP_OVERRIDE BIT(31)
BIT                18 drivers/power/reset/piix4-poweroff.c #define PIIX4_FUNC3IO_PMSTS_PWRBTN_STS		BIT(8)
BIT                20 drivers/power/reset/piix4-poweroff.c #define PIIX4_FUNC3IO_PMCNTRL_SUS_EN		BIT(13)
BIT                14 drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c #define BIT(x)  (1UL << (x))
BIT                83 drivers/staging/rtl8192u/r8192U_hw.h #define TCR_SAT			BIT(24)	// Enable Rate depedent ack timeout timer
BIT                85 drivers/staging/rtl8192u/r8192U_hw.h #define MAC_FILTER_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(5) | \
BIT                85 drivers/staging/rtl8192u/r8192U_hw.h #define MAC_FILTER_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(5) | \
BIT                85 drivers/staging/rtl8192u/r8192U_hw.h #define MAC_FILTER_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(5) | \
BIT                85 drivers/staging/rtl8192u/r8192U_hw.h #define MAC_FILTER_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(5) | \
BIT                85 drivers/staging/rtl8192u/r8192U_hw.h #define MAC_FILTER_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(5) | \
BIT                86 drivers/staging/rtl8192u/r8192U_hw.h 			 BIT(12) | BIT(18) | BIT(19) | BIT(20) | BIT(21) | \
BIT                86 drivers/staging/rtl8192u/r8192U_hw.h 			 BIT(12) | BIT(18) | BIT(19) | BIT(20) | BIT(21) | \
BIT                86 drivers/staging/rtl8192u/r8192U_hw.h 			 BIT(12) | BIT(18) | BIT(19) | BIT(20) | BIT(21) | \
BIT                86 drivers/staging/rtl8192u/r8192U_hw.h 			 BIT(12) | BIT(18) | BIT(19) | BIT(20) | BIT(21) | \
BIT                86 drivers/staging/rtl8192u/r8192U_hw.h 			 BIT(12) | BIT(18) | BIT(19) | BIT(20) | BIT(21) | \
BIT                87 drivers/staging/rtl8192u/r8192U_hw.h 			 BIT(22) | BIT(23))
BIT                87 drivers/staging/rtl8192u/r8192U_hw.h 			 BIT(22) | BIT(23))
BIT                88 drivers/staging/rtl8192u/r8192U_hw.h #define RX_FIFO_THRESHOLD_MASK (BIT(13) | BIT(14) | BIT(15))
BIT                88 drivers/staging/rtl8192u/r8192U_hw.h #define RX_FIFO_THRESHOLD_MASK (BIT(13) | BIT(14) | BIT(15))
BIT                88 drivers/staging/rtl8192u/r8192U_hw.h #define RX_FIFO_THRESHOLD_MASK (BIT(13) | BIT(14) | BIT(15))
BIT                91 drivers/staging/rtl8192u/r8192U_hw.h #define MAX_RX_DMA_MASK 	(BIT(8) | BIT(9) | BIT(10))
BIT                91 drivers/staging/rtl8192u/r8192U_hw.h #define MAX_RX_DMA_MASK 	(BIT(8) | BIT(9) | BIT(10))
BIT                91 drivers/staging/rtl8192u/r8192U_hw.h #define MAX_RX_DMA_MASK 	(BIT(8) | BIT(9) | BIT(10))
BIT                94 drivers/staging/rtl8192u/r8192U_hw.h #define RCR_ONLYERLPKT		BIT(31)			// Early Receiving based on Packet Size.
BIT                95 drivers/staging/rtl8192u/r8192U_hw.h #define RCR_CBSSID		BIT(23)			// Accept BSSID match packet
BIT                96 drivers/staging/rtl8192u/r8192U_hw.h #define RCR_APWRMGT		BIT(22)			// Accept power management packet
BIT                97 drivers/staging/rtl8192u/r8192U_hw.h #define RCR_AMF			BIT(20)			// Accept management type frame
BIT                98 drivers/staging/rtl8192u/r8192U_hw.h #define RCR_ACF			BIT(19)			// Accept control type frame
BIT                99 drivers/staging/rtl8192u/r8192U_hw.h #define RCR_ADF			BIT(18)			// Accept data type frame
BIT               100 drivers/staging/rtl8192u/r8192U_hw.h #define RCR_AICV		BIT(12)			// Accept ICV error packet
BIT               101 drivers/staging/rtl8192u/r8192U_hw.h #define	RCR_ACRC32		BIT(5)			// Accept CRC32 error packet
BIT               102 drivers/staging/rtl8192u/r8192U_hw.h #define	RCR_AB			BIT(3)			// Accept broadcast packet
BIT               103 drivers/staging/rtl8192u/r8192U_hw.h #define	RCR_AM			BIT(2)			// Accept multicast packet
BIT               104 drivers/staging/rtl8192u/r8192U_hw.h #define	RCR_APM			BIT(1)			// Accept physical match packet
BIT               105 drivers/staging/rtl8192u/r8192U_hw.h #define	RCR_AAP			BIT(0)			// Accept all unicast packet
BIT               123 drivers/staging/rtl8192u/r8192U_hw.h #define	SCR_TxUseDK		BIT(0)			//Force Tx Use Default Key
BIT               124 drivers/staging/rtl8192u/r8192U_hw.h #define SCR_RxUseDK		BIT(1)			//Force Rx Use Default Key
BIT               125 drivers/staging/rtl8192u/r8192U_hw.h #define SCR_TxEncEnable		BIT(2)			//Enable Tx Encryption
BIT               126 drivers/staging/rtl8192u/r8192U_hw.h #define SCR_RxDecEnable		BIT(3)			//Enable Rx Decryption
BIT               127 drivers/staging/rtl8192u/r8192U_hw.h #define SCR_SKByA2		BIT(4)			//Search kEY BY A2
BIT               128 drivers/staging/rtl8192u/r8192U_hw.h #define SCR_NoSKMC		BIT(5)			//No Key Search for Multicast
BIT               151 drivers/staging/rtl8192u/r8192U_hw.h #define AcmHw_BeqEn             BIT(1)
BIT               158 drivers/staging/rtl8192u/r8192U_hw.h #define	BW_OPMODE_5G			BIT(1)
BIT               159 drivers/staging/rtl8192u/r8192U_hw.h #define	BW_OPMODE_20MHZ			BIT(2)
BIT               162 drivers/staging/rtl8192u/r8192U_hw.h #define MSR_LINK_MASK      (BIT(0)|BIT(1))
BIT               162 drivers/staging/rtl8192u/r8192U_hw.h #define MSR_LINK_MASK      (BIT(0)|BIT(1))
BIT               172 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_1M						BIT(0)
BIT               173 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_2M						BIT(1)
BIT               174 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_5_5M					BIT(2)
BIT               175 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_11M					BIT(3)
BIT               176 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_6M						BIT(4)
BIT               177 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_9M						BIT(5)
BIT               178 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_12M					BIT(6)
BIT               179 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_18M					BIT(7)
BIT               180 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_24M					BIT(8)
BIT               181 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_36M					BIT(9)
BIT               182 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_48M					BIT(10)
BIT               183 drivers/staging/rtl8192u/r8192U_hw.h #define RRSR_54M					BIT(11)
BIT               184 drivers/staging/rtl8192u/r8192U_hw.h #define BRSR_AckShortPmb			BIT(23)		// CCK ACK: use Short Preamble or not.
BIT               233 drivers/staging/rtl8192u/r8192U_hw.h #define Cmd9346CR_9356SEL	BIT(4)
BIT               237 drivers/staging/rtl8192u/r8192U_hw.h #define EPROM_CS_BIT BIT(3)
BIT               238 drivers/staging/rtl8192u/r8192U_hw.h #define EPROM_CK_BIT BIT(2)
BIT               239 drivers/staging/rtl8192u/r8192U_hw.h #define EPROM_W_BIT  BIT(1)
BIT               240 drivers/staging/rtl8192u/r8192U_hw.h #define EPROM_R_BIT  BIT(0)
BIT                18 drivers/staging/rtl8723bs/include/osdep_service.h 	#define BIT(x)	(1 << (x))
BIT                13 drivers/staging/rtl8723bs/include/wifi.h #undef BIT
BIT                15 drivers/staging/rtl8723bs/include/wifi.h #define BIT(x)	(1 << (x))
BIT               827 drivers/usb/gadget/udc/net2280.c 		BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
BIT                 8 include/linux/bits.h #define BIT(nr)			(UL(1) << (nr))
BIT               147 include/linux/mfd/rohm-bd70528.h #define BD70528_INT_SHDN_MASK BIT(BD70528_INT_SHDN)
BIT               149 include/linux/mfd/rohm-bd70528.h #define BD70528_INT_PWR_FLT_MASK BIT(BD70528_INT_PWR_FLT)
BIT               151 include/linux/mfd/rohm-bd70528.h #define BD70528_INT_VR_FLT_MASK BIT(BD70528_INT_VR_FLT)
BIT               153 include/linux/mfd/rohm-bd70528.h #define BD70528_INT_MISC_MASK BIT(BD70528_INT_MISC)
BIT               155 include/linux/mfd/rohm-bd70528.h #define BD70528_INT_BAT1_MASK BIT(BD70528_INT_BAT1)
BIT               157 include/linux/mfd/rohm-bd70528.h #define BD70528_INT_RTC_MASK BIT(BD70528_INT_RTC)
BIT               159 include/linux/mfd/rohm-bd70528.h #define BD70528_INT_GPIO_MASK BIT(BD70528_INT_GPIO)
BIT               161 include/linux/mfd/rohm-bd70528.h #define BD70528_INT_OP_FAIL_MASK BIT(BD70528_INT_OP_FAIL)
BIT               861 include/soc/fsl/qman.h 	qm_mcr_fqd_link_mask = BIT(24) - 1,
BIT               862 include/soc/fsl/qman.h 	qm_mcr_odp_seq_mask = BIT(14) - 1,
BIT               863 include/soc/fsl/qman.h 	qm_mcr_orp_nesn_mask = BIT(14) - 1,
BIT               864 include/soc/fsl/qman.h 	qm_mcr_orp_ea_hseq_mask = BIT(15) - 1,
BIT               865 include/soc/fsl/qman.h 	qm_mcr_orp_ea_tseq_mask = BIT(15) - 1,
BIT               866 include/soc/fsl/qman.h 	qm_mcr_orp_ea_hptr_mask = BIT(24) - 1,
BIT               867 include/soc/fsl/qman.h 	qm_mcr_orp_ea_tptr_mask = BIT(24) - 1,
BIT               868 include/soc/fsl/qman.h 	qm_mcr_pfdr_hptr_mask = BIT(24) - 1,
BIT               869 include/soc/fsl/qman.h 	qm_mcr_pfdr_tptr_mask = BIT(24) - 1,
BIT               870 include/soc/fsl/qman.h 	qm_mcr_is_mask = BIT(1) - 1,
BIT               871 include/soc/fsl/qman.h 	qm_mcr_frm_cnt_mask = BIT(24) - 1,
BIT                 8 tools/include/linux/bits.h #define BIT(nr)			(UL(1) << (nr))
BIT               463 tools/perf/arch/arm/util/cs-etm.c #define BIT(N) (1UL << (N))
BIT               736 tools/perf/bench/numa.c #define BIT(x) (1ul << x)
BIT                14 tools/perf/util/arm-spe-pkt-decoder.c #define BIT(n)		(1ULL << (n))
BIT                15 tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c #define BIT(n)		(1 << (n))
BIT                31 tools/power/x86/intel-speed-select/isst.h #define BIT(x) (1 << (x))
BIT                96 tools/vm/page-types.c #define BIT(name)		(1ULL << KPF_##name)