MC_REGISTERS_TABLE_106__data_5_value_8__SHIFT 3492 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define MC_REGISTERS_TABLE_106__data_5_value_8__SHIFT 0x0
MC_REGISTERS_TABLE_106__data_5_value_8__SHIFT 3490 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define MC_REGISTERS_TABLE_106__data_5_value_8__SHIFT 0x0