MC_REGISTERS_TABLE_13__address_11_s1__SHIFT 3296 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define MC_REGISTERS_TABLE_13__address_11_s1__SHIFT 0x0
MC_REGISTERS_TABLE_13__address_11_s1__SHIFT 3294 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define MC_REGISTERS_TABLE_13__address_11_s1__SHIFT 0x0
MC_REGISTERS_TABLE_13__address_11_s1__SHIFT 1316 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define MC_REGISTERS_TABLE_13__address_11_s1__SHIFT 0x0
MC_REGISTERS_TABLE_13__address_11_s1__SHIFT 3520 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define MC_REGISTERS_TABLE_13__address_11_s1__SHIFT 0x0