MC_REGISTERS_TABLE_1__reserved_1_MASK 3245 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define MC_REGISTERS_TABLE_1__reserved_1_MASK 0xff00
MC_REGISTERS_TABLE_1__reserved_1_MASK 3243 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define MC_REGISTERS_TABLE_1__reserved_1_MASK 0xff00
MC_REGISTERS_TABLE_1__reserved_1_MASK 1265 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define MC_REGISTERS_TABLE_1__reserved_1_MASK 0xff00
MC_REGISTERS_TABLE_1__reserved_1_MASK 3469 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define MC_REGISTERS_TABLE_1__reserved_1_MASK 0xff00