MC_REGISTERS_TABLE_51__data_2_value_1__SHIFT 3382 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define MC_REGISTERS_TABLE_51__data_2_value_1__SHIFT 0x0
MC_REGISTERS_TABLE_51__data_2_value_1__SHIFT 3380 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define MC_REGISTERS_TABLE_51__data_2_value_1__SHIFT 0x0
MC_REGISTERS_TABLE_51__data_2_value_1__SHIFT 1402 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define MC_REGISTERS_TABLE_51__data_2_value_1__SHIFT 0x0
MC_REGISTERS_TABLE_51__data_2_value_1__SHIFT 3606 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define MC_REGISTERS_TABLE_51__data_2_value_1__SHIFT 0x0