MC_REGISTERS_TABLE_60__data_2_value_10_MASK 3399 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define MC_REGISTERS_TABLE_60__data_2_value_10_MASK 0xffffffff
MC_REGISTERS_TABLE_60__data_2_value_10_MASK 3397 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define MC_REGISTERS_TABLE_60__data_2_value_10_MASK 0xffffffff
MC_REGISTERS_TABLE_60__data_2_value_10_MASK 1419 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define MC_REGISTERS_TABLE_60__data_2_value_10_MASK 0xffffffff
MC_REGISTERS_TABLE_60__data_2_value_10_MASK 3623 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define MC_REGISTERS_TABLE_60__data_2_value_10_MASK 0xffffffff