MC_REGISTERS_TABLE_64__data_2_value_14__SHIFT 3408 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define MC_REGISTERS_TABLE_64__data_2_value_14__SHIFT 0x0
MC_REGISTERS_TABLE_64__data_2_value_14__SHIFT 3406 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define MC_REGISTERS_TABLE_64__data_2_value_14__SHIFT 0x0
MC_REGISTERS_TABLE_64__data_2_value_14__SHIFT 1428 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define MC_REGISTERS_TABLE_64__data_2_value_14__SHIFT 0x0
MC_REGISTERS_TABLE_64__data_2_value_14__SHIFT 3632 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define MC_REGISTERS_TABLE_64__data_2_value_14__SHIFT 0x0