MC_REGISTERS_TABLE_69__data_3_value_3__SHIFT 3418 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define MC_REGISTERS_TABLE_69__data_3_value_3__SHIFT 0x0
MC_REGISTERS_TABLE_69__data_3_value_3__SHIFT 3416 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define MC_REGISTERS_TABLE_69__data_3_value_3__SHIFT 0x0
MC_REGISTERS_TABLE_69__data_3_value_3__SHIFT 1438 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define MC_REGISTERS_TABLE_69__data_3_value_3__SHIFT 0x0
MC_REGISTERS_TABLE_69__data_3_value_3__SHIFT 3642 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define MC_REGISTERS_TABLE_69__data_3_value_3__SHIFT 0x0