set_rate 36 arch/arm/mach-ep93xx/clock.c int (*set_rate)(struct clk *clk, unsigned long rate); set_rate 96 arch/arm/mach-ep93xx/clock.c .set_rate = set_keytchclk_rate, set_rate 103 arch/arm/mach-ep93xx/clock.c .set_rate = set_keytchclk_rate, set_rate 118 arch/arm/mach-ep93xx/clock.c .set_rate = set_div_rate, set_rate 125 arch/arm/mach-ep93xx/clock.c .set_rate = set_div_rate, set_rate 133 arch/arm/mach-ep93xx/clock.c .set_rate = set_i2s_sclk_rate, set_rate 141 arch/arm/mach-ep93xx/clock.c .set_rate = set_i2s_lrclk_rate, set_rate 476 arch/arm/mach-ep93xx/clock.c if (clk->set_rate) set_rate 477 arch/arm/mach-ep93xx/clock.c return clk->set_rate(clk, rate); set_rate 570 arch/arm/mach-omap1/clock.c if (clk->set_rate) set_rate 571 arch/arm/mach-omap1/clock.c ret = clk->set_rate(clk, rate); set_rate 148 arch/arm/mach-omap1/clock.h int (*set_rate)(struct clk *, unsigned long); set_rate 113 arch/arm/mach-omap1/clock_data.c .set_rate = &omap1_set_sossi_rate, set_rate 123 arch/arm/mach-omap1/clock_data.c .set_rate = omap1_clk_set_rate_ckctl_arm, set_rate 137 arch/arm/mach-omap1/clock_data.c .set_rate = omap1_clk_set_rate_ckctl_arm, set_rate 217 arch/arm/mach-omap1/clock_data.c .set_rate = omap1_clk_set_rate_ckctl_arm, set_rate 227 arch/arm/mach-omap1/clock_data.c .set_rate = omap1_clk_set_rate_ckctl_arm, set_rate 239 arch/arm/mach-omap1/clock_data.c .set_rate = &omap1_clk_set_rate_dsp_domain, set_rate 269 arch/arm/mach-omap1/clock_data.c .set_rate = omap1_clk_set_rate_ckctl_arm, set_rate 390 arch/arm/mach-omap1/clock_data.c .set_rate = omap1_clk_set_rate_ckctl_arm, set_rate 404 arch/arm/mach-omap1/clock_data.c .set_rate = omap1_clk_set_rate_ckctl_arm, set_rate 424 arch/arm/mach-omap1/clock_data.c .set_rate = &omap1_set_uart_rate, set_rate 463 arch/arm/mach-omap1/clock_data.c .set_rate = &omap1_set_uart_rate, set_rate 482 arch/arm/mach-omap1/clock_data.c .set_rate = &omap1_set_uart_rate, set_rate 579 arch/arm/mach-omap1/clock_data.c .set_rate = &omap1_set_ext_clk_rate, set_rate 597 arch/arm/mach-omap1/clock_data.c .set_rate = &omap1_set_ext_clk_rate, set_rate 644 arch/arm/mach-omap1/clock_data.c .set_rate = &omap1_select_table_rate, set_rate 215 arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c .set_rate = &omap2_select_table_rate, set_rate 527 arch/arm/mach-vexpress/spc.c .set_rate = spc_set_rate, set_rate 92 arch/c6x/include/asm/clock.h int (*set_rate) (struct clk *clk, unsigned long rate); set_rate 113 arch/c6x/platforms/pll.c if (clk->set_rate) set_rate 114 arch/c6x/platforms/pll.c ret = clk->set_rate(clk, rate); set_rate 229 arch/mips/alchemy/common/clock.c .set_rate = alchemy_clk_aux_setr, set_rate 582 arch/mips/alchemy/common/clock.c .set_rate = alchemy_clk_fgv1_setr, set_rate 723 arch/mips/alchemy/common/clock.c .set_rate = alchemy_clk_fgv2_setr, set_rate 931 arch/mips/alchemy/common/clock.c .set_rate = alchemy_clk_csrc_setr, set_rate 17 arch/mips/include/asm/clock.h int (*set_rate) (struct clk *clk, unsigned long rate, int algo_id); set_rate 102 arch/mips/loongson64/lemote-2f/clock.c if (likely(clk->ops && clk->ops->set_rate)) { set_rate 106 arch/mips/loongson64/lemote-2f/clock.c ret = clk->ops->set_rate(clk, rate, 0); set_rate 81 arch/sh/kernel/cpu/sh4/clock-sh4-202.c if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) set_rate 133 arch/sh/kernel/cpu/sh4/clock-sh4-202.c .set_rate = shoc_clk_set_rate, set_rate 157 drivers/clk/actions/owl-composite.c .set_rate = owl_comp_div_set_rate, set_rate 174 drivers/clk/actions/owl-composite.c .set_rate = owl_comp_fact_set_rate, set_rate 186 drivers/clk/actions/owl-composite.c .set_rate = owl_comp_fix_fact_set_rate, set_rate 93 drivers/clk/actions/owl-divider.c .set_rate = owl_divider_set_rate, set_rate 220 drivers/clk/actions/owl-factor.c .set_rate = owl_factor_set_rate, set_rate 193 drivers/clk/actions/owl-pll.c .set_rate = owl_pll_set_rate, set_rate 432 drivers/clk/at91/clk-audio-pll.c .set_rate = clk_audio_pll_frac_set_rate, set_rate 440 drivers/clk/at91/clk-audio-pll.c .set_rate = clk_audio_pll_pad_set_rate, set_rate 448 drivers/clk/at91/clk-audio-pll.c .set_rate = clk_audio_pll_pmc_set_rate, set_rate 243 drivers/clk/at91/clk-generated.c .set_rate = clk_generated_set_rate, set_rate 81 drivers/clk/at91/clk-h32mx.c .set_rate = clk_sama5d4_h32mx_set_rate, set_rate 320 drivers/clk/at91/clk-peripheral.c .set_rate = clk_sam9x5_peripheral_set_rate, set_rate 269 drivers/clk/at91/clk-pll.c .set_rate = clk_pll_set_rate, set_rate 70 drivers/clk/at91/clk-plldiv.c .set_rate = clk_plldiv_set_rate, set_rate 178 drivers/clk/at91/clk-programmable.c .set_rate = clk_programmable_set_rate, set_rate 282 drivers/clk/at91/clk-sam9x60-pll.c .set_rate = sam9x60_pll_set_rate, set_rate 104 drivers/clk/at91/clk-smd.c .set_rate = at91sam9x5_clk_smd_set_rate, set_rate 155 drivers/clk/at91/clk-usb.c .set_rate = at91sam9x5_clk_usb_set_rate, set_rate 191 drivers/clk/at91/clk-usb.c .set_rate = at91sam9x5_clk_usb_set_rate, set_rate 359 drivers/clk/at91/clk-usb.c .set_rate = at91rm9200_clk_usb_set_rate, set_rate 163 drivers/clk/axs10x/i2s_pll_clock.c .set_rate = i2s_pll_set_rate, set_rate 216 drivers/clk/axs10x/pll_clock.c .set_rate = axs10x_pll_set_rate, set_rate 765 drivers/clk/bcm/clk-bcm2835.c .set_rate = bcm2835_pll_set_rate, set_rate 886 drivers/clk/bcm/clk-bcm2835.c .set_rate = bcm2835_pll_divider_set_rate, set_rate 1272 drivers/clk/bcm/clk-bcm2835.c .set_rate = bcm2835_clock_set_rate, set_rate 1291 drivers/clk/bcm/clk-bcm2835.c .set_rate = bcm2835_clock_set_rate, set_rate 182 drivers/clk/bcm/clk-iproc-asiu.c .set_rate = iproc_asiu_clk_set_rate, set_rate 582 drivers/clk/bcm/clk-iproc-pll.c .set_rate = iproc_pll_set_rate, set_rate 704 drivers/clk/bcm/clk-iproc-pll.c .set_rate = iproc_clk_set_rate, set_rate 1190 drivers/clk/bcm/clk-kona.c .set_rate = kona_peri_clk_set_rate, set_rate 172 drivers/clk/bcm/clk-raspberrypi.c .set_rate = raspberrypi_fw_pll_set_rate, set_rate 393 drivers/clk/clk-axi-clkgen.c .set_rate = axi_clkgen_set_rate, set_rate 254 drivers/clk/clk-cdce706.c .set_rate = cdce706_pll_set_rate, set_rate 378 drivers/clk/clk-cdce706.c .set_rate = cdce706_divider_set_rate, set_rate 443 drivers/clk/clk-cdce706.c .set_rate = cdce706_clkout_set_rate, set_rate 285 drivers/clk/clk-cdce925.c .set_rate = cdce925_pll_set_rate, set_rate 470 drivers/clk/clk-cdce925.c .set_rate = cdce925_clk_set_rate, set_rate 517 drivers/clk/clk-cdce925.c .set_rate = cdce925_clk_y1_set_rate, set_rate 139 drivers/clk/clk-composite.c return rate_ops->set_rate(rate_hw, rate, parent_rate); set_rate 159 drivers/clk/clk-composite.c rate_ops->set_rate(rate_hw, rate, parent_rate); set_rate 163 drivers/clk/clk-composite.c rate_ops->set_rate(rate_hw, rate, parent_rate); set_rate 257 drivers/clk/clk-composite.c if (rate_ops->set_rate) { set_rate 259 drivers/clk/clk-composite.c clk_composite_ops->set_rate = set_rate 271 drivers/clk/clk-composite.c if (mux_ops->set_parent && rate_ops->set_rate) set_rate 391 drivers/clk/clk-cs2000-cp.c .set_rate = cs2000_set_rate, set_rate 456 drivers/clk/clk-divider.c .set_rate = clk_divider_set_rate, set_rate 62 drivers/clk/clk-fixed-factor.c .set_rate = clk_factor_set_rate, set_rate 151 drivers/clk/clk-fractional-divider.c .set_rate = clk_fd_set_rate, set_rate 185 drivers/clk/clk-gemini.c .set_rate = gemini_pci_set_rate, set_rate 190 drivers/clk/clk-highbank.c .set_rate = clk_pll_set_rate, set_rate 260 drivers/clk/clk-highbank.c .set_rate = clk_periclk_set_rate, set_rate 296 drivers/clk/clk-hsdk-pll.c .set_rate = hsdk_pll_set_rate, set_rate 223 drivers/clk/clk-max9485.c .set_rate = max9485_clkout_set_rate, set_rate 454 drivers/clk/clk-milbeaut.c .set_rate = m10v_clk_divider_set_rate, set_rate 154 drivers/clk/clk-multiplier.c .set_rate = clk_multiplier_set_rate, set_rate 92 drivers/clk/clk-scmi.c .set_rate = scmi_clk_set_rate, set_rate 59 drivers/clk/clk-scpi.c .set_rate = scpi_clk_set_rate, set_rate 129 drivers/clk/clk-scpi.c .set_rate = scpi_dvfs_set_rate, set_rate 293 drivers/clk/clk-si514.c .set_rate = si514_set_rate, set_rate 579 drivers/clk/clk-si5341.c .set_rate = si5341_synth_clk_set_rate, set_rate 760 drivers/clk/clk-si5341.c .set_rate = si5341_output_clk_set_rate, set_rate 336 drivers/clk/clk-si5351.c .set_rate = si5351_vxco_set_rate, set_rate 537 drivers/clk/clk-si5351.c .set_rate = si5351_pll_set_rate, set_rate 793 drivers/clk/clk-si5351.c .set_rate = si5351_msynth_set_rate, set_rate 1139 drivers/clk/clk-si5351.c .set_rate = si5351_clkout_set_rate, set_rate 432 drivers/clk/clk-si544.c .set_rate = si544_set_rate, set_rate 363 drivers/clk/clk-si570.c .set_rate = si570_set_rate, set_rate 462 drivers/clk/clk-stm32f4.c .set_rate = clk_apb_mul_set_rate, set_rate 696 drivers/clk/clk-stm32f4.c .set_rate = stm32f4_pll_set_rate, set_rate 731 drivers/clk/clk-stm32f4.c ret = clk_divider_ops.set_rate(hw, rate, parent_rate); set_rate 742 drivers/clk/clk-stm32f4.c .set_rate = stm32f4_pll_div_set_rate, set_rate 868 drivers/clk/clk-stm32h7.c ret = clk_divider_ops.set_rate(hw, rate, parent_rate); set_rate 879 drivers/clk/clk-stm32h7.c .set_rate = odf_divider_set_rate, set_rate 992 drivers/clk/clk-stm32mp1.c .set_rate = timer_ker_set_rate, set_rate 689 drivers/clk/clk-u300.c .set_rate = syscon_clk_set_rate, set_rate 1112 drivers/clk/clk-u300.c .set_rate = mclk_clk_set_rate, set_rate 315 drivers/clk/clk-versaclock5.c .set_rate = vc5_dbl_set_rate, set_rate 395 drivers/clk/clk-versaclock5.c .set_rate = vc5_pfd_set_rate, set_rate 465 drivers/clk/clk-versaclock5.c .set_rate = vc5_pll_set_rate, set_rate 562 drivers/clk/clk-versaclock5.c .set_rate = vc5_fod_set_rate, set_rate 206 drivers/clk/clk-vt8500.c .set_rate = vt8500_dclk_set_rate, set_rate 215 drivers/clk/clk-vt8500.c .set_rate = vt8500_dclk_set_rate, set_rate 669 drivers/clk/clk-vt8500.c .set_rate = vtwm_pll_set_rate, set_rate 219 drivers/clk/clk-wm831x.c .set_rate = wm831x_fll_set_rate, set_rate 337 drivers/clk/clk-xgene.c .set_rate = xgene_clk_pmd_set_rate, set_rate 621 drivers/clk/clk-xgene.c .set_rate = xgene_clk_set_rate, set_rate 2064 drivers/clk/clk.c if (!skip_set_rate && core->ops->set_rate) set_rate 2065 drivers/clk/clk.c core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); set_rate 3315 drivers/clk/clk.c if (core->ops->set_rate && set_rate 3339 drivers/clk/clk.c !(core->ops->set_parent && core->ops->set_rate)) { set_rate 3862 drivers/clk/clk.c .set_rate = clk_nodrv_set_rate, set_rate 202 drivers/clk/davinci/pll.c .set_rate = davinci_pll_set_rate, set_rate 83 drivers/clk/h8300/clk-h8s2678.c .set_rate = pll_set_rate, set_rate 407 drivers/clk/hisilicon/clk-hi3620.c .set_rate = mmc_clk_set_rate, set_rate 101 drivers/clk/hisilicon/clk-hi3660-stub.c .set_rate = hi3660_stub_clk_set_rate, set_rate 190 drivers/clk/hisilicon/clk-hi6220-stub.c .set_rate = hi6220_stub_clk_set_rate, set_rate 97 drivers/clk/hisilicon/clkdivider-hi6220.c .set_rate = hi6220_clkdiv_set_rate, set_rate 62 drivers/clk/imx/clk-busy.c ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate); set_rate 72 drivers/clk/imx/clk-busy.c .set_rate = clk_busy_divider_set_rate, set_rate 123 drivers/clk/imx/clk-composite-8m.c .set_rate = imx8m_clk_composite_divider_set_rate, set_rate 69 drivers/clk/imx/clk-cpu.c .set_rate = clk_cpu_set_rate, set_rate 163 drivers/clk/imx/clk-divider-gate.c .set_rate = clk_divider_gate_set_rate, set_rate 85 drivers/clk/imx/clk-fixup-div.c .set_rate = clk_fixup_div_set_rate, set_rate 201 drivers/clk/imx/clk-frac-pll.c .set_rate = clk_pll_set_rate, set_rate 120 drivers/clk/imx/clk-pfd.c .set_rate = clk_pfd_set_rate, set_rate 165 drivers/clk/imx/clk-pfdv2.c .set_rate = clk_pfdv2_set_rate, set_rate 324 drivers/clk/imx/clk-pll14xx.c .set_rate = clk_pll1416x_set_rate, set_rate 337 drivers/clk/imx/clk-pll14xx.c .set_rate = clk_pll1443x_set_rate, set_rate 239 drivers/clk/imx/clk-pllv2.c .set_rate = clk_pllv2_set_rate, set_rate 158 drivers/clk/imx/clk-pllv3.c .set_rate = clk_pllv3_set_rate, set_rate 213 drivers/clk/imx/clk-pllv3.c .set_rate = clk_pllv3_sys_set_rate, set_rate 302 drivers/clk/imx/clk-pllv3.c .set_rate = clk_pllv3_av_set_rate, set_rate 395 drivers/clk/imx/clk-pllv3.c .set_rate = clk_pllv3_vf610_set_rate, set_rate 203 drivers/clk/imx/clk-pllv4.c .set_rate = clk_pllv4_set_rate, set_rate 503 drivers/clk/imx/clk-sccg-pll.c .set_rate = clk_sccg_pll_set_rate, set_rate 332 drivers/clk/imx/clk-scu.c .set_rate = clk_scu_set_rate, set_rate 342 drivers/clk/imx/clk-scu.c .set_rate = clk_scu_atf_set_cpu_rate, set_rate 275 drivers/clk/ingenic/cgu.c .set_rate = ingenic_pll_set_rate, set_rate 585 drivers/clk/ingenic/cgu.c .set_rate = ingenic_clk_set_rate, set_rate 205 drivers/clk/ingenic/jz4780-cgu.c .set_rate = jz4780_otg_phy_set_rate, set_rate 227 drivers/clk/ingenic/tcu.c .set_rate = ingenic_tcu_set_rate, set_rate 263 drivers/clk/keystone/sci-clk.c .set_rate = sci_clk_set_rate, set_rate 297 drivers/clk/mediatek/clk-pll.c .set_rate = mtk_pll_set_rate, set_rate 67 drivers/clk/meson/clk-cpu-dyndiv.c .set_rate = meson_clk_cpu_dyndiv_set_rate, set_rate 126 drivers/clk/meson/clk-dualdiv.c .set_rate = meson_clk_dualdiv_set_rate, set_rate 165 drivers/clk/meson/clk-mpll.c .set_rate = mpll_set_rate, set_rate 429 drivers/clk/meson/clk-pll.c .set_rate = meson_clk_pll_set_rate, set_rate 127 drivers/clk/meson/clk-regmap.c .set_rate = clk_regmap_div_set_rate, set_rate 239 drivers/clk/meson/sclk-div.c .set_rate = sclk_div_set_rate, set_rate 211 drivers/clk/microchip/clk-core.c .set_rate = pbclk_set_rate, set_rate 552 drivers/clk/microchip/clk-core.c .set_rate = roclk_set_rate, set_rate 727 drivers/clk/microchip/clk-core.c .set_rate = spll_clk_set_rate, set_rate 909 drivers/clk/microchip/clk-core.c .set_rate = sclk_set_rate, set_rate 154 drivers/clk/mmp/clk-frac.c .set_rate = clk_factor_set_rate, set_rate 433 drivers/clk/mmp/clk-mix.c .set_rate = mmp_clk_set_rate, set_rate 227 drivers/clk/mvebu/ap-cpu-clk.c .set_rate = ap_cpu_clk_set_rate, set_rate 595 drivers/clk/mvebu/armada-37xx-periph.c .set_rate = clk_pm_cpu_set_rate, set_rate 203 drivers/clk/mvebu/clk-corediv.c .set_rate = clk_corediv_set_rate, set_rate 219 drivers/clk/mvebu/clk-corediv.c .set_rate = clk_corediv_set_rate, set_rate 232 drivers/clk/mvebu/clk-corediv.c .set_rate = clk_corediv_set_rate, set_rate 244 drivers/clk/mvebu/clk-corediv.c .set_rate = clk_corediv_set_rate, set_rate 163 drivers/clk/mvebu/clk-cpu.c .set_rate = clk_cpu_set_rate, set_rate 156 drivers/clk/mvebu/dove-divider.c .set_rate = dove_set_clock, set_rate 57 drivers/clk/mxs/clk-div.c ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); set_rate 67 drivers/clk/mxs/clk-div.c .set_rate = clk_div_set_rate, set_rate 107 drivers/clk/mxs/clk-frac.c .set_rate = clk_frac_set_rate, set_rate 118 drivers/clk/mxs/clk-ref.c .set_rate = clk_ref_set_rate, set_rate 451 drivers/clk/nxp/clk-lpc18xx-cgu.c .set_rate = lpc18xx_pll0_set_rate, set_rate 703 drivers/clk/nxp/clk-lpc32xx.c .set_rate = _sr, \ set_rate 995 drivers/clk/nxp/clk-lpc32xx.c .set_rate = clk_divider_set_rate, set_rate 304 drivers/clk/pistachio/clk-pll.c .set_rate = pll_gf40lp_frac_set_rate, set_rate 436 drivers/clk/pistachio/clk-pll.c .set_rate = pll_gf40lp_laint_set_rate, set_rate 58 drivers/clk/pxa/clk-pxa.h .set_rate = name ## _set_rate, \ set_rate 887 drivers/clk/qcom/clk-alpha-pll.c .set_rate = clk_alpha_pll_set_rate, set_rate 897 drivers/clk/qcom/clk-alpha-pll.c .set_rate = alpha_pll_huayra_set_rate, set_rate 907 drivers/clk/qcom/clk-alpha-pll.c .set_rate = clk_alpha_pll_hwfsm_set_rate, set_rate 1002 drivers/clk/qcom/clk-alpha-pll.c .set_rate = clk_alpha_pll_postdiv_set_rate, set_rate 1174 drivers/clk/qcom/clk-alpha-pll.c .set_rate = alpha_pll_fabia_set_rate, set_rate 1269 drivers/clk/qcom/clk-alpha-pll.c .set_rate = clk_trion_pll_postdiv_set_rate, set_rate 1315 drivers/clk/qcom/clk-alpha-pll.c .set_rate = clk_alpha_pll_postdiv_fabia_set_rate, set_rate 240 drivers/clk/qcom/clk-hfpll.c .set_rate = clk_hfpll_set_rate, set_rate 123 drivers/clk/qcom/clk-krait.c .set_rate = krait_div2_set_rate, set_rate 175 drivers/clk/qcom/clk-pll.c .set_rate = clk_pll_set_rate, set_rate 332 drivers/clk/qcom/clk-pll.c .set_rate = clk_pll_sr2_set_rate, set_rate 815 drivers/clk/qcom/clk-rcg.c .set_rate = clk_rcg_set_rate, set_rate 826 drivers/clk/qcom/clk-rcg.c .set_rate = clk_rcg_bypass_set_rate, set_rate 837 drivers/clk/qcom/clk-rcg.c .set_rate = clk_rcg_bypass2_set_rate, set_rate 849 drivers/clk/qcom/clk-rcg.c .set_rate = clk_rcg_pixel_set_rate, set_rate 861 drivers/clk/qcom/clk-rcg.c .set_rate = clk_rcg_esc_set_rate, set_rate 873 drivers/clk/qcom/clk-rcg.c .set_rate = clk_rcg_lcc_set_rate, set_rate 885 drivers/clk/qcom/clk-rcg.c .set_rate = clk_dyn_rcg_set_rate, set_rate 365 drivers/clk/qcom/clk-rcg2.c .set_rate = clk_rcg2_set_rate, set_rate 376 drivers/clk/qcom/clk-rcg2.c .set_rate = clk_rcg2_set_floor_rate, set_rate 502 drivers/clk/qcom/clk-rcg2.c .set_rate = clk_edp_pixel_set_rate, set_rate 560 drivers/clk/qcom/clk-rcg2.c .set_rate = clk_byte_set_rate, set_rate 630 drivers/clk/qcom/clk-rcg2.c .set_rate = clk_byte2_set_rate, set_rate 720 drivers/clk/qcom/clk-rcg2.c .set_rate = clk_pixel_set_rate, set_rate 807 drivers/clk/qcom/clk-rcg2.c .set_rate = clk_gfx3d_set_rate, set_rate 946 drivers/clk/qcom/clk-rcg2.c .set_rate = clk_rcg2_shared_set_rate, set_rate 74 drivers/clk/qcom/clk-regmap-divider.c .set_rate = div_set_rate, set_rate 226 drivers/clk/qcom/clk-regmap-mux-div.c .set_rate = mux_div_set_rate, set_rate 448 drivers/clk/qcom/clk-rpm.c .set_rate = clk_rpm_set_rate, set_rate 332 drivers/clk/qcom/clk-rpmh.c .set_rate = clk_rpmh_bcm_set_rate, set_rate 399 drivers/clk/qcom/clk-smd-rpm.c .set_rate = clk_smd_rpm_set_rate, set_rate 173 drivers/clk/qcom/clk-spmi-pmic-div.c .set_rate = clk_spmi_pmic_div_set_rate, set_rate 1333 drivers/clk/qcom/gcc-ipq4019.c .set_rate = clk_cpu_div_set_rate, set_rate 177 drivers/clk/renesas/clk-div6.c .set_rate = cpg_div6_clock_set_rate, set_rate 133 drivers/clk/renesas/clk-rcar-gen2.c .set_rate = cpg_z_clk_set_rate, set_rate 667 drivers/clk/renesas/r9a06g032-clocks.c .set_rate = r9a06g032_div_set_rate, set_rate 130 drivers/clk/renesas/rcar-gen2-cpg.c .set_rate = cpg_z_clk_set_rate, set_rate 176 drivers/clk/renesas/rcar-gen3-cpg.c .set_rate = cpg_z_clk_set_rate, set_rate 370 drivers/clk/renesas/rcar-gen3-cpg.c .set_rate = cpg_sd_clock_set_rate, set_rate 85 drivers/clk/rockchip/clk-ddr.c .set_rate = rockchip_ddrclk_sip_set_rate, set_rate 145 drivers/clk/rockchip/clk-half-divider.c .set_rate = clk_half_divider_set_rate, set_rate 341 drivers/clk/rockchip/clk-pll.c .set_rate = rockchip_rk3036_pll_set_rate, set_rate 558 drivers/clk/rockchip/clk-pll.c .set_rate = rockchip_rk3066_pll_set_rate, set_rate 820 drivers/clk/rockchip/clk-pll.c .set_rate = rockchip_rk3399_pll_set_rate, set_rate 256 drivers/clk/samsung/clk-pll.c .set_rate = samsung_pll35xx_set_rate, set_rate 372 drivers/clk/samsung/clk-pll.c .set_rate = samsung_pll36xx_set_rate, set_rate 511 drivers/clk/samsung/clk-pll.c .set_rate = samsung_pll45xx_set_rate, set_rate 670 drivers/clk/samsung/clk-pll.c .set_rate = samsung_pll46xx_set_rate, set_rate 899 drivers/clk/samsung/clk-pll.c .set_rate = samsung_s3c2410_pll_set_rate, set_rate 907 drivers/clk/samsung/clk-pll.c .set_rate = samsung_s3c2410_pll_set_rate, set_rate 915 drivers/clk/samsung/clk-pll.c .set_rate = samsung_s3c2410_pll_set_rate, set_rate 1051 drivers/clk/samsung/clk-pll.c .set_rate = samsung_pll2550xx_set_rate, set_rate 1147 drivers/clk/samsung/clk-pll.c .set_rate = samsung_pll2650x_set_rate, set_rate 1241 drivers/clk/samsung/clk-pll.c .set_rate = samsung_pll2650xx_set_rate, set_rate 432 drivers/clk/sifive/fu540-prci.c .set_rate = sifive_fu540_prci_wrpll_set_rate, set_rate 586 drivers/clk/sirf/clk-atlas7.c .set_rate = dto_clk_set_rate, set_rate 189 drivers/clk/sirf/clk-common.c .set_rate = pll_clk_set_rate, set_rate 444 drivers/clk/sirf/clk-common.c .set_rate = dmn_clk_set_rate, set_rate 497 drivers/clk/sirf/clk-common.c .set_rate = cpu_clk_set_rate, set_rate 521 drivers/clk/sirf/clk-common.c .set_rate = dmn_clk_set_rate, set_rate 134 drivers/clk/spear/clk-aux-synth.c .set_rate = clk_aux_set_rate, set_rate 122 drivers/clk/spear/clk-frac-synth.c .set_rate = clk_frac_set_rate, set_rate 111 drivers/clk/spear/clk-gpt-synth.c .set_rate = clk_gpt_set_rate, set_rate 171 drivers/clk/spear/clk-vco-pll.c .set_rate = clk_pll_set_rate, set_rate 272 drivers/clk/spear/clk-vco-pll.c .set_rate = clk_vco_set_rate, set_rate 58 drivers/clk/sprd/composite.c .set_rate = sprd_comp_set_rate, set_rate 89 drivers/clk/sprd/div.c .set_rate = sprd_div_set_rate, set_rate 266 drivers/clk/sprd/pll.c .set_rate = sprd_pll_set_rate, set_rate 177 drivers/clk/st/clk-flexgen.c clk_divider_ops.set_rate(pdiv_hw, parent_rate, parent_rate); set_rate 178 drivers/clk/st/clk-flexgen.c ret = clk_divider_ops.set_rate(fdiv_hw, rate, rate * div); set_rate 180 drivers/clk/st/clk-flexgen.c clk_divider_ops.set_rate(fdiv_hw, parent_rate, parent_rate); set_rate 181 drivers/clk/st/clk-flexgen.c ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * div); set_rate 195 drivers/clk/st/clk-flexgen.c .set_rate = flexgen_set_rate, set_rate 378 drivers/clk/st/clkgen-fsyn.c .set_rate = quadfs_pll_fs660c32_set_rate, set_rate 816 drivers/clk/st/clkgen-fsyn.c .set_rate = quadfs_set_rate, set_rate 570 drivers/clk/st/clkgen-pll.c .set_rate = set_rate_stm_pll3200c32, set_rate 579 drivers/clk/st/clkgen-pll.c .set_rate = set_rate_stm_pll4600c28, set_rate 142 drivers/clk/sunxi-ng/ccu_div.c .set_rate = ccu_div_set_rate, set_rate 124 drivers/clk/sunxi-ng/ccu_gate.c .set_rate = ccu_gate_set_rate, set_rate 246 drivers/clk/sunxi-ng/ccu_mp.c .set_rate = ccu_mp_set_rate, set_rate 326 drivers/clk/sunxi-ng/ccu_mp.c .set_rate = ccu_mp_mmc_set_rate, set_rate 171 drivers/clk/sunxi-ng/ccu_mult.c .set_rate = ccu_mult_set_rate, set_rate 158 drivers/clk/sunxi-ng/ccu_nk.c .set_rate = ccu_nk_set_rate, set_rate 207 drivers/clk/sunxi-ng/ccu_nkm.c .set_rate = ccu_nkm_set_rate, set_rate 231 drivers/clk/sunxi-ng/ccu_nkmp.c .set_rate = ccu_nkmp_set_rate, set_rate 239 drivers/clk/sunxi-ng/ccu_nm.c .set_rate = ccu_nm_set_rate, set_rate 173 drivers/clk/sunxi/clk-factors.c .set_rate = clk_factors_set_rate, set_rate 221 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c .set_rate = tcon_ch1_set_rate, set_rate 180 drivers/clk/sunxi/clk-sun9i-cpus.c .set_rate = sun9i_a80_cpus_clk_set_rate, set_rate 42 drivers/clk/tegra/clk-audio-sync.c .set_rate = clk_sync_source_set_rate, set_rate 294 drivers/clk/tegra/clk-bpmp.c .set_rate = tegra_bpmp_clk_set_rate, set_rate 305 drivers/clk/tegra/clk-bpmp.c .set_rate = tegra_bpmp_clk_set_rate, set_rate 1163 drivers/clk/tegra/clk-dfll.c .set_rate = dfll_clk_set_rate, set_rate 114 drivers/clk/tegra/clk-divider.c .set_rate = clk_frac_div_set_rate, set_rate 476 drivers/clk/tegra/clk-emc.c .set_rate = emc_set_rate, set_rate 68 drivers/clk/tegra/clk-periph.c return div_ops->set_rate(div_hw, rate, parent_rate); set_rate 107 drivers/clk/tegra/clk-periph.c .set_rate = clk_periph_set_rate, set_rate 126 drivers/clk/tegra/clk-periph.c .set_rate = clk_periph_set_rate, set_rate 1017 drivers/clk/tegra/clk-pll.c .set_rate = clk_pll_set_rate, set_rate 1153 drivers/clk/tegra/clk-pll.c .set_rate = clk_pll_set_rate, set_rate 1945 drivers/clk/tegra/clk-pll.c .set_rate = clk_pllxc_set_rate, set_rate 1954 drivers/clk/tegra/clk-pll.c .set_rate = clk_pllc_set_rate, set_rate 1963 drivers/clk/tegra/clk-pll.c .set_rate = clk_pllre_set_rate, set_rate 2278 drivers/clk/tegra/clk-pll.c .set_rate = clk_pllxc_set_rate, set_rate 202 drivers/clk/tegra/clk-sdmmc-mux.c .set_rate = clk_sdmmc_mux_set_rate, set_rate 148 drivers/clk/tegra/clk-super.c return super->div_ops->set_rate(div_hw, rate, parent_rate); set_rate 154 drivers/clk/tegra/clk-super.c .set_rate = clk_super_set_rate, set_rate 168 drivers/clk/ti/clk-dra7-atl.c .set_rate = atl_clk_set_rate, set_rate 52 drivers/clk/ti/composite.c .set_rate = &ti_composite_set_rate, set_rate 308 drivers/clk/ti/divider.c .set_rate = ti_clk_divider_set_rate, set_rate 37 drivers/clk/ti/dpll.c .set_rate = &omap3_noncore_dpll_set_rate, set_rate 62 drivers/clk/ti/dpll.c .set_rate = &omap3_noncore_dpll_set_rate, set_rate 75 drivers/clk/ti/dpll.c .set_rate = &omap3_noncore_dpll_set_rate, set_rate 94 drivers/clk/ti/dpll.c .set_rate = &omap2_reprogram_dpllcore, set_rate 116 drivers/clk/ti/dpll.c .set_rate = &omap3_noncore_dpll_set_rate, set_rate 128 drivers/clk/ti/dpll.c .set_rate = &omap3_dpll5_set_rate, set_rate 140 drivers/clk/ti/dpll.c .set_rate = &omap3_dpll4_set_rate, set_rate 279 drivers/clk/ti/fapll.c .set_rate = ti_fapll_set_rate, set_rate 488 drivers/clk/ti/fapll.c .set_rate = ti_fapll_synth_set_rate, set_rate 197 drivers/clk/ux500/clk-prcmu.c .set_rate = clk_prcmu_set_rate, set_rate 214 drivers/clk/ux500/clk-prcmu.c .set_rate = clk_prcmu_set_rate, set_rate 241 drivers/clk/ux500/clk-prcmu.c .set_rate = clk_prcmu_set_rate, set_rate 344 drivers/clk/versatile/clk-icst.c .set_rate = icst_set_rate, set_rate 60 drivers/clk/versatile/clk-vexpress-osc.c .set_rate = vexpress_osc_set_rate, set_rate 147 drivers/clk/zte/clk.c .set_rate = zx_pll_set_rate, set_rate 288 drivers/clk/zte/clk.c .set_rate = zx_audio_set_rate, set_rate 445 drivers/clk/zte/clk.c .set_rate = zx_audio_div_set_rate, set_rate 175 drivers/clk/zynqmp/divider.c .set_rate = zynqmp_clk_divider_set_rate, set_rate 287 drivers/clk/zynqmp/pll.c .set_rate = zynqmp_pll_set_rate, set_rate 441 drivers/gpu/drm/imx/imx-tve.c .set_rate = clk_tve_di_set_rate, set_rate 314 drivers/gpu/drm/mediatek/mtk_mipi_tx.c .set_rate = mtk_mipi_tx_pll_set_rate, set_rate 198 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c .set_rate = mtk_hdmi_pll_set_rate, set_rate 305 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c .set_rate = mtk_hdmi_pll_set_rate, set_rate 122 drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c .set_rate = mpd4_lvds_pll_set_rate, set_rate 523 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c .set_rate = dsi_pll_10nm_vco_set_rate, set_rate 667 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c .set_rate = dsi_pll_14nm_vco_set_rate, set_rate 755 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c .set_rate = dsi_pll_14nm_postdiv_set_rate, set_rate 303 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c .set_rate = dsi_pll_28nm_clk_set_rate, set_rate 197 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c .set_rate = dsi_pll_28nm_clk_set_rate, set_rate 280 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c .set_rate = clk_bytediv_set_rate, set_rate 686 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c .set_rate = hdmi_8996_pll_set_clk_rate, set_rate 406 drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c .set_rate = hdmi_pll_set_rate, set_rate 533 drivers/gpu/drm/pl111/pl111_display.c .set_rate = pl111_clk_div_set_rate, set_rate 159 drivers/gpu/drm/sun4i/sun4i_dotclock.c .set_rate = sun4i_dclk_set_rate, set_rate 105 drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c .set_rate = sun4i_ddc_set_rate, set_rate 197 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c .set_rate = sun4i_tmds_set_rate, set_rate 23 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c if (hdmi->quirks->set_rate) set_rate 298 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c .set_rate = true, set_rate 181 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h unsigned int set_rate : 1; set_rate 137 drivers/gpu/drm/sun4i/sun8i_hdmi_phy_clk.c .set_rate = sun8i_phy_clk_set_rate, set_rate 153 drivers/i2c/busses/i2c-bcm2835.c .set_rate = clk_bcm2835_i2c_set_rate, set_rate 688 drivers/input/mouse/cypress_ps2.c psmouse->set_rate = cypress_set_rate; set_rate 1948 drivers/input/mouse/elantech.c etd->original_set_rate = psmouse->set_rate; set_rate 1949 drivers/input/mouse/elantech.c psmouse->set_rate = elantech_set_rate_restore_reg_07; set_rate 446 drivers/input/mouse/focaltech.c psmouse->set_rate = focaltech_set_rate; set_rate 983 drivers/input/mouse/psmouse-base.c psmouse->set_rate = psmouse_set_rate; set_rate 1291 drivers/input/mouse/psmouse-base.c psmouse->set_rate(psmouse, psmouse->rate); set_rate 2006 drivers/input/mouse/psmouse-base.c psmouse->set_rate(psmouse, value); set_rate 119 drivers/input/mouse/psmouse.h void (*set_rate)(struct psmouse *psmouse, unsigned int rate); set_rate 1616 drivers/input/mouse/synaptics.c psmouse->set_rate = synaptics_set_rate; set_rate 452 drivers/media/platform/atmel/atmel-isc-base.c .set_rate = isc_clk_set_rate, set_rate 281 drivers/media/platform/omap3isp/isp.c .set_rate = isp_xclk_set_rate, set_rate 213 drivers/media/v4l2-core/v4l2-clk.c if (!clk->ops->set_rate) set_rate 216 drivers/media/v4l2-core/v4l2-clk.c ret = clk->ops->set_rate(clk, rate); set_rate 4016 drivers/net/ethernet/cadence/macb_main.c .set_rate = fu540_macb_tx_set_rate, set_rate 5269 drivers/net/ethernet/qlogic/qed/qed_sriov.c .set_rate = &qed_set_vf_rate, set_rate 475 drivers/net/ethernet/qlogic/qede/qede_main.c return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate, set_rate 641 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_gether, set_rate 700 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_rcar, set_rate 731 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_rcar, set_rate 767 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_gether, set_rate 810 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_rcar, set_rate 860 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_sh7724, set_rate 904 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_sh7757, set_rate 979 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_giga, set_rate 1022 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_gether, set_rate 1064 drivers/net/ethernet/renesas/sh_eth.c .set_rate = sh_eth_set_rate_gether, set_rate 1545 drivers/net/ethernet/renesas/sh_eth.c if (mdp->cd->set_rate) set_rate 1546 drivers/net/ethernet/renesas/sh_eth.c mdp->cd->set_rate(ndev); set_rate 1998 drivers/net/ethernet/renesas/sh_eth.c if (mdp->cd->set_rate) set_rate 1999 drivers/net/ethernet/renesas/sh_eth.c mdp->cd->set_rate(ndev); set_rate 467 drivers/net/ethernet/renesas/sh_eth.h void (*set_rate)(struct net_device *ndev); set_rate 683 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c .set_rate = inno_hdmi_phy_rk3228_clk_set_rate, set_rate 834 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c .set_rate = inno_hdmi_phy_rk3328_clk_set_rate, set_rate 303 drivers/rtc/rtc-ac100.c .set_rate = ac100_clkout_set_rate, set_rate 1436 drivers/rtc/rtc-ds1307.c .set_rate = ds3231_clk_sqw_set_rate, set_rate 389 drivers/rtc/rtc-hym8563.c .set_rate = hym8563_clkout_set_rate, set_rate 541 drivers/rtc/rtc-m41t80.c .set_rate = m41t80_sqw_set_rate, set_rate 500 drivers/rtc/rtc-pcf8563.c .set_rate = pcf8563_clkout_set_rate, set_rate 490 drivers/sh/clk/core.c if (likely(clk->ops && clk->ops->set_rate)) { set_rate 491 drivers/sh/clk/core.c ret = clk->ops->set_rate(clk, rate); set_rate 583 drivers/sh/clk/core.c if (likely(clkp->ops->set_rate)) set_rate 584 drivers/sh/clk/core.c clkp->ops->set_rate(clkp, rate); set_rate 197 drivers/sh/clk/cpg.c .set_rate = sh_clk_div_set_rate, set_rate 203 drivers/sh/clk/cpg.c .set_rate = sh_clk_div_set_rate, set_rate 330 drivers/sh/clk/cpg.c .set_rate = sh_clk_div_set_rate, set_rate 382 drivers/sh/clk/cpg.c .set_rate = sh_clk_div_set_rate, set_rate 462 drivers/sh/clk/cpg.c .set_rate = fsidiv_set_rate, set_rate 1412 drivers/staging/rtl8188eu/os_dep/ioctl_linux.c goto set_rate; set_rate 1458 drivers/staging/rtl8188eu/os_dep/ioctl_linux.c set_rate: set_rate 1334 drivers/staging/rtl8712/rtl871x_ioctl_linux.c goto set_rate; set_rate 1378 drivers/staging/rtl8712/rtl871x_ioctl_linux.c set_rate: set_rate 1661 drivers/staging/rtl8723bs/os_dep/ioctl_linux.c goto set_rate; set_rate 1707 drivers/staging/rtl8723bs/os_dep/ioctl_linux.c set_rate: set_rate 633 drivers/tty/serial/sirfsoc_uart.c sirfsoc_usp_calc_sample_div(unsigned long set_rate, set_rate 644 drivers/tty/serial/sirfsoc_uart.c (ioclk_rate + (set_rate * sample_div) / 2) set_rate 645 drivers/tty/serial/sirfsoc_uart.c / (set_rate * sample_div) * set_rate * sample_div; set_rate 650 drivers/tty/serial/sirfsoc_uart.c (set_rate * sample_div) + 1) / 2 - 1; set_rate 476 drivers/tty/synclink_gt.c static void set_rate(struct slgt_info *info, u32 data_rate); set_rate 3910 drivers/tty/synclink_gt.c set_rate(info, info->params.clock_speed); set_rate 3912 drivers/tty/synclink_gt.c set_rate(info, 3686400); set_rate 4219 drivers/tty/synclink_gt.c set_rate(info, info->params.data_rate * 8); set_rate 4222 drivers/tty/synclink_gt.c set_rate(info, info->params.data_rate * 16); set_rate 4420 drivers/tty/synclink_gt.c set_rate(info, info->params.clock_speed * 16); set_rate 4423 drivers/tty/synclink_gt.c set_rate(info, info->params.clock_speed); set_rate 591 drivers/tty/synclinkmp.c static void set_rate(SLMP_INFO *info, u32 data_rate); set_rate 4045 drivers/tty/synclinkmp.c set_rate(info, info->params.clock_speed); set_rate 4047 drivers/tty/synclinkmp.c set_rate(info, 3686400); set_rate 4495 drivers/tty/synclinkmp.c set_rate( info, info->params.data_rate * 16 ); set_rate 4608 drivers/tty/synclinkmp.c set_rate(info, info->params.clock_speed * DpllDivisor); set_rate 4610 drivers/tty/synclinkmp.c set_rate(info, info->params.clock_speed); set_rate 4694 drivers/tty/synclinkmp.c set_rate(info, info->params.clock_speed); set_rate 233 include/linux/clk-provider.h int (*set_rate)(struct clk_hw *hw, unsigned long rate, set_rate 54 include/linux/qed/qed_iov_if.h int (*set_rate) (struct qed_dev *cdev, int vfid, set_rate 29 include/linux/sh_clk.h int (*set_rate)(struct clk *clk, unsigned long rate); set_rate 39 include/media/v4l2-clk.h int (*set_rate)(struct v4l2_clk *clk, unsigned long); set_rate 88 sound/firewire/oxfw/oxfw-stream.c return set_rate(oxfw, rate); set_rate 373 sound/pci/ice1712/ice1712.h void (*set_rate)(struct snd_ice1712 *ice, unsigned int rate); set_rate 685 sound/pci/ice1712/ice1724.c ice->set_rate(ice, rate); set_rate 2668 sound/pci/ice1712/ice1724.c if (!ice->set_rate) set_rate 2669 sound/pci/ice1712/ice1724.c ice->set_rate = stdclock_set_rate; set_rate 633 sound/pci/ice1712/juli.c ice->set_rate = juli_set_rate; set_rate 698 sound/pci/ice1712/maya44.c ice->gpio.set_pro_rate = set_rate; set_rate 998 sound/pci/ice1712/quartet.c ice->set_rate = qtet_set_rate; set_rate 2110 sound/soc/codecs/da7219.c .set_rate = da7219_wclk_set_rate, set_rate 2115 sound/soc/codecs/da7219.c .set_rate = da7219_bclk_set_rate, set_rate 263 sound/soc/codecs/tlv320aic32x4-clk.c .set_rate = clk_aic32x4_pll_set_rate, set_rate 349 sound/soc/codecs/tlv320aic32x4-clk.c .set_rate = clk_aic32x4_div_set_rate, set_rate 377 sound/soc/codecs/tlv320aic32x4-clk.c .set_rate = clk_aic32x4_div_set_rate, set_rate 264 sound/soc/intel/skylake/skl-ssp-clk.c .set_rate = skl_clk_set_rate, set_rate 240 sound/soc/sh/fsi.c int (*set_rate)(struct device *dev, set_rate 732 sound/soc/sh/fsi.c int (*set_rate)(struct device *dev, set_rate 743 sound/soc/sh/fsi.c clock->set_rate = set_rate; set_rate 799 sound/soc/sh/fsi.c return fsi->clock.set_rate && set_rate 813 sound/soc/sh/fsi.c ret = clock->set_rate(dev, fsi); set_rate 444 sound/soc/stm/stm32_sai_sub.c .set_rate = stm32_sai_mclk_set_rate, set_rate 179 sound/spi/at73c213.c goto set_rate; set_rate 187 sound/spi/at73c213.c set_rate: set_rate 563 sound/usb/6fire/control.c rt->set_rate = usb6fire_control_set_rate; set_rate 31 sound/usb/6fire/control.h int (*set_rate)(struct control_runtime *rt, int rate); set_rate 84 sound/usb/6fire/pcm.c ret = ctrl_rt->set_rate(ctrl_rt, rt->rate);