__write_32bit_c0_register 21 arch/mips/include/asm/mipsmtregs.h #define write_c0_mvpcontrol(val) __write_32bit_c0_register($0, 1, val) __write_32bit_c0_register 27 arch/mips/include/asm/mipsmtregs.h #define write_c0_vpecontrol(val) __write_32bit_c0_register($1, 1, val) __write_32bit_c0_register 30 arch/mips/include/asm/mipsmtregs.h #define write_c0_vpeconf0(val) __write_32bit_c0_register($1, 2, val) __write_32bit_c0_register 33 arch/mips/include/asm/mipsmtregs.h #define write_c0_vpeconf1(val) __write_32bit_c0_register($1, 3, val) __write_32bit_c0_register 36 arch/mips/include/asm/mipsmtregs.h #define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val) __write_32bit_c0_register 40 arch/mips/include/asm/mipsmtregs.h #define write_c0_tchalt(val) __write_32bit_c0_register($2, 4, val) __write_32bit_c0_register 43 arch/mips/include/asm/mipsmtregs.h #define write_c0_tccontext(val) __write_32bit_c0_register($2, 5, val) __write_32bit_c0_register 1448 arch/mips/include/asm/mipsregs.h __write_32bit_c0_register(reg, sel, val); \ __write_32bit_c0_register 1583 arch/mips/include/asm/mipsregs.h #define write_c0_index(val) __write_32bit_c0_register($0, 0, val) __write_32bit_c0_register 1586 arch/mips/include/asm/mipsregs.h #define write_c0_random(val) __write_32bit_c0_register($1, 0, val) __write_32bit_c0_register 1601 arch/mips/include/asm/mipsregs.h #define write_c0_conf(val) __write_32bit_c0_register($3, 0, val) __write_32bit_c0_register 1609 arch/mips/include/asm/mipsregs.h #define write_c0_contextconfig(val) __write_32bit_c0_register($4, 1, val) __write_32bit_c0_register 1618 arch/mips/include/asm/mipsregs.h #define write_c0_memorymapid(val) __write_32bit_c0_register($4, 5, val) __write_32bit_c0_register 1621 arch/mips/include/asm/mipsregs.h #define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val) __write_32bit_c0_register 1624 arch/mips/include/asm/mipsregs.h #define write_c0_pagegrain(val) __write_32bit_c0_register($5, 1, val) __write_32bit_c0_register 1627 arch/mips/include/asm/mipsregs.h #define write_c0_wired(val) __write_32bit_c0_register($6, 0, val) __write_32bit_c0_register 1632 arch/mips/include/asm/mipsregs.h #define write_c0_cache(val) __write_32bit_c0_register($7, 0, val) __write_32bit_c0_register 1641 arch/mips/include/asm/mipsregs.h #define write_c0_count(val) __write_32bit_c0_register($9, 0, val) __write_32bit_c0_register 1644 arch/mips/include/asm/mipsregs.h #define write_c0_count2(val) __write_32bit_c0_register($9, 6, val) __write_32bit_c0_register 1647 arch/mips/include/asm/mipsregs.h #define write_c0_count3(val) __write_32bit_c0_register($9, 7, val) __write_32bit_c0_register 1653 arch/mips/include/asm/mipsregs.h #define write_c0_guestctl1(val) __write_32bit_c0_register($10, 4, val) __write_32bit_c0_register 1656 arch/mips/include/asm/mipsregs.h #define write_c0_guestctl2(val) __write_32bit_c0_register($10, 5, val) __write_32bit_c0_register 1659 arch/mips/include/asm/mipsregs.h #define write_c0_guestctl3(val) __write_32bit_c0_register($10, 6, val) __write_32bit_c0_register 1662 arch/mips/include/asm/mipsregs.h #define write_c0_compare(val) __write_32bit_c0_register($11, 0, val) __write_32bit_c0_register 1665 arch/mips/include/asm/mipsregs.h #define write_c0_guestctl0ext(val) __write_32bit_c0_register($11, 4, val) __write_32bit_c0_register 1668 arch/mips/include/asm/mipsregs.h #define write_c0_compare2(val) __write_32bit_c0_register($11, 6, val) __write_32bit_c0_register 1671 arch/mips/include/asm/mipsregs.h #define write_c0_compare3(val) __write_32bit_c0_register($11, 7, val) __write_32bit_c0_register 1675 arch/mips/include/asm/mipsregs.h #define write_c0_status(val) __write_32bit_c0_register($12, 0, val) __write_32bit_c0_register 1678 arch/mips/include/asm/mipsregs.h #define write_c0_guestctl0(val) __write_32bit_c0_register($12, 6, val) __write_32bit_c0_register 1681 arch/mips/include/asm/mipsregs.h #define write_c0_gtoffset(val) __write_32bit_c0_register($12, 7, val) __write_32bit_c0_register 1684 arch/mips/include/asm/mipsregs.h #define write_c0_cause(val) __write_32bit_c0_register($13, 0, val) __write_32bit_c0_register 1701 arch/mips/include/asm/mipsregs.h #define write_c0_config(val) __write_32bit_c0_register($16, 0, val) __write_32bit_c0_register 1702 arch/mips/include/asm/mipsregs.h #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val) __write_32bit_c0_register 1703 arch/mips/include/asm/mipsregs.h #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val) __write_32bit_c0_register 1704 arch/mips/include/asm/mipsregs.h #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val) __write_32bit_c0_register 1705 arch/mips/include/asm/mipsregs.h #define write_c0_config4(val) __write_32bit_c0_register($16, 4, val) __write_32bit_c0_register 1706 arch/mips/include/asm/mipsregs.h #define write_c0_config5(val) __write_32bit_c0_register($16, 5, val) __write_32bit_c0_register 1707 arch/mips/include/asm/mipsregs.h #define write_c0_config6(val) __write_32bit_c0_register($16, 6, val) __write_32bit_c0_register 1708 arch/mips/include/asm/mipsregs.h #define write_c0_config7(val) __write_32bit_c0_register($16, 7, val) __write_32bit_c0_register 1715 arch/mips/include/asm/mipsregs.h #define write_c0_maari(val) __write_32bit_c0_register($17, 2, val) __write_32bit_c0_register 1749 arch/mips/include/asm/mipsregs.h #define write_c0_watchhi0(val) __write_32bit_c0_register($19, 0, val) __write_32bit_c0_register 1750 arch/mips/include/asm/mipsregs.h #define write_c0_watchhi1(val) __write_32bit_c0_register($19, 1, val) __write_32bit_c0_register 1751 arch/mips/include/asm/mipsregs.h #define write_c0_watchhi2(val) __write_32bit_c0_register($19, 2, val) __write_32bit_c0_register 1752 arch/mips/include/asm/mipsregs.h #define write_c0_watchhi3(val) __write_32bit_c0_register($19, 3, val) __write_32bit_c0_register 1753 arch/mips/include/asm/mipsregs.h #define write_c0_watchhi4(val) __write_32bit_c0_register($19, 4, val) __write_32bit_c0_register 1754 arch/mips/include/asm/mipsregs.h #define write_c0_watchhi5(val) __write_32bit_c0_register($19, 5, val) __write_32bit_c0_register 1755 arch/mips/include/asm/mipsregs.h #define write_c0_watchhi6(val) __write_32bit_c0_register($19, 6, val) __write_32bit_c0_register 1756 arch/mips/include/asm/mipsregs.h #define write_c0_watchhi7(val) __write_32bit_c0_register($19, 7, val) __write_32bit_c0_register 1765 arch/mips/include/asm/mipsregs.h #define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val) __write_32bit_c0_register 1768 arch/mips/include/asm/mipsregs.h #define write_c0_diag(val) __write_32bit_c0_register($22, 0, val) __write_32bit_c0_register 1775 arch/mips/include/asm/mipsregs.h #define write_c0_diag1(val) __write_32bit_c0_register($22, 1, val) __write_32bit_c0_register 1778 arch/mips/include/asm/mipsregs.h #define write_c0_diag2(val) __write_32bit_c0_register($22, 2, val) __write_32bit_c0_register 1781 arch/mips/include/asm/mipsregs.h #define write_c0_diag3(val) __write_32bit_c0_register($22, 3, val) __write_32bit_c0_register 1784 arch/mips/include/asm/mipsregs.h #define write_c0_diag4(val) __write_32bit_c0_register($22, 4, val) __write_32bit_c0_register 1787 arch/mips/include/asm/mipsregs.h #define write_c0_diag5(val) __write_32bit_c0_register($22, 5, val) __write_32bit_c0_register 1790 arch/mips/include/asm/mipsregs.h #define write_c0_debug(val) __write_32bit_c0_register($23, 0, val) __write_32bit_c0_register 1799 arch/mips/include/asm/mipsregs.h #define write_c0_perfctrl0(val) __write_32bit_c0_register($25, 0, val) __write_32bit_c0_register 1801 arch/mips/include/asm/mipsregs.h #define write_c0_perfcntr0(val) __write_32bit_c0_register($25, 1, val) __write_32bit_c0_register 1805 arch/mips/include/asm/mipsregs.h #define write_c0_perfctrl1(val) __write_32bit_c0_register($25, 2, val) __write_32bit_c0_register 1807 arch/mips/include/asm/mipsregs.h #define write_c0_perfcntr1(val) __write_32bit_c0_register($25, 3, val) __write_32bit_c0_register 1811 arch/mips/include/asm/mipsregs.h #define write_c0_perfctrl2(val) __write_32bit_c0_register($25, 4, val) __write_32bit_c0_register 1813 arch/mips/include/asm/mipsregs.h #define write_c0_perfcntr2(val) __write_32bit_c0_register($25, 5, val) __write_32bit_c0_register 1817 arch/mips/include/asm/mipsregs.h #define write_c0_perfctrl3(val) __write_32bit_c0_register($25, 6, val) __write_32bit_c0_register 1819 arch/mips/include/asm/mipsregs.h #define write_c0_perfcntr3(val) __write_32bit_c0_register($25, 7, val) __write_32bit_c0_register 1824 arch/mips/include/asm/mipsregs.h #define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val) __write_32bit_c0_register 1835 arch/mips/include/asm/mipsregs.h #define write_c0_taglo(val) __write_32bit_c0_register($28, 0, val) __write_32bit_c0_register 1838 arch/mips/include/asm/mipsregs.h #define write_c0_dtaglo(val) __write_32bit_c0_register($28, 2, val) __write_32bit_c0_register 1841 arch/mips/include/asm/mipsregs.h #define write_c0_ddatalo(val) __write_32bit_c0_register($28, 3, val) __write_32bit_c0_register 1844 arch/mips/include/asm/mipsregs.h #define write_c0_staglo(val) __write_32bit_c0_register($28, 4, val) __write_32bit_c0_register 1847 arch/mips/include/asm/mipsregs.h #define write_c0_taghi(val) __write_32bit_c0_register($29, 0, val) __write_32bit_c0_register 1854 arch/mips/include/asm/mipsregs.h #define write_c0_hwrena(val) __write_32bit_c0_register($7, 0, val) __write_32bit_c0_register 1857 arch/mips/include/asm/mipsregs.h #define write_c0_intctl(val) __write_32bit_c0_register($12, 1, val) __write_32bit_c0_register 1860 arch/mips/include/asm/mipsregs.h #define write_c0_srsctl(val) __write_32bit_c0_register($12, 2, val) __write_32bit_c0_register 1863 arch/mips/include/asm/mipsregs.h #define write_c0_srsmap(val) __write_32bit_c0_register($12, 3, val) __write_32bit_c0_register 1866 arch/mips/include/asm/mipsregs.h #define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val) __write_32bit_c0_register 1876 arch/mips/include/asm/mipsregs.h #define write_c0_segctl0(val) __write_32bit_c0_register($5, 2, val) __write_32bit_c0_register 1879 arch/mips/include/asm/mipsregs.h #define write_c0_segctl1(val) __write_32bit_c0_register($5, 3, val) __write_32bit_c0_register 1882 arch/mips/include/asm/mipsregs.h #define write_c0_segctl2(val) __write_32bit_c0_register($5, 4, val) __write_32bit_c0_register 1895 arch/mips/include/asm/mipsregs.h #define write_c0_pwctl(val) __write_32bit_c0_register($6, 6, val) __write_32bit_c0_register 1931 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_config_0(val) __write_32bit_c0_register($22, 0, val) __write_32bit_c0_register 1934 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_bus_pll(val) __write_32bit_c0_register($22, 4, val) __write_32bit_c0_register 1937 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_reset(val) __write_32bit_c0_register($22, 5, val) __write_32bit_c0_register 1941 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_cmt_intr(val) __write_32bit_c0_register($22, 1, val) __write_32bit_c0_register 1944 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_cmt_ctrl(val) __write_32bit_c0_register($22, 2, val) __write_32bit_c0_register 1947 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_cmt_local(val) __write_32bit_c0_register($22, 3, val) __write_32bit_c0_register 1950 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_config_1(val) __write_32bit_c0_register($22, 5, val) __write_32bit_c0_register 1953 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_cbr(val) __write_32bit_c0_register($22, 6, val) __write_32bit_c0_register 1957 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_config(val) __write_32bit_c0_register($22, 0, val) __write_32bit_c0_register 1960 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_mode(val) __write_32bit_c0_register($22, 1, val) __write_32bit_c0_register 1963 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_action(val) __write_32bit_c0_register($22, 2, val) __write_32bit_c0_register 1966 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_edsp(val) __write_32bit_c0_register($22, 3, val) __write_32bit_c0_register 1969 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_bootvec(val) __write_32bit_c0_register($22, 4, val) __write_32bit_c0_register 1972 arch/mips/include/asm/mipsregs.h #define write_c0_brcm_sleepcount(val) __write_32bit_c0_register($22, 7, val) __write_32bit_c0_register 41 arch/mips/loongson64/loongson-3/numa.c __write_32bit_c0_register($16, 3, value); __write_32bit_c0_register 47 arch/mips/loongson64/loongson-3/numa.c __write_32bit_c0_register($5, 1, value);