__write_32bit_gc0_register 2064 arch/mips/include/asm/mipsregs.h __write_32bit_gc0_register(reg, sel, val); \ __write_32bit_gc0_register 2070 arch/mips/include/asm/mipsregs.h #define write_gc0_index(val) __write_32bit_gc0_register($0, 0, val) __write_32bit_gc0_register 2082 arch/mips/include/asm/mipsregs.h #define write_gc0_contextconfig(val) __write_32bit_gc0_register($4, 1, val) __write_32bit_gc0_register 2091 arch/mips/include/asm/mipsregs.h #define write_gc0_pagemask(val) __write_32bit_gc0_register($5, 0, val) __write_32bit_gc0_register 2094 arch/mips/include/asm/mipsregs.h #define write_gc0_pagegrain(val) __write_32bit_gc0_register($5, 1, val) __write_32bit_gc0_register 2115 arch/mips/include/asm/mipsregs.h #define write_gc0_wired(val) __write_32bit_gc0_register($6, 0, val) __write_32bit_gc0_register 2118 arch/mips/include/asm/mipsregs.h #define write_gc0_pwctl(val) __write_32bit_gc0_register($6, 6, val) __write_32bit_gc0_register 2121 arch/mips/include/asm/mipsregs.h #define write_gc0_hwrena(val) __write_32bit_gc0_register($7, 0, val) __write_32bit_gc0_register 2127 arch/mips/include/asm/mipsregs.h #define write_gc0_badinstr(val) __write_32bit_gc0_register($8, 1, val) __write_32bit_gc0_register 2130 arch/mips/include/asm/mipsregs.h #define write_gc0_badinstrp(val) __write_32bit_gc0_register($8, 2, val) __write_32bit_gc0_register 2138 arch/mips/include/asm/mipsregs.h #define write_gc0_compare(val) __write_32bit_gc0_register($11, 0, val) __write_32bit_gc0_register 2141 arch/mips/include/asm/mipsregs.h #define write_gc0_status(val) __write_32bit_gc0_register($12, 0, val) __write_32bit_gc0_register 2144 arch/mips/include/asm/mipsregs.h #define write_gc0_intctl(val) __write_32bit_gc0_register($12, 1, val) __write_32bit_gc0_register 2147 arch/mips/include/asm/mipsregs.h #define write_gc0_cause(val) __write_32bit_gc0_register($13, 0, val) __write_32bit_gc0_register 2155 arch/mips/include/asm/mipsregs.h #define write_gc0_ebase(val) __write_32bit_gc0_register($15, 1, val) __write_32bit_gc0_register 2168 arch/mips/include/asm/mipsregs.h #define write_gc0_config(val) __write_32bit_gc0_register($16, 0, val) __write_32bit_gc0_register 2169 arch/mips/include/asm/mipsregs.h #define write_gc0_config1(val) __write_32bit_gc0_register($16, 1, val) __write_32bit_gc0_register 2170 arch/mips/include/asm/mipsregs.h #define write_gc0_config2(val) __write_32bit_gc0_register($16, 2, val) __write_32bit_gc0_register 2171 arch/mips/include/asm/mipsregs.h #define write_gc0_config3(val) __write_32bit_gc0_register($16, 3, val) __write_32bit_gc0_register 2172 arch/mips/include/asm/mipsregs.h #define write_gc0_config4(val) __write_32bit_gc0_register($16, 4, val) __write_32bit_gc0_register 2173 arch/mips/include/asm/mipsregs.h #define write_gc0_config5(val) __write_32bit_gc0_register($16, 5, val) __write_32bit_gc0_register 2174 arch/mips/include/asm/mipsregs.h #define write_gc0_config6(val) __write_32bit_gc0_register($16, 6, val) __write_32bit_gc0_register 2175 arch/mips/include/asm/mipsregs.h #define write_gc0_config7(val) __write_32bit_gc0_register($16, 7, val) __write_32bit_gc0_register 2205 arch/mips/include/asm/mipsregs.h #define write_gc0_watchhi0(val) __write_32bit_gc0_register($19, 0, val) __write_32bit_gc0_register 2206 arch/mips/include/asm/mipsregs.h #define write_gc0_watchhi1(val) __write_32bit_gc0_register($19, 1, val) __write_32bit_gc0_register 2207 arch/mips/include/asm/mipsregs.h #define write_gc0_watchhi2(val) __write_32bit_gc0_register($19, 2, val) __write_32bit_gc0_register 2208 arch/mips/include/asm/mipsregs.h #define write_gc0_watchhi3(val) __write_32bit_gc0_register($19, 3, val) __write_32bit_gc0_register 2209 arch/mips/include/asm/mipsregs.h #define write_gc0_watchhi4(val) __write_32bit_gc0_register($19, 4, val) __write_32bit_gc0_register 2210 arch/mips/include/asm/mipsregs.h #define write_gc0_watchhi5(val) __write_32bit_gc0_register($19, 5, val) __write_32bit_gc0_register 2211 arch/mips/include/asm/mipsregs.h #define write_gc0_watchhi6(val) __write_32bit_gc0_register($19, 6, val) __write_32bit_gc0_register 2212 arch/mips/include/asm/mipsregs.h #define write_gc0_watchhi7(val) __write_32bit_gc0_register($19, 7, val) __write_32bit_gc0_register 2218 arch/mips/include/asm/mipsregs.h #define write_gc0_perfctrl0(val) __write_32bit_gc0_register($25, 0, val) __write_32bit_gc0_register 2220 arch/mips/include/asm/mipsregs.h #define write_gc0_perfcntr0(val) __write_32bit_gc0_register($25, 1, val) __write_32bit_gc0_register 2224 arch/mips/include/asm/mipsregs.h #define write_gc0_perfctrl1(val) __write_32bit_gc0_register($25, 2, val) __write_32bit_gc0_register 2226 arch/mips/include/asm/mipsregs.h #define write_gc0_perfcntr1(val) __write_32bit_gc0_register($25, 3, val) __write_32bit_gc0_register 2230 arch/mips/include/asm/mipsregs.h #define write_gc0_perfctrl2(val) __write_32bit_gc0_register($25, 4, val) __write_32bit_gc0_register 2232 arch/mips/include/asm/mipsregs.h #define write_gc0_perfcntr2(val) __write_32bit_gc0_register($25, 5, val) __write_32bit_gc0_register 2236 arch/mips/include/asm/mipsregs.h #define write_gc0_perfctrl3(val) __write_32bit_gc0_register($25, 6, val) __write_32bit_gc0_register 2238 arch/mips/include/asm/mipsregs.h #define write_gc0_perfcntr3(val) __write_32bit_gc0_register($25, 7, val)