arch/arm/mach-sa1100/badge4.c

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This source file includes following definitions.
badge4_sa1111_enable
badge4_sa1111_disable
badge4_sa1111_init
five_v_on_setup
badge4_init
badge4_set_5V
badge4_uart_pm
badge4_map_io
   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * linux/arch/arm/mach-sa1100/badge4.c
   4  *
   5  * BadgePAD 4 specific initialization
   6  *
   7  *   Tim Connors <connors@hpl.hp.com>
   8  *   Christopher Hoover <ch@hpl.hp.com>
   9  *
  10  * Copyright (C) 2002 Hewlett-Packard Company
  11  */
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/kernel.h>
  15 #include <linux/platform_data/sa11x0-serial.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/delay.h>
  18 #include <linux/tty.h>
  19 #include <linux/mtd/mtd.h>
  20 #include <linux/mtd/partitions.h>
  21 #include <linux/errno.h>
  22 #include <linux/gpio.h>
  23 #include <linux/leds.h>
  24 
  25 #include <mach/hardware.h>
  26 #include <asm/mach-types.h>
  27 #include <asm/setup.h>
  28 #include <mach/irqs.h>
  29 
  30 #include <asm/mach/arch.h>
  31 #include <asm/mach/flash.h>
  32 #include <asm/mach/map.h>
  33 #include <asm/hardware/sa1111.h>
  34 
  35 #include <mach/badge4.h>
  36 
  37 #include "generic.h"
  38 
  39 static struct resource sa1111_resources[] = {
  40         [0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000),
  41         [1] = DEFINE_RES_IRQ(BADGE4_IRQ_GPIO_SA1111),
  42 };
  43 
  44 static int badge4_sa1111_enable(void *data, unsigned devid)
  45 {
  46         if (devid == SA1111_DEVID_USB)
  47                 badge4_set_5V(BADGE4_5V_USB, 1);
  48         return 0;
  49 }
  50 
  51 static void badge4_sa1111_disable(void *data, unsigned devid)
  52 {
  53         if (devid == SA1111_DEVID_USB)
  54                 badge4_set_5V(BADGE4_5V_USB, 0);
  55 }
  56 
  57 static struct sa1111_platform_data sa1111_info = {
  58         .disable_devs   = SA1111_DEVID_PS2_MSE,
  59         .enable         = badge4_sa1111_enable,
  60         .disable        = badge4_sa1111_disable,
  61 };
  62 
  63 static u64 sa1111_dmamask = 0xffffffffUL;
  64 
  65 static struct platform_device sa1111_device = {
  66         .name           = "sa1111",
  67         .id             = 0,
  68         .dev            = {
  69                 .dma_mask = &sa1111_dmamask,
  70                 .coherent_dma_mask = 0xffffffff,
  71                 .platform_data = &sa1111_info,
  72         },
  73         .num_resources  = ARRAY_SIZE(sa1111_resources),
  74         .resource       = sa1111_resources,
  75 };
  76 
  77 /* LEDs */
  78 struct gpio_led badge4_gpio_leds[] = {
  79         {
  80                 .name                   = "badge4:red",
  81                 .default_trigger        = "heartbeat",
  82                 .gpio                   = 7,
  83         },
  84         {
  85                 .name                   = "badge4:green",
  86                 .default_trigger        = "cpu0",
  87                 .gpio                   = 9,
  88         },
  89 };
  90 
  91 static struct gpio_led_platform_data badge4_gpio_led_info = {
  92         .leds           = badge4_gpio_leds,
  93         .num_leds       = ARRAY_SIZE(badge4_gpio_leds),
  94 };
  95 
  96 static struct platform_device badge4_leds = {
  97         .name   = "leds-gpio",
  98         .id     = -1,
  99         .dev    = {
 100                 .platform_data  = &badge4_gpio_led_info,
 101         }
 102 };
 103 
 104 static struct platform_device *devices[] __initdata = {
 105         &sa1111_device,
 106         &badge4_leds,
 107 };
 108 
 109 static int __init badge4_sa1111_init(void)
 110 {
 111         /*
 112          * Ensure that the memory bus request/grant signals are setup,
 113          * and the grant is held in its inactive state
 114          */
 115         sa1110_mb_disable();
 116 
 117         /*
 118          * Probe for SA1111.
 119          */
 120         return platform_add_devices(devices, ARRAY_SIZE(devices));
 121 }
 122 
 123 
 124 /*
 125  * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit)
 126  *   Eight 4 KiW Parameter Bottom Blocks (64 KiB)
 127  *   Sixty-three 32 KiW Main Blocks (4032 Ki b)
 128  *
 129  * <or>
 130  *
 131  * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit)
 132  *   Eight 4 KiW Parameter Bottom Blocks (64 KiB)
 133  *   One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
 134  */
 135 static struct mtd_partition badge4_partitions[] = {
 136         {
 137                 .name   = "BLOB boot loader",
 138                 .offset = 0,
 139                 .size   = 0x0000A000
 140         }, {
 141                 .name   = "params",
 142                 .offset = MTDPART_OFS_APPEND,
 143                 .size   = 0x00006000
 144         }, {
 145                 .name   = "root",
 146                 .offset = MTDPART_OFS_APPEND,
 147                 .size   = MTDPART_SIZ_FULL
 148         }
 149 };
 150 
 151 static struct flash_platform_data badge4_flash_data = {
 152         .map_name       = "cfi_probe",
 153         .parts          = badge4_partitions,
 154         .nr_parts       = ARRAY_SIZE(badge4_partitions),
 155 };
 156 
 157 static struct resource badge4_flash_resource =
 158         DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
 159 
 160 static int five_v_on __initdata = 0;
 161 
 162 static int __init five_v_on_setup(char *ignore)
 163 {
 164         five_v_on = 1;
 165         return 1;
 166 }
 167 __setup("five_v_on", five_v_on_setup);
 168 
 169 
 170 static int __init badge4_init(void)
 171 {
 172         int ret;
 173 
 174         if (!machine_is_badge4())
 175                 return -ENODEV;
 176 
 177         /* LCD */
 178         GPCR  = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
 179                  BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
 180                  BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
 181                  BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
 182                  BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
 183                  BADGE4_GPIO_GPC_VID);
 184         GPDR &= ~BADGE4_GPIO_INT_VID;
 185         GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
 186                  BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
 187                  BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
 188                  BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
 189                  BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
 190                  BADGE4_GPIO_GPC_VID);
 191 
 192         /* SDRAM SPD i2c */
 193         GPCR  = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
 194         GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
 195 
 196         /* uart */
 197         GPCR  = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
 198         GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
 199 
 200         /* CPLD muxsel0 input for mux/adc chip select */
 201         GPCR  = BADGE4_GPIO_MUXSEL0;
 202         GPDR |= BADGE4_GPIO_MUXSEL0;
 203 
 204         /* test points: J5, J6 as inputs, J7 outputs */
 205         GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6);
 206         GPCR  = BADGE4_GPIO_TESTPT_J7;
 207         GPDR |= BADGE4_GPIO_TESTPT_J7;
 208 
 209         /* 5V supply rail. */
 210         GPCR  = BADGE4_GPIO_PCMEN5V;            /* initially off */
 211         GPDR |= BADGE4_GPIO_PCMEN5V;
 212 
 213         /* CPLD sdram type inputs; set up by blob */
 214         //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
 215         printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
 216                 !!(GPLR & BADGE4_GPIO_SDTYP1),
 217                 !!(GPLR & BADGE4_GPIO_SDTYP0));
 218 
 219         /* SA1111 reset pin; set up by blob */
 220         //GPSR  = BADGE4_GPIO_SA1111_NRST;
 221         //GPDR |= BADGE4_GPIO_SA1111_NRST;
 222 
 223 
 224         /* power management cruft */
 225         PGSR = 0;
 226         PWER = 0;
 227         PCFR = 0;
 228         PSDR = 0;
 229 
 230         PWER |= PWER_GPIO26;    /* wake up on an edge from TESTPT_J5 */
 231         PWER |= PWER_RTC;       /* wake up if rtc fires */
 232 
 233         /* drive sa1111_nrst during sleep */
 234         PGSR |= BADGE4_GPIO_SA1111_NRST;
 235         /* drive CPLD as is during sleep */
 236         PGSR |= (GPLR & (BADGE4_GPIO_SDTYP0|BADGE4_GPIO_SDTYP1));
 237 
 238 
 239         /* Now bring up the SA-1111. */
 240         ret = badge4_sa1111_init();
 241         if (ret < 0)
 242                 printk(KERN_ERR
 243                         "%s: SA-1111 initialization failed (%d)\n",
 244                         __func__, ret);
 245 
 246 
 247         /* maybe turn on 5v0 from the start */
 248         badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on);
 249 
 250         sa11x0_register_mtd(&badge4_flash_data, &badge4_flash_resource, 1);
 251 
 252         return 0;
 253 }
 254 
 255 arch_initcall(badge4_init);
 256 
 257 
 258 static unsigned badge4_5V_bitmap = 0;
 259 
 260 void badge4_set_5V(unsigned subsystem, int on)
 261 {
 262         unsigned long flags;
 263         unsigned old_5V_bitmap;
 264 
 265         local_irq_save(flags);
 266 
 267         old_5V_bitmap = badge4_5V_bitmap;
 268 
 269         if (on) {
 270                 badge4_5V_bitmap |= subsystem;
 271         } else {
 272                 badge4_5V_bitmap &= ~subsystem;
 273         }
 274 
 275         /* detect on->off and off->on transitions */
 276         if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
 277                 /* was off, now on */
 278                 printk(KERN_INFO "%s: enabling 5V supply rail\n", __func__);
 279                 GPSR = BADGE4_GPIO_PCMEN5V;
 280         } else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
 281                 /* was on, now off */
 282                 printk(KERN_INFO "%s: disabling 5V supply rail\n", __func__);
 283                 GPCR = BADGE4_GPIO_PCMEN5V;
 284         }
 285 
 286         local_irq_restore(flags);
 287 }
 288 EXPORT_SYMBOL(badge4_set_5V);
 289 
 290 
 291 static struct map_desc badge4_io_desc[] __initdata = {
 292         {       /* SRAM  bank 1 */
 293                 .virtual        = 0xf1000000,
 294                 .pfn            = __phys_to_pfn(0x08000000),
 295                 .length         = 0x00100000,
 296                 .type           = MT_DEVICE
 297         }, {    /* SRAM  bank 2 */
 298                 .virtual        = 0xf2000000,
 299                 .pfn            = __phys_to_pfn(0x10000000),
 300                 .length         = 0x00100000,
 301                 .type           = MT_DEVICE
 302         }
 303 };
 304 
 305 static void
 306 badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
 307 {
 308         if (!state) {
 309                 Ser1SDCR0 |= SDCR0_UART;
 310         }
 311 }
 312 
 313 static struct sa1100_port_fns badge4_port_fns __initdata = {
 314         .pm             = badge4_uart_pm,
 315 };
 316 
 317 static void __init badge4_map_io(void)
 318 {
 319         sa1100_map_io();
 320         iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc));
 321 
 322         sa1100_register_uart_fns(&badge4_port_fns);
 323         sa1100_register_uart(0, 3);
 324         sa1100_register_uart(1, 1);
 325 }
 326 
 327 MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
 328         .atag_offset    = 0x100,
 329         .map_io         = badge4_map_io,
 330         .nr_irqs        = SA1100_NR_IRQS,
 331         .init_irq       = sa1100_init_irq,
 332         .init_late      = sa11x0_init_late,
 333         .init_time      = sa1100_timer_init,
 334 #ifdef CONFIG_SA1111
 335         .dma_zone_size  = SZ_1M,
 336 #endif
 337         .restart        = sa11x0_restart,
 338 MACHINE_END
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root/arch/arm/mach-sa1100/badge4.c

DEFINITIONS
