This source file includes following definitions.
- sa11x0_getspeed
- sa1100_power_off
- sa11x0_restart
- sa11x0_register_device
- sa11x0_ppc_configure_mcp
- sa11x0_register_mcp
- sa11x0_register_lcd
- sa11x0_register_pcmcia
- sa11x0_register_mtd
- sa11x0_register_irda
- sa1100_init
- sa11x0_init_late
- sa11x0_register_fixed_regulator
- sa1100_map_io
- sa1100_timer_init
- sa1100_init_irq
- sa1110_mb_disable
- sa1110_mb_enable
- sa11x0_gpio_set_wake
- sa11x0_sc_set_wake
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9 #include <linux/gpio.h>
10 #include <linux/gpio/machine.h>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/pm.h>
17 #include <linux/cpufreq.h>
18 #include <linux/ioport.h>
19 #include <linux/platform_device.h>
20 #include <linux/reboot.h>
21 #include <linux/regulator/fixed.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/irqchip/irq-sa11x0.h>
24
25 #include <video/sa1100fb.h>
26
27 #include <soc/sa1100/pwer.h>
28
29 #include <asm/div64.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/flash.h>
32 #include <asm/irq.h>
33 #include <asm/system_misc.h>
34
35 #include <mach/hardware.h>
36 #include <mach/irqs.h>
37 #include <mach/reset.h>
38
39 #include "generic.h"
40 #include <clocksource/pxa.h>
41
42 unsigned int reset_status;
43 EXPORT_SYMBOL(reset_status);
44
45 #define NR_FREQS 16
46
47
48
49
50 struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
51 { .frequency = 59000, },
52 { .frequency = 73700, },
53 { .frequency = 88500, },
54 { .frequency = 103200, },
55 { .frequency = 118000, },
56 { .frequency = 132700, },
57 { .frequency = 147500, },
58 { .frequency = 162200, },
59 { .frequency = 176900, },
60 { .frequency = 191700, },
61 { .frequency = 206400, },
62 { .frequency = 221200, },
63 { .frequency = 235900, },
64 { .frequency = 250700, },
65 { .frequency = 265400, },
66 { .frequency = 280200, },
67 { .frequency = CPUFREQ_TABLE_END, },
68 };
69
70 unsigned int sa11x0_getspeed(unsigned int cpu)
71 {
72 if (cpu)
73 return 0;
74 return sa11x0_freq_table[PPCR & 0xf].frequency;
75 }
76
77
78
79
80 static void sa1100_power_off(void)
81 {
82 mdelay(100);
83 local_irq_disable();
84
85 PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
86
87 PWER = GFER = GRER = 1;
88
89
90
91
92 PSPR = 0;
93
94 PMCR = PMCR_SF;
95 }
96
97 void sa11x0_restart(enum reboot_mode mode, const char *cmd)
98 {
99 clear_reset_status(RESET_STATUS_ALL);
100
101 if (mode == REBOOT_SOFT) {
102
103 soft_restart(0);
104 } else {
105
106 RSRR = RSRR_SWR;
107 }
108 }
109
110 static void sa11x0_register_device(struct platform_device *dev, void *data)
111 {
112 int err;
113 dev->dev.platform_data = data;
114 err = platform_device_register(dev);
115 if (err)
116 printk(KERN_ERR "Unable to register device %s: %d\n",
117 dev->name, err);
118 }
119
120
121 static struct resource sa11x0udc_resources[] = {
122 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
123 [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
124 };
125
126 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
127
128 static struct platform_device sa11x0udc_device = {
129 .name = "sa11x0-udc",
130 .id = -1,
131 .dev = {
132 .dma_mask = &sa11x0udc_dma_mask,
133 .coherent_dma_mask = 0xffffffff,
134 },
135 .num_resources = ARRAY_SIZE(sa11x0udc_resources),
136 .resource = sa11x0udc_resources,
137 };
138
139 static struct resource sa11x0uart1_resources[] = {
140 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
141 [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
142 };
143
144 static struct platform_device sa11x0uart1_device = {
145 .name = "sa11x0-uart",
146 .id = 1,
147 .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
148 .resource = sa11x0uart1_resources,
149 };
150
151 static struct resource sa11x0uart3_resources[] = {
152 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
153 [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
154 };
155
156 static struct platform_device sa11x0uart3_device = {
157 .name = "sa11x0-uart",
158 .id = 3,
159 .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
160 .resource = sa11x0uart3_resources,
161 };
162
163 static struct resource sa11x0mcp_resources[] = {
164 [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
165 [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
166 [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
167 };
168
169 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
170
171 static struct platform_device sa11x0mcp_device = {
172 .name = "sa11x0-mcp",
173 .id = -1,
174 .dev = {
175 .dma_mask = &sa11x0mcp_dma_mask,
176 .coherent_dma_mask = 0xffffffff,
177 },
178 .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
179 .resource = sa11x0mcp_resources,
180 };
181
182 void __init sa11x0_ppc_configure_mcp(void)
183 {
184
185 PPDR &= ~PPC_RXD4;
186 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
187 PSDR |= PPC_RXD4;
188 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
189 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
190 }
191
192 void sa11x0_register_mcp(struct mcp_plat_data *data)
193 {
194 sa11x0_register_device(&sa11x0mcp_device, data);
195 }
196
197 static struct resource sa11x0ssp_resources[] = {
198 [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
199 [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
200 };
201
202 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
203
204 static struct platform_device sa11x0ssp_device = {
205 .name = "sa11x0-ssp",
206 .id = -1,
207 .dev = {
208 .dma_mask = &sa11x0ssp_dma_mask,
209 .coherent_dma_mask = 0xffffffff,
210 },
211 .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
212 .resource = sa11x0ssp_resources,
213 };
214
215 static struct resource sa11x0fb_resources[] = {
216 [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
217 [1] = DEFINE_RES_IRQ(IRQ_LCD),
218 };
219
220 static struct platform_device sa11x0fb_device = {
221 .name = "sa11x0-fb",
222 .id = -1,
223 .dev = {
224 .coherent_dma_mask = 0xffffffff,
225 },
226 .num_resources = ARRAY_SIZE(sa11x0fb_resources),
227 .resource = sa11x0fb_resources,
228 };
229
230 void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
231 {
232 sa11x0_register_device(&sa11x0fb_device, inf);
233 }
234
235 void sa11x0_register_pcmcia(int socket, struct gpiod_lookup_table *table)
236 {
237 if (table)
238 gpiod_add_lookup_table(table);
239 platform_device_register_simple("sa11x0-pcmcia", socket, NULL, 0);
240 }
241
242 static struct platform_device sa11x0mtd_device = {
243 .name = "sa1100-mtd",
244 .id = -1,
245 };
246
247 void sa11x0_register_mtd(struct flash_platform_data *flash,
248 struct resource *res, int nr)
249 {
250 flash->name = "sa1100";
251 sa11x0mtd_device.resource = res;
252 sa11x0mtd_device.num_resources = nr;
253 sa11x0_register_device(&sa11x0mtd_device, flash);
254 }
255
256 static struct resource sa11x0ir_resources[] = {
257 DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
258 DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
259 DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
260 DEFINE_RES_IRQ(IRQ_Ser2ICP),
261 };
262
263 static struct platform_device sa11x0ir_device = {
264 .name = "sa11x0-ir",
265 .id = -1,
266 .num_resources = ARRAY_SIZE(sa11x0ir_resources),
267 .resource = sa11x0ir_resources,
268 };
269
270 void sa11x0_register_irda(struct irda_platform_data *irda)
271 {
272 sa11x0_register_device(&sa11x0ir_device, irda);
273 }
274
275 static struct resource sa1100_rtc_resources[] = {
276 DEFINE_RES_MEM(0x90010000, 0x40),
277 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
278 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
279 };
280
281 static struct platform_device sa11x0rtc_device = {
282 .name = "sa1100-rtc",
283 .id = -1,
284 .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
285 .resource = sa1100_rtc_resources,
286 };
287
288 static struct resource sa11x0dma_resources[] = {
289 DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
290 DEFINE_RES_IRQ(IRQ_DMA0),
291 DEFINE_RES_IRQ(IRQ_DMA1),
292 DEFINE_RES_IRQ(IRQ_DMA2),
293 DEFINE_RES_IRQ(IRQ_DMA3),
294 DEFINE_RES_IRQ(IRQ_DMA4),
295 DEFINE_RES_IRQ(IRQ_DMA5),
296 };
297
298 static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
299
300 static struct platform_device sa11x0dma_device = {
301 .name = "sa11x0-dma",
302 .id = -1,
303 .dev = {
304 .dma_mask = &sa11x0dma_dma_mask,
305 .coherent_dma_mask = 0xffffffff,
306 },
307 .num_resources = ARRAY_SIZE(sa11x0dma_resources),
308 .resource = sa11x0dma_resources,
309 };
310
311 static struct platform_device *sa11x0_devices[] __initdata = {
312 &sa11x0udc_device,
313 &sa11x0uart1_device,
314 &sa11x0uart3_device,
315 &sa11x0ssp_device,
316 &sa11x0rtc_device,
317 &sa11x0dma_device,
318 };
319
320 static int __init sa1100_init(void)
321 {
322 pm_power_off = sa1100_power_off;
323
324 regulator_has_full_constraints();
325
326 return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
327 }
328
329 arch_initcall(sa1100_init);
330
331 void __init sa11x0_init_late(void)
332 {
333 sa11x0_pm_init();
334 }
335
336 int __init sa11x0_register_fixed_regulator(int n,
337 struct fixed_voltage_config *cfg,
338 struct regulator_consumer_supply *supplies, unsigned num_supplies,
339 bool uses_gpio)
340 {
341 struct regulator_init_data *id;
342
343 cfg->init_data = id = kzalloc(sizeof(*cfg->init_data), GFP_KERNEL);
344 if (!cfg->init_data)
345 return -ENOMEM;
346
347 if (!uses_gpio)
348 id->constraints.always_on = 1;
349 id->constraints.name = cfg->supply_name;
350 id->constraints.min_uV = cfg->microvolts;
351 id->constraints.max_uV = cfg->microvolts;
352 id->constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
353 id->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;
354 id->consumer_supplies = supplies;
355 id->num_consumer_supplies = num_supplies;
356
357 platform_device_register_resndata(NULL, "reg-fixed-voltage", n,
358 NULL, 0, cfg, sizeof(*cfg));
359 return 0;
360 }
361
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377
378
379
380 static struct map_desc standard_io_desc[] __initdata = {
381 {
382 .virtual = 0xf8000000,
383 .pfn = __phys_to_pfn(0x80000000),
384 .length = 0x00100000,
385 .type = MT_DEVICE
386 }, {
387 .virtual = 0xfa000000,
388 .pfn = __phys_to_pfn(0x90000000),
389 .length = 0x00100000,
390 .type = MT_DEVICE
391 }, {
392 .virtual = 0xfc000000,
393 .pfn = __phys_to_pfn(0xa0000000),
394 .length = 0x00100000,
395 .type = MT_DEVICE
396 }, {
397 .virtual = 0xfe000000,
398 .pfn = __phys_to_pfn(0xb0000000),
399 .length = 0x00200000,
400 .type = MT_DEVICE
401 },
402 };
403
404 void __init sa1100_map_io(void)
405 {
406 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
407 }
408
409 void __init sa1100_timer_init(void)
410 {
411 pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000));
412 }
413
414 static struct resource irq_resource =
415 DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");
416
417 void __init sa1100_init_irq(void)
418 {
419 request_resource(&iomem_resource, &irq_resource);
420
421 sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start);
422
423 sa1100_init_gpio();
424 sa11xx_clk_init();
425 }
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430
431
432
433 void sa1110_mb_disable(void)
434 {
435 unsigned long flags;
436
437 local_irq_save(flags);
438
439 PGSR &= ~GPIO_MBGNT;
440 GPCR = GPIO_MBGNT;
441 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
442
443 GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
444
445 local_irq_restore(flags);
446 }
447
448
449
450
451
452 void sa1110_mb_enable(void)
453 {
454 unsigned long flags;
455
456 local_irq_save(flags);
457
458 PGSR &= ~GPIO_MBGNT;
459 GPCR = GPIO_MBGNT;
460 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
461
462 GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
463 TUCR |= TUCR_MR;
464
465 local_irq_restore(flags);
466 }
467
468 int sa11x0_gpio_set_wake(unsigned int gpio, unsigned int on)
469 {
470 if (on)
471 PWER |= BIT(gpio);
472 else
473 PWER &= ~BIT(gpio);
474
475 return 0;
476 }
477
478 int sa11x0_sc_set_wake(unsigned int irq, unsigned int on)
479 {
480 if (BIT(irq) != IC_RTCAlrm)
481 return -EINVAL;
482
483 if (on)
484 PWER |= PWER_RTC;
485 else
486 PWER &= ~PWER_RTC;
487
488 return 0;
489 }