root/arch/arm/mach-s3c24xx/mach-amlm5900.c

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DEFINITIONS

This source file includes following definitions.
  1. amlm5900_map_io
  2. amlm5900_init_time
  3. amlm5900_wake_interrupt
  4. amlm5900_init_pm
  5. amlm5900_init

   1 // SPDX-License-Identifier: GPL-2.0+
   2 //
   3 // Copyright (c) 2006 American Microsystems Limited
   4 //      David Anders <danders@amltd.com>
   5 //
   6 // @History:
   7 // derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
   8 // Ben Dooks <ben@simtec.co.uk>
   9 
  10 #include <linux/kernel.h>
  11 #include <linux/types.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/list.h>
  14 #include <linux/timer.h>
  15 #include <linux/init.h>
  16 #include <linux/gpio.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/proc_fs.h>
  20 #include <linux/serial_core.h>
  21 #include <linux/serial_s3c.h>
  22 #include <linux/io.h>
  23 
  24 #include <asm/mach/arch.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/irq.h>
  27 #include <asm/mach/flash.h>
  28 
  29 #include <mach/hardware.h>
  30 #include <asm/irq.h>
  31 #include <asm/mach-types.h>
  32 #include <mach/fb.h>
  33 
  34 #include <mach/regs-lcd.h>
  35 #include <mach/regs-gpio.h>
  36 #include <mach/gpio-samsung.h>
  37 
  38 #include <linux/platform_data/i2c-s3c2410.h>
  39 #include <plat/devs.h>
  40 #include <plat/cpu.h>
  41 #include <plat/gpio-cfg.h>
  42 
  43 #include <linux/mtd/mtd.h>
  44 #include <linux/mtd/partitions.h>
  45 #include <linux/mtd/map.h>
  46 #include <linux/mtd/physmap.h>
  47 
  48 #include <plat/samsung-time.h>
  49 
  50 #include "common.h"
  51 
  52 static struct resource amlm5900_nor_resource =
  53                         DEFINE_RES_MEM(0x00000000, SZ_16M);
  54 
  55 static struct mtd_partition amlm5900_mtd_partitions[] = {
  56         {
  57                 .name           = "System",
  58                 .size           = 0x240000,
  59                 .offset         = 0,
  60                 .mask_flags     = MTD_WRITEABLE,  /* force read-only */
  61         }, {
  62                 .name           = "Kernel",
  63                 .size           = 0x100000,
  64                 .offset         = MTDPART_OFS_APPEND,
  65         }, {
  66                 .name           = "Ramdisk",
  67                 .size           = 0x300000,
  68                 .offset         = MTDPART_OFS_APPEND,
  69         }, {
  70                 .name           = "JFFS2",
  71                 .size           = 0x9A0000,
  72                 .offset         = MTDPART_OFS_APPEND,
  73         }, {
  74                 .name           = "Settings",
  75                 .size           = MTDPART_SIZ_FULL,
  76                 .offset         = MTDPART_OFS_APPEND,
  77         }
  78 };
  79 
  80 static struct physmap_flash_data amlm5900_flash_data = {
  81         .width          = 2,
  82         .parts          = amlm5900_mtd_partitions,
  83         .nr_parts       = ARRAY_SIZE(amlm5900_mtd_partitions),
  84 };
  85 
  86 static struct platform_device amlm5900_device_nor = {
  87         .name           = "physmap-flash",
  88         .id             = 0,
  89         .dev = {
  90                         .platform_data = &amlm5900_flash_data,
  91                 },
  92         .num_resources  = 1,
  93         .resource       = &amlm5900_nor_resource,
  94 };
  95 
  96 static struct map_desc amlm5900_iodesc[] __initdata = {
  97 };
  98 
  99 #define UCON S3C2410_UCON_DEFAULT
 100 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 101 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 102 
 103 static struct s3c2410_uartcfg amlm5900_uartcfgs[] = {
 104         [0] = {
 105                 .hwport      = 0,
 106                 .flags       = 0,
 107                 .ucon        = UCON,
 108                 .ulcon       = ULCON,
 109                 .ufcon       = UFCON,
 110         },
 111         [1] = {
 112                 .hwport      = 1,
 113                 .flags       = 0,
 114                 .ucon        = UCON,
 115                 .ulcon       = ULCON,
 116                 .ufcon       = UFCON,
 117         },
 118         [2] = {
 119                 .hwport      = 2,
 120                 .flags       = 0,
 121                 .ucon        = UCON,
 122                 .ulcon       = ULCON,
 123                 .ufcon       = UFCON,
 124         }
 125 };
 126 
 127 
 128 static struct platform_device *amlm5900_devices[] __initdata = {
 129 #ifdef CONFIG_FB_S3C2410
 130         &s3c_device_lcd,
 131 #endif
 132         &s3c_device_adc,
 133         &s3c_device_wdt,
 134         &s3c_device_i2c0,
 135         &s3c_device_ohci,
 136         &s3c_device_rtc,
 137         &s3c_device_usbgadget,
 138         &s3c_device_sdi,
 139         &amlm5900_device_nor,
 140 };
 141 
 142 static void __init amlm5900_map_io(void)
 143 {
 144         s3c24xx_init_io(amlm5900_iodesc, ARRAY_SIZE(amlm5900_iodesc));
 145         s3c24xx_init_uarts(amlm5900_uartcfgs, ARRAY_SIZE(amlm5900_uartcfgs));
 146         samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 147 }
 148 
 149 static void __init amlm5900_init_time(void)
 150 {
 151         s3c2410_init_clocks(12000000);
 152         samsung_timer_init();
 153 }
 154 
 155 #ifdef CONFIG_FB_S3C2410
 156 static struct s3c2410fb_display __initdata amlm5900_lcd_info = {
 157         .width          = 160,
 158         .height         = 160,
 159 
 160         .type           = S3C2410_LCDCON1_STN4,
 161 
 162         .pixclock       = 680000, /* HCLK = 100MHz */
 163         .xres           = 160,
 164         .yres           = 160,
 165         .bpp            = 4,
 166         .left_margin    = 1 << (4 + 3),
 167         .right_margin   = 8 << 3,
 168         .hsync_len      = 48,
 169         .upper_margin   = 0,
 170         .lower_margin   = 0,
 171 
 172         .lcdcon5        = 0x00000001,
 173 };
 174 
 175 static struct s3c2410fb_mach_info __initdata amlm5900_fb_info = {
 176 
 177         .displays = &amlm5900_lcd_info,
 178         .num_displays = 1,
 179         .default_display = 0,
 180 
 181         .gpccon =       0xaaaaaaaa,
 182         .gpccon_mask =  0xffffffff,
 183         .gpcup =        0x0000ffff,
 184         .gpcup_mask =   0xffffffff,
 185 
 186         .gpdcon =       0xaaaaaaaa,
 187         .gpdcon_mask =  0xffffffff,
 188         .gpdup =        0x0000ffff,
 189         .gpdup_mask =   0xffffffff,
 190 };
 191 #endif
 192 
 193 static irqreturn_t
 194 amlm5900_wake_interrupt(int irq, void *ignored)
 195 {
 196         return IRQ_HANDLED;
 197 }
 198 
 199 static void amlm5900_init_pm(void)
 200 {
 201         int ret = 0;
 202 
 203         ret = request_irq(IRQ_EINT9, &amlm5900_wake_interrupt,
 204                                 IRQF_TRIGGER_RISING | IRQF_SHARED,
 205                                 "amlm5900_wakeup", &amlm5900_wake_interrupt);
 206         if (ret != 0) {
 207                 printk(KERN_ERR "AML-M5900: no wakeup irq, %d?\n", ret);
 208         } else {
 209                 enable_irq_wake(IRQ_EINT9);
 210                 /* configure the suspend/resume status pin */
 211                 s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT);
 212                 s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_UP);
 213         }
 214 }
 215 static void __init amlm5900_init(void)
 216 {
 217         amlm5900_init_pm();
 218 #ifdef CONFIG_FB_S3C2410
 219         s3c24xx_fb_set_platdata(&amlm5900_fb_info);
 220 #endif
 221         s3c_i2c0_set_platdata(NULL);
 222         platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices));
 223 }
 224 
 225 MACHINE_START(AML_M5900, "AML_M5900")
 226         .atag_offset    = 0x100,
 227         .map_io         = amlm5900_map_io,
 228         .init_irq       = s3c2410_init_irq,
 229         .init_machine   = amlm5900_init,
 230         .init_time      = amlm5900_init_time,
 231 MACHINE_END

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