This source file includes following definitions.
- atmel_classd_dt_init
- atmel_classd_dt_init
- atmel_classd_cpu_dai_startup
- atmel_classd_cpu_dai_shutdown
- atmel_classd_platform_configure_dma
- atmel_classd_component_probe
- atmel_classd_component_resume
- atmel_classd_codec_dai_startup
- atmel_classd_codec_dai_digital_mute
- atmel_classd_codec_dai_hw_params
- atmel_classd_codec_dai_shutdown
- atmel_classd_codec_dai_prepare
- atmel_classd_codec_dai_trigger
- atmel_classd_asoc_card_init
- atmel_classd_probe
- atmel_classd_remove
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9 #include <linux/of.h>
10 #include <linux/clk.h>
11 #include <linux/module.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <sound/core.h>
15 #include <sound/dmaengine_pcm.h>
16 #include <sound/pcm_params.h>
17 #include <sound/tlv.h>
18 #include "atmel-classd.h"
19
20 struct atmel_classd_pdata {
21 bool non_overlap_enable;
22 int non_overlap_time;
23 int pwm_type;
24 const char *card_name;
25 };
26
27 struct atmel_classd {
28 dma_addr_t phy_base;
29 struct regmap *regmap;
30 struct clk *pclk;
31 struct clk *gclk;
32 struct device *dev;
33 int irq;
34 const struct atmel_classd_pdata *pdata;
35 };
36
37 #ifdef CONFIG_OF
38 static const struct of_device_id atmel_classd_of_match[] = {
39 {
40 .compatible = "atmel,sama5d2-classd",
41 }, {
42
43 }
44 };
45 MODULE_DEVICE_TABLE(of, atmel_classd_of_match);
46
47 static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev)
48 {
49 struct device_node *np = dev->of_node;
50 struct atmel_classd_pdata *pdata;
51 const char *pwm_type;
52 int ret;
53
54 if (!np) {
55 dev_err(dev, "device node not found\n");
56 return ERR_PTR(-EINVAL);
57 }
58
59 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
60 if (!pdata)
61 return ERR_PTR(-ENOMEM);
62
63 ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type);
64 if ((ret == 0) && (strcmp(pwm_type, "diff") == 0))
65 pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF;
66 else
67 pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE;
68
69 ret = of_property_read_u32(np,
70 "atmel,non-overlap-time", &pdata->non_overlap_time);
71 if (ret)
72 pdata->non_overlap_enable = false;
73 else
74 pdata->non_overlap_enable = true;
75
76 ret = of_property_read_string(np, "atmel,model", &pdata->card_name);
77 if (ret)
78 pdata->card_name = "CLASSD";
79
80 return pdata;
81 }
82 #else
83 static inline struct atmel_classd_pdata *
84 atmel_classd_dt_init(struct device *dev)
85 {
86 return ERR_PTR(-EINVAL);
87 }
88 #endif
89
90 #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \
91 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \
92 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \
93 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \
94 | SNDRV_PCM_RATE_96000)
95
96 static const struct snd_pcm_hardware atmel_classd_hw = {
97 .info = SNDRV_PCM_INFO_MMAP
98 | SNDRV_PCM_INFO_MMAP_VALID
99 | SNDRV_PCM_INFO_INTERLEAVED
100 | SNDRV_PCM_INFO_RESUME
101 | SNDRV_PCM_INFO_PAUSE,
102 .formats = (SNDRV_PCM_FMTBIT_S16_LE),
103 .rates = ATMEL_CLASSD_RATES,
104 .rate_min = 8000,
105 .rate_max = 96000,
106 .channels_min = 1,
107 .channels_max = 2,
108 .buffer_bytes_max = 64 * 1024,
109 .period_bytes_min = 256,
110 .period_bytes_max = 32 * 1024,
111 .periods_min = 2,
112 .periods_max = 256,
113 };
114
115 #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024)
116
117
118 static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream,
119 struct snd_soc_dai *cpu_dai)
120 {
121 struct snd_soc_pcm_runtime *rtd = substream->private_data;
122 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
123
124 regmap_write(dd->regmap, CLASSD_THR, 0x0);
125
126 return clk_prepare_enable(dd->pclk);
127 }
128
129 static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream,
130 struct snd_soc_dai *cpu_dai)
131 {
132 struct snd_soc_pcm_runtime *rtd = substream->private_data;
133 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
134
135 clk_disable_unprepare(dd->pclk);
136 }
137
138 static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = {
139 .startup = atmel_classd_cpu_dai_startup,
140 .shutdown = atmel_classd_cpu_dai_shutdown,
141 };
142
143 static struct snd_soc_dai_driver atmel_classd_cpu_dai = {
144 .playback = {
145 .channels_min = 1,
146 .channels_max = 2,
147 .rates = ATMEL_CLASSD_RATES,
148 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
149 .ops = &atmel_classd_cpu_dai_ops,
150 };
151
152 static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = {
153 .name = "atmel-classd",
154 };
155
156
157 static int
158 atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream,
159 struct snd_pcm_hw_params *params,
160 struct dma_slave_config *slave_config)
161 {
162 struct snd_soc_pcm_runtime *rtd = substream->private_data;
163 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
164
165 if (params_physical_width(params) != 16) {
166 dev_err(dd->dev,
167 "only supports 16-bit audio data\n");
168 return -EINVAL;
169 }
170
171 if (params_channels(params) == 1)
172 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
173 else
174 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
175
176 slave_config->direction = DMA_MEM_TO_DEV;
177 slave_config->dst_addr = dd->phy_base + CLASSD_THR;
178 slave_config->dst_maxburst = 1;
179 slave_config->src_maxburst = 1;
180 slave_config->device_fc = false;
181
182 return 0;
183 }
184
185 static const struct snd_dmaengine_pcm_config
186 atmel_classd_dmaengine_pcm_config = {
187 .prepare_slave_config = atmel_classd_platform_configure_dma,
188 .pcm_hardware = &atmel_classd_hw,
189 .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE,
190 };
191
192
193 static const char * const mono_mode_text[] = {
194 "mix", "sat", "left", "right"
195 };
196
197 static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum,
198 CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT,
199 mono_mode_text);
200
201 static const char * const eqcfg_text[] = {
202 "Treble-12dB", "Treble-6dB",
203 "Medium-8dB", "Medium-3dB",
204 "Bass-12dB", "Bass-6dB",
205 "0 dB",
206 "Bass+6dB", "Bass+12dB",
207 "Medium+3dB", "Medium+8dB",
208 "Treble+6dB", "Treble+12dB",
209 };
210
211 static const unsigned int eqcfg_value[] = {
212 CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6,
213 CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3,
214 CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6,
215 CLASSD_INTPMR_EQCFG_FLAT,
216 CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12,
217 CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8,
218 CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12,
219 };
220
221 static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum,
222 CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf,
223 eqcfg_text, eqcfg_value);
224
225 static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1);
226
227 static const struct snd_kcontrol_new atmel_classd_snd_controls[] = {
228 SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR,
229 CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT,
230 78, 1, classd_digital_tlv),
231
232 SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR,
233 CLASSD_INTPMR_DEEMP_SHIFT, 1, 0),
234
235 SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0),
236
237 SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0),
238
239 SOC_ENUM("Mono Mode", classd_mono_mode_enum),
240
241 SOC_ENUM("EQ", classd_eqcfg_enum),
242 };
243
244 static const char * const pwm_type[] = {
245 "Single ended", "Differential"
246 };
247
248 static int atmel_classd_component_probe(struct snd_soc_component *component)
249 {
250 struct snd_soc_card *card = snd_soc_component_get_drvdata(component);
251 struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
252 const struct atmel_classd_pdata *pdata = dd->pdata;
253 u32 mask, val;
254
255 mask = CLASSD_MR_PWMTYP_MASK;
256 val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT;
257
258 mask |= CLASSD_MR_NON_OVERLAP_MASK;
259 if (pdata->non_overlap_enable) {
260 val |= (CLASSD_MR_NON_OVERLAP_EN
261 << CLASSD_MR_NON_OVERLAP_SHIFT);
262
263 mask |= CLASSD_MR_NOVR_VAL_MASK;
264 switch (pdata->non_overlap_time) {
265 case 5:
266 val |= (CLASSD_MR_NOVR_VAL_5NS
267 << CLASSD_MR_NOVR_VAL_SHIFT);
268 break;
269 case 10:
270 val |= (CLASSD_MR_NOVR_VAL_10NS
271 << CLASSD_MR_NOVR_VAL_SHIFT);
272 break;
273 case 15:
274 val |= (CLASSD_MR_NOVR_VAL_15NS
275 << CLASSD_MR_NOVR_VAL_SHIFT);
276 break;
277 case 20:
278 val |= (CLASSD_MR_NOVR_VAL_20NS
279 << CLASSD_MR_NOVR_VAL_SHIFT);
280 break;
281 default:
282 val |= (CLASSD_MR_NOVR_VAL_10NS
283 << CLASSD_MR_NOVR_VAL_SHIFT);
284 dev_warn(component->dev,
285 "non-overlapping value %d is invalid, the default value 10 is specified\n",
286 pdata->non_overlap_time);
287 break;
288 }
289 }
290
291 snd_soc_component_update_bits(component, CLASSD_MR, mask, val);
292
293 dev_info(component->dev,
294 "PWM modulation type is %s, non-overlapping is %s\n",
295 pwm_type[pdata->pwm_type],
296 pdata->non_overlap_enable?"enabled":"disabled");
297
298 return 0;
299 }
300
301 static int atmel_classd_component_resume(struct snd_soc_component *component)
302 {
303 struct snd_soc_card *card = snd_soc_component_get_drvdata(component);
304 struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
305
306 return regcache_sync(dd->regmap);
307 }
308
309 static struct snd_soc_component_driver soc_component_dev_classd = {
310 .probe = atmel_classd_component_probe,
311 .resume = atmel_classd_component_resume,
312 .controls = atmel_classd_snd_controls,
313 .num_controls = ARRAY_SIZE(atmel_classd_snd_controls),
314 .idle_bias_on = 1,
315 .use_pmdown_time = 1,
316 .endianness = 1,
317 .non_legacy_dai_naming = 1,
318 };
319
320
321 static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream,
322 struct snd_soc_dai *codec_dai)
323 {
324 struct snd_soc_pcm_runtime *rtd = substream->private_data;
325 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
326
327 return clk_prepare_enable(dd->gclk);
328 }
329
330 static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai,
331 int mute)
332 {
333 struct snd_soc_component *component = codec_dai->component;
334 u32 mask, val;
335
336 mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK;
337
338 if (mute)
339 val = mask;
340 else
341 val = 0;
342
343 snd_soc_component_update_bits(component, CLASSD_MR, mask, val);
344
345 return 0;
346 }
347
348 #define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
349 #define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8)
350
351 static struct {
352 int rate;
353 int sample_rate;
354 int dsp_clk;
355 unsigned long gclk_rate;
356 } const sample_rates[] = {
357 { 8000, CLASSD_INTPMR_FRAME_8K,
358 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
359 { 16000, CLASSD_INTPMR_FRAME_16K,
360 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
361 { 32000, CLASSD_INTPMR_FRAME_32K,
362 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
363 { 48000, CLASSD_INTPMR_FRAME_48K,
364 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
365 { 96000, CLASSD_INTPMR_FRAME_96K,
366 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
367 { 22050, CLASSD_INTPMR_FRAME_22K,
368 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
369 { 44100, CLASSD_INTPMR_FRAME_44K,
370 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
371 { 88200, CLASSD_INTPMR_FRAME_88K,
372 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
373 };
374
375 static int
376 atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream,
377 struct snd_pcm_hw_params *params,
378 struct snd_soc_dai *codec_dai)
379 {
380 struct snd_soc_pcm_runtime *rtd = substream->private_data;
381 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
382 struct snd_soc_component *component = codec_dai->component;
383 int fs;
384 int i, best, best_val, cur_val, ret;
385 u32 mask, val;
386
387 fs = params_rate(params);
388
389 best = 0;
390 best_val = abs(fs - sample_rates[0].rate);
391 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
392
393 cur_val = abs(fs - sample_rates[i].rate);
394 if (cur_val < best_val) {
395 best = i;
396 best_val = cur_val;
397 }
398 }
399
400 dev_dbg(component->dev,
401 "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n",
402 sample_rates[best].rate, sample_rates[best].gclk_rate);
403
404 clk_disable_unprepare(dd->gclk);
405
406 ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate);
407 if (ret)
408 return ret;
409
410 mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK;
411 val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT)
412 | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT);
413
414 snd_soc_component_update_bits(component, CLASSD_INTPMR, mask, val);
415
416 return clk_prepare_enable(dd->gclk);
417 }
418
419 static void
420 atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream,
421 struct snd_soc_dai *codec_dai)
422 {
423 struct snd_soc_pcm_runtime *rtd = substream->private_data;
424 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
425
426 clk_disable_unprepare(dd->gclk);
427 }
428
429 static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream,
430 struct snd_soc_dai *codec_dai)
431 {
432 struct snd_soc_component *component = codec_dai->component;
433
434 snd_soc_component_update_bits(component, CLASSD_MR,
435 CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK,
436 (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
437 |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT));
438
439 return 0;
440 }
441
442 static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream,
443 int cmd, struct snd_soc_dai *codec_dai)
444 {
445 struct snd_soc_component *component = codec_dai->component;
446 u32 mask, val;
447
448 mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK;
449
450 switch (cmd) {
451 case SNDRV_PCM_TRIGGER_START:
452 case SNDRV_PCM_TRIGGER_RESUME:
453 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
454 val = mask;
455 break;
456 case SNDRV_PCM_TRIGGER_STOP:
457 case SNDRV_PCM_TRIGGER_SUSPEND:
458 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
459 val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
460 | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT);
461 break;
462 default:
463 return -EINVAL;
464 }
465
466 snd_soc_component_update_bits(component, CLASSD_MR, mask, val);
467
468 return 0;
469 }
470
471 static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = {
472 .digital_mute = atmel_classd_codec_dai_digital_mute,
473 .startup = atmel_classd_codec_dai_startup,
474 .shutdown = atmel_classd_codec_dai_shutdown,
475 .hw_params = atmel_classd_codec_dai_hw_params,
476 .prepare = atmel_classd_codec_dai_prepare,
477 .trigger = atmel_classd_codec_dai_trigger,
478 };
479
480 #define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi"
481
482 static struct snd_soc_dai_driver atmel_classd_codec_dai = {
483 .name = ATMEL_CLASSD_CODEC_DAI_NAME,
484 .playback = {
485 .stream_name = "Playback",
486 .channels_min = 1,
487 .channels_max = 2,
488 .rates = ATMEL_CLASSD_RATES,
489 .formats = SNDRV_PCM_FMTBIT_S16_LE,
490 },
491 .ops = &atmel_classd_codec_dai_ops,
492 };
493
494
495 static int atmel_classd_asoc_card_init(struct device *dev,
496 struct snd_soc_card *card)
497 {
498 struct snd_soc_dai_link *dai_link;
499 struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
500 struct snd_soc_dai_link_component *comp;
501
502 dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL);
503 if (!dai_link)
504 return -ENOMEM;
505
506 comp = devm_kzalloc(dev, 3 * sizeof(*comp), GFP_KERNEL);
507 if (!comp)
508 return -ENOMEM;
509
510 dai_link->cpus = &comp[0];
511 dai_link->codecs = &comp[1];
512 dai_link->platforms = &comp[2];
513
514 dai_link->num_cpus = 1;
515 dai_link->num_codecs = 1;
516 dai_link->num_platforms = 1;
517
518 dai_link->name = "CLASSD";
519 dai_link->stream_name = "CLASSD PCM";
520 dai_link->codecs->dai_name = ATMEL_CLASSD_CODEC_DAI_NAME;
521 dai_link->cpus->dai_name = dev_name(dev);
522 dai_link->codecs->name = dev_name(dev);
523 dai_link->platforms->name = dev_name(dev);
524
525 card->dai_link = dai_link;
526 card->num_links = 1;
527 card->name = dd->pdata->card_name;
528 card->dev = dev;
529
530 return 0;
531 };
532
533
534 static const struct reg_default atmel_classd_reg_defaults[] = {
535 { CLASSD_INTPMR, 0x00301212 },
536 };
537
538 #define ATMEL_CLASSD_REG_MAX 0xE4
539 static const struct regmap_config atmel_classd_regmap_config = {
540 .reg_bits = 32,
541 .reg_stride = 4,
542 .val_bits = 32,
543 .max_register = ATMEL_CLASSD_REG_MAX,
544
545 .cache_type = REGCACHE_FLAT,
546 .reg_defaults = atmel_classd_reg_defaults,
547 .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults),
548 };
549
550 static int atmel_classd_probe(struct platform_device *pdev)
551 {
552 struct device *dev = &pdev->dev;
553 struct atmel_classd *dd;
554 struct resource *res;
555 void __iomem *io_base;
556 const struct atmel_classd_pdata *pdata;
557 struct snd_soc_card *card;
558 int ret;
559
560 pdata = dev_get_platdata(dev);
561 if (!pdata) {
562 pdata = atmel_classd_dt_init(dev);
563 if (IS_ERR(pdata))
564 return PTR_ERR(pdata);
565 }
566
567 dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
568 if (!dd)
569 return -ENOMEM;
570
571 dd->pdata = pdata;
572
573 dd->irq = platform_get_irq(pdev, 0);
574 if (dd->irq < 0)
575 return dd->irq;
576
577 dd->pclk = devm_clk_get(dev, "pclk");
578 if (IS_ERR(dd->pclk)) {
579 ret = PTR_ERR(dd->pclk);
580 dev_err(dev, "failed to get peripheral clock: %d\n", ret);
581 return ret;
582 }
583
584 dd->gclk = devm_clk_get(dev, "gclk");
585 if (IS_ERR(dd->gclk)) {
586 ret = PTR_ERR(dd->gclk);
587 dev_err(dev, "failed to get GCK clock: %d\n", ret);
588 return ret;
589 }
590
591 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
592 io_base = devm_ioremap_resource(dev, res);
593 if (IS_ERR(io_base))
594 return PTR_ERR(io_base);
595
596 dd->phy_base = res->start;
597 dd->dev = dev;
598
599 dd->regmap = devm_regmap_init_mmio(dev, io_base,
600 &atmel_classd_regmap_config);
601 if (IS_ERR(dd->regmap)) {
602 ret = PTR_ERR(dd->regmap);
603 dev_err(dev, "failed to init register map: %d\n", ret);
604 return ret;
605 }
606
607 ret = devm_snd_soc_register_component(dev,
608 &atmel_classd_cpu_dai_component,
609 &atmel_classd_cpu_dai, 1);
610 if (ret) {
611 dev_err(dev, "could not register CPU DAI: %d\n", ret);
612 return ret;
613 }
614
615 ret = devm_snd_dmaengine_pcm_register(dev,
616 &atmel_classd_dmaengine_pcm_config,
617 0);
618 if (ret) {
619 dev_err(dev, "could not register platform: %d\n", ret);
620 return ret;
621 }
622
623 ret = devm_snd_soc_register_component(dev, &soc_component_dev_classd,
624 &atmel_classd_codec_dai, 1);
625 if (ret) {
626 dev_err(dev, "could not register component: %d\n", ret);
627 return ret;
628 }
629
630
631 card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
632 if (!card) {
633 ret = -ENOMEM;
634 goto unregister_codec;
635 }
636
637 snd_soc_card_set_drvdata(card, dd);
638
639 ret = atmel_classd_asoc_card_init(dev, card);
640 if (ret) {
641 dev_err(dev, "failed to init sound card\n");
642 goto unregister_codec;
643 }
644
645 ret = devm_snd_soc_register_card(dev, card);
646 if (ret) {
647 dev_err(dev, "failed to register sound card: %d\n", ret);
648 goto unregister_codec;
649 }
650
651 return 0;
652
653 unregister_codec:
654 return ret;
655 }
656
657 static int atmel_classd_remove(struct platform_device *pdev)
658 {
659 return 0;
660 }
661
662 static struct platform_driver atmel_classd_driver = {
663 .driver = {
664 .name = "atmel-classd",
665 .of_match_table = of_match_ptr(atmel_classd_of_match),
666 .pm = &snd_soc_pm_ops,
667 },
668 .probe = atmel_classd_probe,
669 .remove = atmel_classd_remove,
670 };
671 module_platform_driver(atmel_classd_driver);
672
673 MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture");
674 MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
675 MODULE_LICENSE("GPL");