root/tools/power/x86/turbostat/turbostat.c

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DEFINITIONS

This source file includes following definitions.
  1. cpu_is_not_present
  2. for_all_cpus
  3. cpu_migrate
  4. get_msr_fd
  5. get_msr
  6. help
  7. bic_lookup
  8. print_header
  9. dump_counters
  10. format_counters
  11. flush_output_stdout
  12. flush_output_stderr
  13. format_all_counters
  14. delta_package
  15. delta_core
  16. soft_c1_residency_display
  17. delta_thread
  18. delta_cpu
  19. clear_counters
  20. sum_counters
  21. compute_average
  22. rdtsc
  23. fopen_or_die
  24. snapshot_sysfs_counter
  25. get_mp
  26. get_apic_id
  27. get_counters
  28. calculate_tsc_tweak
  29. dump_nhm_platform_info
  30. dump_hsw_turbo_ratio_limits
  31. dump_ivt_turbo_ratio_limits
  32. has_turbo_ratio_group_limits
  33. dump_turbo_ratio_limits
  34. dump_atom_turbo_ratio_limits
  35. dump_knl_turbo_ratio_limits
  36. dump_nhm_cst_cfg
  37. dump_config_tdp
  38. print_irtl
  39. free_fd_percpu
  40. free_all_buffers
  41. parse_int_file
  42. cpu_is_first_core_in_package
  43. get_physical_package_id
  44. get_die_id
  45. get_core_id
  46. set_node_data
  47. get_physical_node_id
  48. get_thread_siblings
  49. for_all_cpus_2
  50. for_all_proc_cpus
  51. re_initialize
  52. set_max_cpu_num
  53. count_cpus
  54. mark_cpu_present
  55. init_thread_id
  56. snapshot_proc_interrupts
  57. snapshot_gfx_rc6_ms
  58. snapshot_gfx_mhz
  59. snapshot_cpu_lpi_us
  60. snapshot_sys_lpi_us
  61. snapshot_proc_sysfs_files
  62. signal_handler
  63. setup_signal_handler
  64. do_sleep
  65. turbostat_loop
  66. check_dev_msr
  67. check_for_cap_sys_rawio
  68. check_permissions
  69. probe_nhm_msrs
  70. has_slv_msrs
  71. is_dnv
  72. is_bdx
  73. is_skx
  74. has_turbo_ratio_limit
  75. has_atom_turbo_ratio_limit
  76. has_ivt_turbo_ratio_limit
  77. has_hsw_turbo_ratio_limit
  78. has_knl_turbo_ratio_limit
  79. has_glm_turbo_ratio_limit
  80. has_config_tdp
  81. dump_cstate_pstate_config_info
  82. dump_sysfs_cstate_config
  83. dump_sysfs_pstate_config
  84. print_epb
  85. print_hwp
  86. print_perf_limit
  87. get_tdp_intel
  88. get_tdp_amd
  89. rapl_dram_energy_units_probe
  90. rapl_probe_intel
  91. rapl_probe_amd
  92. rapl_probe
  93. perf_limit_reasons_probe
  94. automatic_cstate_conversion_probe
  95. print_thermal
  96. print_power_limit_msr
  97. print_rapl
  98. has_snb_msrs
  99. has_c8910_msrs
  100. has_skl_msrs
  101. is_slm
  102. is_knl
  103. is_cnl
  104. get_aperf_mperf_multiplier
  105. slm_bclk
  106. discover_bclk
  107. set_temperature_target
  108. decode_feature_control_msr
  109. decode_misc_enable_msr
  110. decode_misc_feature_control
  111. decode_misc_pwr_mgmt_msr
  112. decode_c6_demotion_policy_msr
  113. intel_model_duplicates
  114. process_cpuid
  115. dir_filter
  116. open_dev_cpu_msr
  117. topology_probe
  118. allocate_counters
  119. init_counter
  120. initialize_counters
  121. allocate_output_buffer
  122. allocate_fd_percpu
  123. allocate_irq_buffers
  124. setup_all_buffers
  125. set_base_cpu
  126. turbostat_init
  127. fork_it
  128. get_and_dump_counters
  129. print_version
  130. add_counter
  131. parse_add_command
  132. is_deferred_skip
  133. probe_sysfs
  134. parse_cpu_command
  135. cmdline
  136. main

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * turbostat -- show CPU frequency and C-state residency
   4  * on modern Intel and AMD processors.
   5  *
   6  * Copyright (c) 2013 Intel Corporation.
   7  * Len Brown <len.brown@intel.com>
   8  */
   9 
  10 #define _GNU_SOURCE
  11 #include MSRHEADER
  12 #include INTEL_FAMILY_HEADER
  13 #include <stdarg.h>
  14 #include <stdio.h>
  15 #include <err.h>
  16 #include <unistd.h>
  17 #include <sys/types.h>
  18 #include <sys/wait.h>
  19 #include <sys/stat.h>
  20 #include <sys/select.h>
  21 #include <sys/resource.h>
  22 #include <fcntl.h>
  23 #include <signal.h>
  24 #include <sys/time.h>
  25 #include <stdlib.h>
  26 #include <getopt.h>
  27 #include <dirent.h>
  28 #include <string.h>
  29 #include <ctype.h>
  30 #include <sched.h>
  31 #include <time.h>
  32 #include <cpuid.h>
  33 #include <sys/capability.h>
  34 #include <errno.h>
  35 #include <math.h>
  36 
  37 char *proc_stat = "/proc/stat";
  38 FILE *outf;
  39 int *fd_percpu;
  40 struct timeval interval_tv = {5, 0};
  41 struct timespec interval_ts = {5, 0};
  42 unsigned int num_iterations;
  43 unsigned int debug;
  44 unsigned int quiet;
  45 unsigned int shown;
  46 unsigned int sums_need_wide_columns;
  47 unsigned int rapl_joules;
  48 unsigned int summary_only;
  49 unsigned int list_header_only;
  50 unsigned int dump_only;
  51 unsigned int do_snb_cstates;
  52 unsigned int do_knl_cstates;
  53 unsigned int do_slm_cstates;
  54 unsigned int use_c1_residency_msr;
  55 unsigned int has_aperf;
  56 unsigned int has_epb;
  57 unsigned int do_irtl_snb;
  58 unsigned int do_irtl_hsw;
  59 unsigned int units = 1000000;   /* MHz etc */
  60 unsigned int genuine_intel;
  61 unsigned int authentic_amd;
  62 unsigned int hygon_genuine;
  63 unsigned int max_level, max_extended_level;
  64 unsigned int has_invariant_tsc;
  65 unsigned int do_nhm_platform_info;
  66 unsigned int no_MSR_MISC_PWR_MGMT;
  67 unsigned int aperf_mperf_multiplier = 1;
  68 double bclk;
  69 double base_hz;
  70 unsigned int has_base_hz;
  71 double tsc_tweak = 1.0;
  72 unsigned int show_pkg_only;
  73 unsigned int show_core_only;
  74 char *output_buffer, *outp;
  75 unsigned int do_rapl;
  76 unsigned int do_dts;
  77 unsigned int do_ptm;
  78 unsigned long long  gfx_cur_rc6_ms;
  79 unsigned long long cpuidle_cur_cpu_lpi_us;
  80 unsigned long long cpuidle_cur_sys_lpi_us;
  81 unsigned int gfx_cur_mhz;
  82 unsigned int tcc_activation_temp;
  83 unsigned int tcc_activation_temp_override;
  84 double rapl_power_units, rapl_time_units;
  85 double rapl_dram_energy_units, rapl_energy_units;
  86 double rapl_joule_counter_range;
  87 unsigned int do_core_perf_limit_reasons;
  88 unsigned int has_automatic_cstate_conversion;
  89 unsigned int do_gfx_perf_limit_reasons;
  90 unsigned int do_ring_perf_limit_reasons;
  91 unsigned int crystal_hz;
  92 unsigned long long tsc_hz;
  93 int base_cpu;
  94 double discover_bclk(unsigned int family, unsigned int model);
  95 unsigned int has_hwp;   /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
  96                         /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
  97 unsigned int has_hwp_notify;            /* IA32_HWP_INTERRUPT */
  98 unsigned int has_hwp_activity_window;   /* IA32_HWP_REQUEST[bits 41:32] */
  99 unsigned int has_hwp_epp;               /* IA32_HWP_REQUEST[bits 31:24] */
 100 unsigned int has_hwp_pkg;               /* IA32_HWP_REQUEST_PKG */
 101 unsigned int has_misc_feature_control;
 102 unsigned int first_counter_read = 1;
 103 int ignore_stdin;
 104 
 105 #define RAPL_PKG                (1 << 0)
 106                                         /* 0x610 MSR_PKG_POWER_LIMIT */
 107                                         /* 0x611 MSR_PKG_ENERGY_STATUS */
 108 #define RAPL_PKG_PERF_STATUS    (1 << 1)
 109                                         /* 0x613 MSR_PKG_PERF_STATUS */
 110 #define RAPL_PKG_POWER_INFO     (1 << 2)
 111                                         /* 0x614 MSR_PKG_POWER_INFO */
 112 
 113 #define RAPL_DRAM               (1 << 3)
 114                                         /* 0x618 MSR_DRAM_POWER_LIMIT */
 115                                         /* 0x619 MSR_DRAM_ENERGY_STATUS */
 116 #define RAPL_DRAM_PERF_STATUS   (1 << 4)
 117                                         /* 0x61b MSR_DRAM_PERF_STATUS */
 118 #define RAPL_DRAM_POWER_INFO    (1 << 5)
 119                                         /* 0x61c MSR_DRAM_POWER_INFO */
 120 
 121 #define RAPL_CORES_POWER_LIMIT  (1 << 6)
 122                                         /* 0x638 MSR_PP0_POWER_LIMIT */
 123 #define RAPL_CORE_POLICY        (1 << 7)
 124                                         /* 0x63a MSR_PP0_POLICY */
 125 
 126 #define RAPL_GFX                (1 << 8)
 127                                         /* 0x640 MSR_PP1_POWER_LIMIT */
 128                                         /* 0x641 MSR_PP1_ENERGY_STATUS */
 129                                         /* 0x642 MSR_PP1_POLICY */
 130 
 131 #define RAPL_CORES_ENERGY_STATUS        (1 << 9)
 132                                         /* 0x639 MSR_PP0_ENERGY_STATUS */
 133 #define RAPL_PER_CORE_ENERGY    (1 << 10)
 134                                         /* Indicates cores energy collection is per-core,
 135                                          * not per-package. */
 136 #define RAPL_AMD_F17H           (1 << 11)
 137                                         /* 0xc0010299 MSR_RAPL_PWR_UNIT */
 138                                         /* 0xc001029a MSR_CORE_ENERGY_STAT */
 139                                         /* 0xc001029b MSR_PKG_ENERGY_STAT */
 140 #define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
 141 #define TJMAX_DEFAULT   100
 142 
 143 /* MSRs that are not yet in the kernel-provided header. */
 144 #define MSR_RAPL_PWR_UNIT       0xc0010299
 145 #define MSR_CORE_ENERGY_STAT    0xc001029a
 146 #define MSR_PKG_ENERGY_STAT     0xc001029b
 147 
 148 #define MAX(a, b) ((a) > (b) ? (a) : (b))
 149 
 150 /*
 151  * buffer size used by sscanf() for added column names
 152  * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
 153  */
 154 #define NAME_BYTES 20
 155 #define PATH_BYTES 128
 156 
 157 int backwards_count;
 158 char *progname;
 159 
 160 #define CPU_SUBSET_MAXCPUS      1024    /* need to use before probe... */
 161 cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
 162 size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
 163 #define MAX_ADDED_COUNTERS 8
 164 #define MAX_ADDED_THREAD_COUNTERS 24
 165 #define BITMASK_SIZE 32
 166 
 167 struct thread_data {
 168         struct timeval tv_begin;
 169         struct timeval tv_end;
 170         struct timeval tv_delta;
 171         unsigned long long tsc;
 172         unsigned long long aperf;
 173         unsigned long long mperf;
 174         unsigned long long c1;
 175         unsigned long long  irq_count;
 176         unsigned int smi_count;
 177         unsigned int cpu_id;
 178         unsigned int apic_id;
 179         unsigned int x2apic_id;
 180         unsigned int flags;
 181 #define CPU_IS_FIRST_THREAD_IN_CORE     0x2
 182 #define CPU_IS_FIRST_CORE_IN_PACKAGE    0x4
 183         unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
 184 } *thread_even, *thread_odd;
 185 
 186 struct core_data {
 187         unsigned long long c3;
 188         unsigned long long c6;
 189         unsigned long long c7;
 190         unsigned long long mc6_us;      /* duplicate as per-core for now, even though per module */
 191         unsigned int core_temp_c;
 192         unsigned int core_energy;       /* MSR_CORE_ENERGY_STAT */
 193         unsigned int core_id;
 194         unsigned long long counter[MAX_ADDED_COUNTERS];
 195 } *core_even, *core_odd;
 196 
 197 struct pkg_data {
 198         unsigned long long pc2;
 199         unsigned long long pc3;
 200         unsigned long long pc6;
 201         unsigned long long pc7;
 202         unsigned long long pc8;
 203         unsigned long long pc9;
 204         unsigned long long pc10;
 205         unsigned long long cpu_lpi;
 206         unsigned long long sys_lpi;
 207         unsigned long long pkg_wtd_core_c0;
 208         unsigned long long pkg_any_core_c0;
 209         unsigned long long pkg_any_gfxe_c0;
 210         unsigned long long pkg_both_core_gfxe_c0;
 211         long long gfx_rc6_ms;
 212         unsigned int gfx_mhz;
 213         unsigned int package_id;
 214         unsigned int energy_pkg;        /* MSR_PKG_ENERGY_STATUS */
 215         unsigned int energy_dram;       /* MSR_DRAM_ENERGY_STATUS */
 216         unsigned int energy_cores;      /* MSR_PP0_ENERGY_STATUS */
 217         unsigned int energy_gfx;        /* MSR_PP1_ENERGY_STATUS */
 218         unsigned int rapl_pkg_perf_status;      /* MSR_PKG_PERF_STATUS */
 219         unsigned int rapl_dram_perf_status;     /* MSR_DRAM_PERF_STATUS */
 220         unsigned int pkg_temp_c;
 221         unsigned long long counter[MAX_ADDED_COUNTERS];
 222 } *package_even, *package_odd;
 223 
 224 #define ODD_COUNTERS thread_odd, core_odd, package_odd
 225 #define EVEN_COUNTERS thread_even, core_even, package_even
 226 
 227 #define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no)          \
 228         ((thread_base) +                                                      \
 229          ((pkg_no) *                                                          \
 230           topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
 231          ((node_no) * topo.cores_per_node * topo.threads_per_core) +          \
 232          ((core_no) * topo.threads_per_core) +                                \
 233          (thread_no))
 234 
 235 #define GET_CORE(core_base, core_no, node_no, pkg_no)                   \
 236         ((core_base) +                                                  \
 237          ((pkg_no) *  topo.nodes_per_pkg * topo.cores_per_node) +       \
 238          ((node_no) * topo.cores_per_node) +                            \
 239          (core_no))
 240 
 241 
 242 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
 243 
 244 enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
 245 enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
 246 enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
 247 
 248 struct msr_counter {
 249         unsigned int msr_num;
 250         char name[NAME_BYTES];
 251         char path[PATH_BYTES];
 252         unsigned int width;
 253         enum counter_type type;
 254         enum counter_format format;
 255         struct msr_counter *next;
 256         unsigned int flags;
 257 #define FLAGS_HIDE      (1 << 0)
 258 #define FLAGS_SHOW      (1 << 1)
 259 #define SYSFS_PERCPU    (1 << 1)
 260 };
 261 
 262 struct sys_counters {
 263         unsigned int added_thread_counters;
 264         unsigned int added_core_counters;
 265         unsigned int added_package_counters;
 266         struct msr_counter *tp;
 267         struct msr_counter *cp;
 268         struct msr_counter *pp;
 269 } sys;
 270 
 271 struct system_summary {
 272         struct thread_data threads;
 273         struct core_data cores;
 274         struct pkg_data packages;
 275 } average;
 276 
 277 struct cpu_topology {
 278         int physical_package_id;
 279         int die_id;
 280         int logical_cpu_id;
 281         int physical_node_id;
 282         int logical_node_id;    /* 0-based count within the package */
 283         int physical_core_id;
 284         int thread_id;
 285         cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
 286 } *cpus;
 287 
 288 struct topo_params {
 289         int num_packages;
 290         int num_die;
 291         int num_cpus;
 292         int num_cores;
 293         int max_cpu_num;
 294         int max_node_num;
 295         int nodes_per_pkg;
 296         int cores_per_node;
 297         int threads_per_core;
 298 } topo;
 299 
 300 struct timeval tv_even, tv_odd, tv_delta;
 301 
 302 int *irq_column_2_cpu;  /* /proc/interrupts column numbers */
 303 int *irqs_per_cpu;              /* indexed by cpu_num */
 304 
 305 void setup_all_buffers(void);
 306 
 307 char *sys_lpi_file;
 308 char *sys_lpi_file_sysfs = "/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us";
 309 char *sys_lpi_file_debugfs = "/sys/kernel/debug/pmc_core/slp_s0_residency_usec";
 310 
 311 int cpu_is_not_present(int cpu)
 312 {
 313         return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
 314 }
 315 /*
 316  * run func(thread, core, package) in topology order
 317  * skip non-present cpus
 318  */
 319 
 320 int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
 321         struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
 322 {
 323         int retval, pkg_no, core_no, thread_no, node_no;
 324 
 325         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
 326                 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
 327                         for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
 328                                 for (thread_no = 0; thread_no <
 329                                         topo.threads_per_core; ++thread_no) {
 330                                         struct thread_data *t;
 331                                         struct core_data *c;
 332                                         struct pkg_data *p;
 333 
 334                                         t = GET_THREAD(thread_base, thread_no,
 335                                                        core_no, node_no,
 336                                                        pkg_no);
 337 
 338                                         if (cpu_is_not_present(t->cpu_id))
 339                                                 continue;
 340 
 341                                         c = GET_CORE(core_base, core_no,
 342                                                      node_no, pkg_no);
 343                                         p = GET_PKG(pkg_base, pkg_no);
 344 
 345                                         retval = func(t, c, p);
 346                                         if (retval)
 347                                                 return retval;
 348                                 }
 349                         }
 350                 }
 351         }
 352         return 0;
 353 }
 354 
 355 int cpu_migrate(int cpu)
 356 {
 357         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
 358         CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
 359         if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
 360                 return -1;
 361         else
 362                 return 0;
 363 }
 364 int get_msr_fd(int cpu)
 365 {
 366         char pathname[32];
 367         int fd;
 368 
 369         fd = fd_percpu[cpu];
 370 
 371         if (fd)
 372                 return fd;
 373 
 374         sprintf(pathname, "/dev/cpu/%d/msr", cpu);
 375         fd = open(pathname, O_RDONLY);
 376         if (fd < 0)
 377                 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
 378 
 379         fd_percpu[cpu] = fd;
 380 
 381         return fd;
 382 }
 383 
 384 int get_msr(int cpu, off_t offset, unsigned long long *msr)
 385 {
 386         ssize_t retval;
 387 
 388         retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
 389 
 390         if (retval != sizeof *msr)
 391                 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
 392 
 393         return 0;
 394 }
 395 
 396 /*
 397  * This list matches the column headers, except
 398  * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
 399  * 2. Core and CPU are moved to the end, we can't have strings that contain them
 400  *    matching on them for --show and --hide.
 401  */
 402 struct msr_counter bic[] = {
 403         { 0x0, "usec" },
 404         { 0x0, "Time_Of_Day_Seconds" },
 405         { 0x0, "Package" },
 406         { 0x0, "Node" },
 407         { 0x0, "Avg_MHz" },
 408         { 0x0, "Busy%" },
 409         { 0x0, "Bzy_MHz" },
 410         { 0x0, "TSC_MHz" },
 411         { 0x0, "IRQ" },
 412         { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
 413         { 0x0, "sysfs" },
 414         { 0x0, "CPU%c1" },
 415         { 0x0, "CPU%c3" },
 416         { 0x0, "CPU%c6" },
 417         { 0x0, "CPU%c7" },
 418         { 0x0, "ThreadC" },
 419         { 0x0, "CoreTmp" },
 420         { 0x0, "CoreCnt" },
 421         { 0x0, "PkgTmp" },
 422         { 0x0, "GFX%rc6" },
 423         { 0x0, "GFXMHz" },
 424         { 0x0, "Pkg%pc2" },
 425         { 0x0, "Pkg%pc3" },
 426         { 0x0, "Pkg%pc6" },
 427         { 0x0, "Pkg%pc7" },
 428         { 0x0, "Pkg%pc8" },
 429         { 0x0, "Pkg%pc9" },
 430         { 0x0, "Pk%pc10" },
 431         { 0x0, "CPU%LPI" },
 432         { 0x0, "SYS%LPI" },
 433         { 0x0, "PkgWatt" },
 434         { 0x0, "CorWatt" },
 435         { 0x0, "GFXWatt" },
 436         { 0x0, "PkgCnt" },
 437         { 0x0, "RAMWatt" },
 438         { 0x0, "PKG_%" },
 439         { 0x0, "RAM_%" },
 440         { 0x0, "Pkg_J" },
 441         { 0x0, "Cor_J" },
 442         { 0x0, "GFX_J" },
 443         { 0x0, "RAM_J" },
 444         { 0x0, "Mod%c6" },
 445         { 0x0, "Totl%C0" },
 446         { 0x0, "Any%C0" },
 447         { 0x0, "GFX%C0" },
 448         { 0x0, "CPUGFX%" },
 449         { 0x0, "Core" },
 450         { 0x0, "CPU" },
 451         { 0x0, "APIC" },
 452         { 0x0, "X2APIC" },
 453         { 0x0, "Die" },
 454 };
 455 
 456 #define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
 457 #define BIC_USEC        (1ULL << 0)
 458 #define BIC_TOD         (1ULL << 1)
 459 #define BIC_Package     (1ULL << 2)
 460 #define BIC_Node        (1ULL << 3)
 461 #define BIC_Avg_MHz     (1ULL << 4)
 462 #define BIC_Busy        (1ULL << 5)
 463 #define BIC_Bzy_MHz     (1ULL << 6)
 464 #define BIC_TSC_MHz     (1ULL << 7)
 465 #define BIC_IRQ         (1ULL << 8)
 466 #define BIC_SMI         (1ULL << 9)
 467 #define BIC_sysfs       (1ULL << 10)
 468 #define BIC_CPU_c1      (1ULL << 11)
 469 #define BIC_CPU_c3      (1ULL << 12)
 470 #define BIC_CPU_c6      (1ULL << 13)
 471 #define BIC_CPU_c7      (1ULL << 14)
 472 #define BIC_ThreadC     (1ULL << 15)
 473 #define BIC_CoreTmp     (1ULL << 16)
 474 #define BIC_CoreCnt     (1ULL << 17)
 475 #define BIC_PkgTmp      (1ULL << 18)
 476 #define BIC_GFX_rc6     (1ULL << 19)
 477 #define BIC_GFXMHz      (1ULL << 20)
 478 #define BIC_Pkgpc2      (1ULL << 21)
 479 #define BIC_Pkgpc3      (1ULL << 22)
 480 #define BIC_Pkgpc6      (1ULL << 23)
 481 #define BIC_Pkgpc7      (1ULL << 24)
 482 #define BIC_Pkgpc8      (1ULL << 25)
 483 #define BIC_Pkgpc9      (1ULL << 26)
 484 #define BIC_Pkgpc10     (1ULL << 27)
 485 #define BIC_CPU_LPI     (1ULL << 28)
 486 #define BIC_SYS_LPI     (1ULL << 29)
 487 #define BIC_PkgWatt     (1ULL << 30)
 488 #define BIC_CorWatt     (1ULL << 31)
 489 #define BIC_GFXWatt     (1ULL << 32)
 490 #define BIC_PkgCnt      (1ULL << 33)
 491 #define BIC_RAMWatt     (1ULL << 34)
 492 #define BIC_PKG__       (1ULL << 35)
 493 #define BIC_RAM__       (1ULL << 36)
 494 #define BIC_Pkg_J       (1ULL << 37)
 495 #define BIC_Cor_J       (1ULL << 38)
 496 #define BIC_GFX_J       (1ULL << 39)
 497 #define BIC_RAM_J       (1ULL << 40)
 498 #define BIC_Mod_c6      (1ULL << 41)
 499 #define BIC_Totl_c0     (1ULL << 42)
 500 #define BIC_Any_c0      (1ULL << 43)
 501 #define BIC_GFX_c0      (1ULL << 44)
 502 #define BIC_CPUGFX      (1ULL << 45)
 503 #define BIC_Core        (1ULL << 46)
 504 #define BIC_CPU         (1ULL << 47)
 505 #define BIC_APIC        (1ULL << 48)
 506 #define BIC_X2APIC      (1ULL << 49)
 507 #define BIC_Die         (1ULL << 50)
 508 
 509 #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
 510 
 511 unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
 512 unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
 513 
 514 #define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
 515 #define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
 516 #define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
 517 #define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
 518 #define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
 519 
 520 
 521 #define MAX_DEFERRED 16
 522 char *deferred_skip_names[MAX_DEFERRED];
 523 int deferred_skip_index;
 524 
 525 /*
 526  * HIDE_LIST - hide this list of counters, show the rest [default]
 527  * SHOW_LIST - show this list of counters, hide the rest
 528  */
 529 enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
 530 
 531 void help(void)
 532 {
 533         fprintf(outf,
 534         "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
 535         "\n"
 536         "Turbostat forks the specified COMMAND and prints statistics\n"
 537         "when COMMAND completes.\n"
 538         "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
 539         "to print statistics, until interrupted.\n"
 540         "  -a, --add    add a counter\n"
 541         "                 eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
 542         "  -c, --cpu    cpu-set limit output to summary plus cpu-set:\n"
 543         "                 {core | package | j,k,l..m,n-p }\n"
 544         "  -d, --debug  displays usec, Time_Of_Day_Seconds and more debugging\n"
 545         "  -D, --Dump   displays the raw counter values\n"
 546         "  -e, --enable [all | column]\n"
 547         "               shows all or the specified disabled column\n"
 548         "  -H, --hide [column|column,column,...]\n"
 549         "               hide the specified column(s)\n"
 550         "  -i, --interval sec.subsec\n"
 551         "               Override default 5-second measurement interval\n"
 552         "  -J, --Joules displays energy in Joules instead of Watts\n"
 553         "  -l, --list   list column headers only\n"
 554         "  -n, --num_iterations num\n"
 555         "               number of the measurement iterations\n"
 556         "  -o, --out file\n"
 557         "               create or truncate \"file\" for all output\n"
 558         "  -q, --quiet  skip decoding system configuration header\n"
 559         "  -s, --show [column|column,column,...]\n"
 560         "               show only the specified column(s)\n"
 561         "  -S, --Summary\n"
 562         "               limits output to 1-line system summary per interval\n"
 563         "  -T, --TCC temperature\n"
 564         "               sets the Thermal Control Circuit temperature in\n"
 565         "                 degrees Celsius\n"
 566         "  -h, --help   print this help message\n"
 567         "  -v, --version        print version information\n"
 568         "\n"
 569         "For more help, run \"man turbostat\"\n");
 570 }
 571 
 572 /*
 573  * bic_lookup
 574  * for all the strings in comma separate name_list,
 575  * set the approprate bit in return value.
 576  */
 577 unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
 578 {
 579         int i;
 580         unsigned long long retval = 0;
 581 
 582         while (name_list) {
 583                 char *comma;
 584 
 585                 comma = strchr(name_list, ',');
 586 
 587                 if (comma)
 588                         *comma = '\0';
 589 
 590                 if (!strcmp(name_list, "all"))
 591                         return ~0;
 592 
 593                 for (i = 0; i < MAX_BIC; ++i) {
 594                         if (!strcmp(name_list, bic[i].name)) {
 595                                 retval |= (1ULL << i);
 596                                 break;
 597                         }
 598                 }
 599                 if (i == MAX_BIC) {
 600                         if (mode == SHOW_LIST) {
 601                                 fprintf(stderr, "Invalid counter name: %s\n", name_list);
 602                                 exit(-1);
 603                         }
 604                         deferred_skip_names[deferred_skip_index++] = name_list;
 605                         if (debug)
 606                                 fprintf(stderr, "deferred \"%s\"\n", name_list);
 607                         if (deferred_skip_index >= MAX_DEFERRED) {
 608                                 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
 609                                         MAX_DEFERRED, name_list);
 610                                 help();
 611                                 exit(1);
 612                         }
 613                 }
 614 
 615                 name_list = comma;
 616                 if (name_list)
 617                         name_list++;
 618 
 619         }
 620         return retval;
 621 }
 622 
 623 
 624 void print_header(char *delim)
 625 {
 626         struct msr_counter *mp;
 627         int printed = 0;
 628 
 629         if (DO_BIC(BIC_USEC))
 630                 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
 631         if (DO_BIC(BIC_TOD))
 632                 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
 633         if (DO_BIC(BIC_Package))
 634                 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
 635         if (DO_BIC(BIC_Die))
 636                 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
 637         if (DO_BIC(BIC_Node))
 638                 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
 639         if (DO_BIC(BIC_Core))
 640                 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
 641         if (DO_BIC(BIC_CPU))
 642                 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
 643         if (DO_BIC(BIC_APIC))
 644                 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
 645         if (DO_BIC(BIC_X2APIC))
 646                 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
 647         if (DO_BIC(BIC_Avg_MHz))
 648                 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
 649         if (DO_BIC(BIC_Busy))
 650                 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
 651         if (DO_BIC(BIC_Bzy_MHz))
 652                 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
 653         if (DO_BIC(BIC_TSC_MHz))
 654                 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
 655 
 656         if (DO_BIC(BIC_IRQ)) {
 657                 if (sums_need_wide_columns)
 658                         outp += sprintf(outp, "%s     IRQ", (printed++ ? delim : ""));
 659                 else
 660                         outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
 661         }
 662 
 663         if (DO_BIC(BIC_SMI))
 664                 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
 665 
 666         for (mp = sys.tp; mp; mp = mp->next) {
 667 
 668                 if (mp->format == FORMAT_RAW) {
 669                         if (mp->width == 64)
 670                                 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
 671                         else
 672                                 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
 673                 } else {
 674                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 675                                 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
 676                         else
 677                                 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
 678                 }
 679         }
 680 
 681         if (DO_BIC(BIC_CPU_c1))
 682                 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
 683         if (DO_BIC(BIC_CPU_c3))
 684                 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
 685         if (DO_BIC(BIC_CPU_c6))
 686                 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
 687         if (DO_BIC(BIC_CPU_c7))
 688                 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
 689 
 690         if (DO_BIC(BIC_Mod_c6))
 691                 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
 692 
 693         if (DO_BIC(BIC_CoreTmp))
 694                 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
 695 
 696         if (do_rapl && !rapl_joules) {
 697                 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
 698                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 699         } else if (do_rapl && rapl_joules) {
 700                 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
 701                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 702         }
 703 
 704         for (mp = sys.cp; mp; mp = mp->next) {
 705                 if (mp->format == FORMAT_RAW) {
 706                         if (mp->width == 64)
 707                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 708                         else
 709                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 710                 } else {
 711                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 712                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 713                         else
 714                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 715                 }
 716         }
 717 
 718         if (DO_BIC(BIC_PkgTmp))
 719                 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
 720 
 721         if (DO_BIC(BIC_GFX_rc6))
 722                 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
 723 
 724         if (DO_BIC(BIC_GFXMHz))
 725                 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
 726 
 727         if (DO_BIC(BIC_Totl_c0))
 728                 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
 729         if (DO_BIC(BIC_Any_c0))
 730                 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
 731         if (DO_BIC(BIC_GFX_c0))
 732                 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
 733         if (DO_BIC(BIC_CPUGFX))
 734                 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
 735 
 736         if (DO_BIC(BIC_Pkgpc2))
 737                 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
 738         if (DO_BIC(BIC_Pkgpc3))
 739                 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
 740         if (DO_BIC(BIC_Pkgpc6))
 741                 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
 742         if (DO_BIC(BIC_Pkgpc7))
 743                 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
 744         if (DO_BIC(BIC_Pkgpc8))
 745                 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
 746         if (DO_BIC(BIC_Pkgpc9))
 747                 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
 748         if (DO_BIC(BIC_Pkgpc10))
 749                 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
 750         if (DO_BIC(BIC_CPU_LPI))
 751                 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
 752         if (DO_BIC(BIC_SYS_LPI))
 753                 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
 754 
 755         if (do_rapl && !rapl_joules) {
 756                 if (DO_BIC(BIC_PkgWatt))
 757                         outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
 758                 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 759                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 760                 if (DO_BIC(BIC_GFXWatt))
 761                         outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
 762                 if (DO_BIC(BIC_RAMWatt))
 763                         outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
 764                 if (DO_BIC(BIC_PKG__))
 765                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 766                 if (DO_BIC(BIC_RAM__))
 767                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 768         } else if (do_rapl && rapl_joules) {
 769                 if (DO_BIC(BIC_Pkg_J))
 770                         outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
 771                 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 772                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 773                 if (DO_BIC(BIC_GFX_J))
 774                         outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
 775                 if (DO_BIC(BIC_RAM_J))
 776                         outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
 777                 if (DO_BIC(BIC_PKG__))
 778                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 779                 if (DO_BIC(BIC_RAM__))
 780                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 781         }
 782         for (mp = sys.pp; mp; mp = mp->next) {
 783                 if (mp->format == FORMAT_RAW) {
 784                         if (mp->width == 64)
 785                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 786                         else
 787                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 788                 } else {
 789                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 790                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 791                         else
 792                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 793                 }
 794         }
 795 
 796         outp += sprintf(outp, "\n");
 797 }
 798 
 799 int dump_counters(struct thread_data *t, struct core_data *c,
 800         struct pkg_data *p)
 801 {
 802         int i;
 803         struct msr_counter *mp;
 804 
 805         outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
 806 
 807         if (t) {
 808                 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
 809                         t->cpu_id, t->flags);
 810                 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
 811                 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
 812                 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
 813                 outp += sprintf(outp, "c1: %016llX\n", t->c1);
 814 
 815                 if (DO_BIC(BIC_IRQ))
 816                         outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
 817                 if (DO_BIC(BIC_SMI))
 818                         outp += sprintf(outp, "SMI: %d\n", t->smi_count);
 819 
 820                 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
 821                         outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
 822                                 i, mp->msr_num, t->counter[i]);
 823                 }
 824         }
 825 
 826         if (c) {
 827                 outp += sprintf(outp, "core: %d\n", c->core_id);
 828                 outp += sprintf(outp, "c3: %016llX\n", c->c3);
 829                 outp += sprintf(outp, "c6: %016llX\n", c->c6);
 830                 outp += sprintf(outp, "c7: %016llX\n", c->c7);
 831                 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
 832                 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
 833 
 834                 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
 835                         outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
 836                                 i, mp->msr_num, c->counter[i]);
 837                 }
 838                 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
 839         }
 840 
 841         if (p) {
 842                 outp += sprintf(outp, "package: %d\n", p->package_id);
 843 
 844                 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
 845                 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
 846                 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
 847                 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
 848 
 849                 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
 850                 if (DO_BIC(BIC_Pkgpc3))
 851                         outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
 852                 if (DO_BIC(BIC_Pkgpc6))
 853                         outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
 854                 if (DO_BIC(BIC_Pkgpc7))
 855                         outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
 856                 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
 857                 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
 858                 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
 859                 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
 860                 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
 861                 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
 862                 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
 863                 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
 864                 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
 865                 outp += sprintf(outp, "Throttle PKG: %0X\n",
 866                         p->rapl_pkg_perf_status);
 867                 outp += sprintf(outp, "Throttle RAM: %0X\n",
 868                         p->rapl_dram_perf_status);
 869                 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
 870 
 871                 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
 872                         outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
 873                                 i, mp->msr_num, p->counter[i]);
 874                 }
 875         }
 876 
 877         outp += sprintf(outp, "\n");
 878 
 879         return 0;
 880 }
 881 
 882 /*
 883  * column formatting convention & formats
 884  */
 885 int format_counters(struct thread_data *t, struct core_data *c,
 886         struct pkg_data *p)
 887 {
 888         double interval_float, tsc;
 889         char *fmt8;
 890         int i;
 891         struct msr_counter *mp;
 892         char *delim = "\t";
 893         int printed = 0;
 894 
 895          /* if showing only 1st thread in core and this isn't one, bail out */
 896         if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
 897                 return 0;
 898 
 899          /* if showing only 1st thread in pkg and this isn't one, bail out */
 900         if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
 901                 return 0;
 902 
 903         /*if not summary line and --cpu is used */
 904         if ((t != &average.threads) &&
 905                 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
 906                 return 0;
 907 
 908         if (DO_BIC(BIC_USEC)) {
 909                 /* on each row, print how many usec each timestamp took to gather */
 910                 struct timeval tv;
 911 
 912                 timersub(&t->tv_end, &t->tv_begin, &tv);
 913                 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
 914         }
 915 
 916         /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
 917         if (DO_BIC(BIC_TOD))
 918                 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
 919 
 920         interval_float = t->tv_delta.tv_sec + t->tv_delta.tv_usec/1000000.0;
 921 
 922         tsc = t->tsc * tsc_tweak;
 923 
 924         /* topo columns, print blanks on 1st (average) line */
 925         if (t == &average.threads) {
 926                 if (DO_BIC(BIC_Package))
 927                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 928                 if (DO_BIC(BIC_Die))
 929                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 930                 if (DO_BIC(BIC_Node))
 931                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 932                 if (DO_BIC(BIC_Core))
 933                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 934                 if (DO_BIC(BIC_CPU))
 935                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 936                 if (DO_BIC(BIC_APIC))
 937                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 938                 if (DO_BIC(BIC_X2APIC))
 939                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 940         } else {
 941                 if (DO_BIC(BIC_Package)) {
 942                         if (p)
 943                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
 944                         else
 945                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 946                 }
 947                 if (DO_BIC(BIC_Die)) {
 948                         if (c)
 949                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
 950                         else
 951                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 952                 }
 953                 if (DO_BIC(BIC_Node)) {
 954                         if (t)
 955                                 outp += sprintf(outp, "%s%d",
 956                                                 (printed++ ? delim : ""),
 957                                               cpus[t->cpu_id].physical_node_id);
 958                         else
 959                                 outp += sprintf(outp, "%s-",
 960                                                 (printed++ ? delim : ""));
 961                 }
 962                 if (DO_BIC(BIC_Core)) {
 963                         if (c)
 964                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
 965                         else
 966                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 967                 }
 968                 if (DO_BIC(BIC_CPU))
 969                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
 970                 if (DO_BIC(BIC_APIC))
 971                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
 972                 if (DO_BIC(BIC_X2APIC))
 973                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
 974         }
 975 
 976         if (DO_BIC(BIC_Avg_MHz))
 977                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
 978                         1.0 / units * t->aperf / interval_float);
 979 
 980         if (DO_BIC(BIC_Busy))
 981                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
 982 
 983         if (DO_BIC(BIC_Bzy_MHz)) {
 984                 if (has_base_hz)
 985                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
 986                 else
 987                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
 988                                 tsc / units * t->aperf / t->mperf / interval_float);
 989         }
 990 
 991         if (DO_BIC(BIC_TSC_MHz))
 992                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
 993 
 994         /* IRQ */
 995         if (DO_BIC(BIC_IRQ)) {
 996                 if (sums_need_wide_columns)
 997                         outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
 998                 else
 999                         outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
1000         }
1001 
1002         /* SMI */
1003         if (DO_BIC(BIC_SMI))
1004                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1005 
1006         /* Added counters */
1007         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1008                 if (mp->format == FORMAT_RAW) {
1009                         if (mp->width == 32)
1010                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
1011                         else
1012                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
1013                 } else if (mp->format == FORMAT_DELTA) {
1014                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1015                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
1016                         else
1017                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
1018                 } else if (mp->format == FORMAT_PERCENT) {
1019                         if (mp->type == COUNTER_USEC)
1020                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
1021                         else
1022                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
1023                 }
1024         }
1025 
1026         /* C1 */
1027         if (DO_BIC(BIC_CPU_c1))
1028                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
1029 
1030 
1031         /* print per-core data only for 1st thread in core */
1032         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1033                 goto done;
1034 
1035         if (DO_BIC(BIC_CPU_c3))
1036                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
1037         if (DO_BIC(BIC_CPU_c6))
1038                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
1039         if (DO_BIC(BIC_CPU_c7))
1040                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
1041 
1042         /* Mod%c6 */
1043         if (DO_BIC(BIC_Mod_c6))
1044                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
1045 
1046         if (DO_BIC(BIC_CoreTmp))
1047                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
1048 
1049         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1050                 if (mp->format == FORMAT_RAW) {
1051                         if (mp->width == 32)
1052                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
1053                         else
1054                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
1055                 } else if (mp->format == FORMAT_DELTA) {
1056                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1057                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
1058                         else
1059                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
1060                 } else if (mp->format == FORMAT_PERCENT) {
1061                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
1062                 }
1063         }
1064 
1065         /*
1066          * If measurement interval exceeds minimum RAPL Joule Counter range,
1067          * indicate that results are suspect by printing "**" in fraction place.
1068          */
1069         if (interval_float < rapl_joule_counter_range)
1070                 fmt8 = "%s%.2f";
1071         else
1072                 fmt8 = "%6.0f**";
1073 
1074         if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1075                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1076         if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1077                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1078 
1079         /* print per-package data only for 1st core in package */
1080         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1081                 goto done;
1082 
1083         /* PkgTmp */
1084         if (DO_BIC(BIC_PkgTmp))
1085                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
1086 
1087         /* GFXrc6 */
1088         if (DO_BIC(BIC_GFX_rc6)) {
1089                 if (p->gfx_rc6_ms == -1) {      /* detect GFX counter reset */
1090                         outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
1091                 } else {
1092                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
1093                                 p->gfx_rc6_ms / 10.0 / interval_float);
1094                 }
1095         }
1096 
1097         /* GFXMHz */
1098         if (DO_BIC(BIC_GFXMHz))
1099                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
1100 
1101         /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
1102         if (DO_BIC(BIC_Totl_c0))
1103                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
1104         if (DO_BIC(BIC_Any_c0))
1105                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
1106         if (DO_BIC(BIC_GFX_c0))
1107                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
1108         if (DO_BIC(BIC_CPUGFX))
1109                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
1110 
1111         if (DO_BIC(BIC_Pkgpc2))
1112                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
1113         if (DO_BIC(BIC_Pkgpc3))
1114                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
1115         if (DO_BIC(BIC_Pkgpc6))
1116                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
1117         if (DO_BIC(BIC_Pkgpc7))
1118                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
1119         if (DO_BIC(BIC_Pkgpc8))
1120                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
1121         if (DO_BIC(BIC_Pkgpc9))
1122                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
1123         if (DO_BIC(BIC_Pkgpc10))
1124                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
1125 
1126         if (DO_BIC(BIC_CPU_LPI))
1127                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1128         if (DO_BIC(BIC_SYS_LPI))
1129                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1130 
1131         if (DO_BIC(BIC_PkgWatt))
1132                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
1133         if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1134                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
1135         if (DO_BIC(BIC_GFXWatt))
1136                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
1137         if (DO_BIC(BIC_RAMWatt))
1138                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
1139         if (DO_BIC(BIC_Pkg_J))
1140                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
1141         if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1142                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
1143         if (DO_BIC(BIC_GFX_J))
1144                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
1145         if (DO_BIC(BIC_RAM_J))
1146                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
1147         if (DO_BIC(BIC_PKG__))
1148                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
1149         if (DO_BIC(BIC_RAM__))
1150                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
1151 
1152         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1153                 if (mp->format == FORMAT_RAW) {
1154                         if (mp->width == 32)
1155                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
1156                         else
1157                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
1158                 } else if (mp->format == FORMAT_DELTA) {
1159                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1160                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
1161                         else
1162                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
1163                 } else if (mp->format == FORMAT_PERCENT) {
1164                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
1165                 }
1166         }
1167 
1168 done:
1169         if (*(outp - 1) != '\n')
1170                 outp += sprintf(outp, "\n");
1171 
1172         return 0;
1173 }
1174 
1175 void flush_output_stdout(void)
1176 {
1177         FILE *filep;
1178 
1179         if (outf == stderr)
1180                 filep = stdout;
1181         else
1182                 filep = outf;
1183 
1184         fputs(output_buffer, filep);
1185         fflush(filep);
1186 
1187         outp = output_buffer;
1188 }
1189 void flush_output_stderr(void)
1190 {
1191         fputs(output_buffer, outf);
1192         fflush(outf);
1193         outp = output_buffer;
1194 }
1195 void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1196 {
1197         static int printed;
1198 
1199         if (!printed || !summary_only)
1200                 print_header("\t");
1201 
1202         format_counters(&average.threads, &average.cores, &average.packages);
1203 
1204         printed = 1;
1205 
1206         if (summary_only)
1207                 return;
1208 
1209         for_all_cpus(format_counters, t, c, p);
1210 }
1211 
1212 #define DELTA_WRAP32(new, old)                  \
1213         if (new > old) {                        \
1214                 old = new - old;                \
1215         } else {                                \
1216                 old = 0x100000000 + new - old;  \
1217         }
1218 
1219 int
1220 delta_package(struct pkg_data *new, struct pkg_data *old)
1221 {
1222         int i;
1223         struct msr_counter *mp;
1224 
1225 
1226         if (DO_BIC(BIC_Totl_c0))
1227                 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
1228         if (DO_BIC(BIC_Any_c0))
1229                 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
1230         if (DO_BIC(BIC_GFX_c0))
1231                 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
1232         if (DO_BIC(BIC_CPUGFX))
1233                 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
1234 
1235         old->pc2 = new->pc2 - old->pc2;
1236         if (DO_BIC(BIC_Pkgpc3))
1237                 old->pc3 = new->pc3 - old->pc3;
1238         if (DO_BIC(BIC_Pkgpc6))
1239                 old->pc6 = new->pc6 - old->pc6;
1240         if (DO_BIC(BIC_Pkgpc7))
1241                 old->pc7 = new->pc7 - old->pc7;
1242         old->pc8 = new->pc8 - old->pc8;
1243         old->pc9 = new->pc9 - old->pc9;
1244         old->pc10 = new->pc10 - old->pc10;
1245         old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1246         old->sys_lpi = new->sys_lpi - old->sys_lpi;
1247         old->pkg_temp_c = new->pkg_temp_c;
1248 
1249         /* flag an error when rc6 counter resets/wraps */
1250         if (old->gfx_rc6_ms >  new->gfx_rc6_ms)
1251                 old->gfx_rc6_ms = -1;
1252         else
1253                 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1254 
1255         old->gfx_mhz = new->gfx_mhz;
1256 
1257         DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
1258         DELTA_WRAP32(new->energy_cores, old->energy_cores);
1259         DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
1260         DELTA_WRAP32(new->energy_dram, old->energy_dram);
1261         DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
1262         DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
1263 
1264         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1265                 if (mp->format == FORMAT_RAW)
1266                         old->counter[i] = new->counter[i];
1267                 else
1268                         old->counter[i] = new->counter[i] - old->counter[i];
1269         }
1270 
1271         return 0;
1272 }
1273 
1274 void
1275 delta_core(struct core_data *new, struct core_data *old)
1276 {
1277         int i;
1278         struct msr_counter *mp;
1279 
1280         old->c3 = new->c3 - old->c3;
1281         old->c6 = new->c6 - old->c6;
1282         old->c7 = new->c7 - old->c7;
1283         old->core_temp_c = new->core_temp_c;
1284         old->mc6_us = new->mc6_us - old->mc6_us;
1285 
1286         DELTA_WRAP32(new->core_energy, old->core_energy);
1287 
1288         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1289                 if (mp->format == FORMAT_RAW)
1290                         old->counter[i] = new->counter[i];
1291                 else
1292                         old->counter[i] = new->counter[i] - old->counter[i];
1293         }
1294 }
1295 
1296 int soft_c1_residency_display(int bic)
1297 {
1298         if (!DO_BIC(BIC_CPU_c1) || use_c1_residency_msr)
1299                 return 0;
1300 
1301         return DO_BIC_READ(bic);
1302 }
1303 
1304 /*
1305  * old = new - old
1306  */
1307 int
1308 delta_thread(struct thread_data *new, struct thread_data *old,
1309         struct core_data *core_delta)
1310 {
1311         int i;
1312         struct msr_counter *mp;
1313 
1314         /* we run cpuid just the 1st time, copy the results */
1315         if (DO_BIC(BIC_APIC))
1316                 new->apic_id = old->apic_id;
1317         if (DO_BIC(BIC_X2APIC))
1318                 new->x2apic_id = old->x2apic_id;
1319 
1320         /*
1321          * the timestamps from start of measurement interval are in "old"
1322          * the timestamp from end of measurement interval are in "new"
1323          * over-write old w/ new so we can print end of interval values
1324          */
1325 
1326         timersub(&new->tv_begin, &old->tv_begin, &old->tv_delta);
1327         old->tv_begin = new->tv_begin;
1328         old->tv_end = new->tv_end;
1329 
1330         old->tsc = new->tsc - old->tsc;
1331 
1332         /* check for TSC < 1 Mcycles over interval */
1333         if (old->tsc < (1000 * 1000))
1334                 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1335                      "You can disable all c-states by booting with \"idle=poll\"\n"
1336                      "or just the deep ones with \"processor.max_cstate=1\"");
1337 
1338         old->c1 = new->c1 - old->c1;
1339 
1340         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1341             soft_c1_residency_display(BIC_Avg_MHz)) {
1342                 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1343                         old->aperf = new->aperf - old->aperf;
1344                         old->mperf = new->mperf - old->mperf;
1345                 } else {
1346                         return -1;
1347                 }
1348         }
1349 
1350 
1351         if (use_c1_residency_msr) {
1352                 /*
1353                  * Some models have a dedicated C1 residency MSR,
1354                  * which should be more accurate than the derivation below.
1355                  */
1356         } else {
1357                 /*
1358                  * As counter collection is not atomic,
1359                  * it is possible for mperf's non-halted cycles + idle states
1360                  * to exceed TSC's all cycles: show c1 = 0% in that case.
1361                  */
1362                 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
1363                         old->c1 = 0;
1364                 else {
1365                         /* normal case, derive c1 */
1366                         old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
1367                                 - core_delta->c6 - core_delta->c7;
1368                 }
1369         }
1370 
1371         if (old->mperf == 0) {
1372                 if (debug > 1)
1373                         fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
1374                 old->mperf = 1; /* divide by 0 protection */
1375         }
1376 
1377         if (DO_BIC(BIC_IRQ))
1378                 old->irq_count = new->irq_count - old->irq_count;
1379 
1380         if (DO_BIC(BIC_SMI))
1381                 old->smi_count = new->smi_count - old->smi_count;
1382 
1383         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1384                 if (mp->format == FORMAT_RAW)
1385                         old->counter[i] = new->counter[i];
1386                 else
1387                         old->counter[i] = new->counter[i] - old->counter[i];
1388         }
1389         return 0;
1390 }
1391 
1392 int delta_cpu(struct thread_data *t, struct core_data *c,
1393         struct pkg_data *p, struct thread_data *t2,
1394         struct core_data *c2, struct pkg_data *p2)
1395 {
1396         int retval = 0;
1397 
1398         /* calculate core delta only for 1st thread in core */
1399         if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1400                 delta_core(c, c2);
1401 
1402         /* always calculate thread delta */
1403         retval = delta_thread(t, t2, c2);       /* c2 is core delta */
1404         if (retval)
1405                 return retval;
1406 
1407         /* calculate package delta only for 1st core in package */
1408         if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
1409                 retval = delta_package(p, p2);
1410 
1411         return retval;
1412 }
1413 
1414 void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1415 {
1416         int i;
1417         struct msr_counter  *mp;
1418 
1419         t->tv_begin.tv_sec = 0;
1420         t->tv_begin.tv_usec = 0;
1421         t->tv_end.tv_sec = 0;
1422         t->tv_end.tv_usec = 0;
1423         t->tv_delta.tv_sec = 0;
1424         t->tv_delta.tv_usec = 0;
1425 
1426         t->tsc = 0;
1427         t->aperf = 0;
1428         t->mperf = 0;
1429         t->c1 = 0;
1430 
1431         t->irq_count = 0;
1432         t->smi_count = 0;
1433 
1434         /* tells format_counters to dump all fields from this set */
1435         t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1436 
1437         c->c3 = 0;
1438         c->c6 = 0;
1439         c->c7 = 0;
1440         c->mc6_us = 0;
1441         c->core_temp_c = 0;
1442         c->core_energy = 0;
1443 
1444         p->pkg_wtd_core_c0 = 0;
1445         p->pkg_any_core_c0 = 0;
1446         p->pkg_any_gfxe_c0 = 0;
1447         p->pkg_both_core_gfxe_c0 = 0;
1448 
1449         p->pc2 = 0;
1450         if (DO_BIC(BIC_Pkgpc3))
1451                 p->pc3 = 0;
1452         if (DO_BIC(BIC_Pkgpc6))
1453                 p->pc6 = 0;
1454         if (DO_BIC(BIC_Pkgpc7))
1455                 p->pc7 = 0;
1456         p->pc8 = 0;
1457         p->pc9 = 0;
1458         p->pc10 = 0;
1459         p->cpu_lpi = 0;
1460         p->sys_lpi = 0;
1461 
1462         p->energy_pkg = 0;
1463         p->energy_dram = 0;
1464         p->energy_cores = 0;
1465         p->energy_gfx = 0;
1466         p->rapl_pkg_perf_status = 0;
1467         p->rapl_dram_perf_status = 0;
1468         p->pkg_temp_c = 0;
1469 
1470         p->gfx_rc6_ms = 0;
1471         p->gfx_mhz = 0;
1472         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1473                 t->counter[i] = 0;
1474 
1475         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1476                 c->counter[i] = 0;
1477 
1478         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1479                 p->counter[i] = 0;
1480 }
1481 int sum_counters(struct thread_data *t, struct core_data *c,
1482         struct pkg_data *p)
1483 {
1484         int i;
1485         struct msr_counter *mp;
1486 
1487         /* copy un-changing apic_id's */
1488         if (DO_BIC(BIC_APIC))
1489                 average.threads.apic_id = t->apic_id;
1490         if (DO_BIC(BIC_X2APIC))
1491                 average.threads.x2apic_id = t->x2apic_id;
1492 
1493         /* remember first tv_begin */
1494         if (average.threads.tv_begin.tv_sec == 0)
1495                 average.threads.tv_begin = t->tv_begin;
1496 
1497         /* remember last tv_end */
1498         average.threads.tv_end = t->tv_end;
1499 
1500         average.threads.tsc += t->tsc;
1501         average.threads.aperf += t->aperf;
1502         average.threads.mperf += t->mperf;
1503         average.threads.c1 += t->c1;
1504 
1505         average.threads.irq_count += t->irq_count;
1506         average.threads.smi_count += t->smi_count;
1507 
1508         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1509                 if (mp->format == FORMAT_RAW)
1510                         continue;
1511                 average.threads.counter[i] += t->counter[i];
1512         }
1513 
1514         /* sum per-core values only for 1st thread in core */
1515         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1516                 return 0;
1517 
1518         average.cores.c3 += c->c3;
1519         average.cores.c6 += c->c6;
1520         average.cores.c7 += c->c7;
1521         average.cores.mc6_us += c->mc6_us;
1522 
1523         average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1524 
1525         average.cores.core_energy += c->core_energy;
1526 
1527         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1528                 if (mp->format == FORMAT_RAW)
1529                         continue;
1530                 average.cores.counter[i] += c->counter[i];
1531         }
1532 
1533         /* sum per-pkg values only for 1st core in pkg */
1534         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1535                 return 0;
1536 
1537         if (DO_BIC(BIC_Totl_c0))
1538                 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
1539         if (DO_BIC(BIC_Any_c0))
1540                 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
1541         if (DO_BIC(BIC_GFX_c0))
1542                 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
1543         if (DO_BIC(BIC_CPUGFX))
1544                 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
1545 
1546         average.packages.pc2 += p->pc2;
1547         if (DO_BIC(BIC_Pkgpc3))
1548                 average.packages.pc3 += p->pc3;
1549         if (DO_BIC(BIC_Pkgpc6))
1550                 average.packages.pc6 += p->pc6;
1551         if (DO_BIC(BIC_Pkgpc7))
1552                 average.packages.pc7 += p->pc7;
1553         average.packages.pc8 += p->pc8;
1554         average.packages.pc9 += p->pc9;
1555         average.packages.pc10 += p->pc10;
1556 
1557         average.packages.cpu_lpi = p->cpu_lpi;
1558         average.packages.sys_lpi = p->sys_lpi;
1559 
1560         average.packages.energy_pkg += p->energy_pkg;
1561         average.packages.energy_dram += p->energy_dram;
1562         average.packages.energy_cores += p->energy_cores;
1563         average.packages.energy_gfx += p->energy_gfx;
1564 
1565         average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1566         average.packages.gfx_mhz = p->gfx_mhz;
1567 
1568         average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1569 
1570         average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1571         average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1572 
1573         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1574                 if (mp->format == FORMAT_RAW)
1575                         continue;
1576                 average.packages.counter[i] += p->counter[i];
1577         }
1578         return 0;
1579 }
1580 /*
1581  * sum the counters for all cpus in the system
1582  * compute the weighted average
1583  */
1584 void compute_average(struct thread_data *t, struct core_data *c,
1585         struct pkg_data *p)
1586 {
1587         int i;
1588         struct msr_counter *mp;
1589 
1590         clear_counters(&average.threads, &average.cores, &average.packages);
1591 
1592         for_all_cpus(sum_counters, t, c, p);
1593 
1594         /* Use the global time delta for the average. */
1595         average.threads.tv_delta = tv_delta;
1596 
1597         average.threads.tsc /= topo.num_cpus;
1598         average.threads.aperf /= topo.num_cpus;
1599         average.threads.mperf /= topo.num_cpus;
1600         average.threads.c1 /= topo.num_cpus;
1601 
1602         if (average.threads.irq_count > 9999999)
1603                 sums_need_wide_columns = 1;
1604 
1605         average.cores.c3 /= topo.num_cores;
1606         average.cores.c6 /= topo.num_cores;
1607         average.cores.c7 /= topo.num_cores;
1608         average.cores.mc6_us /= topo.num_cores;
1609 
1610         if (DO_BIC(BIC_Totl_c0))
1611                 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1612         if (DO_BIC(BIC_Any_c0))
1613                 average.packages.pkg_any_core_c0 /= topo.num_packages;
1614         if (DO_BIC(BIC_GFX_c0))
1615                 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1616         if (DO_BIC(BIC_CPUGFX))
1617                 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1618 
1619         average.packages.pc2 /= topo.num_packages;
1620         if (DO_BIC(BIC_Pkgpc3))
1621                 average.packages.pc3 /= topo.num_packages;
1622         if (DO_BIC(BIC_Pkgpc6))
1623                 average.packages.pc6 /= topo.num_packages;
1624         if (DO_BIC(BIC_Pkgpc7))
1625                 average.packages.pc7 /= topo.num_packages;
1626 
1627         average.packages.pc8 /= topo.num_packages;
1628         average.packages.pc9 /= topo.num_packages;
1629         average.packages.pc10 /= topo.num_packages;
1630 
1631         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1632                 if (mp->format == FORMAT_RAW)
1633                         continue;
1634                 if (mp->type == COUNTER_ITEMS) {
1635                         if (average.threads.counter[i] > 9999999)
1636                                 sums_need_wide_columns = 1;
1637                         continue;
1638                 }
1639                 average.threads.counter[i] /= topo.num_cpus;
1640         }
1641         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1642                 if (mp->format == FORMAT_RAW)
1643                         continue;
1644                 if (mp->type == COUNTER_ITEMS) {
1645                         if (average.cores.counter[i] > 9999999)
1646                                 sums_need_wide_columns = 1;
1647                 }
1648                 average.cores.counter[i] /= topo.num_cores;
1649         }
1650         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1651                 if (mp->format == FORMAT_RAW)
1652                         continue;
1653                 if (mp->type == COUNTER_ITEMS) {
1654                         if (average.packages.counter[i] > 9999999)
1655                                 sums_need_wide_columns = 1;
1656                 }
1657                 average.packages.counter[i] /= topo.num_packages;
1658         }
1659 }
1660 
1661 static unsigned long long rdtsc(void)
1662 {
1663         unsigned int low, high;
1664 
1665         asm volatile("rdtsc" : "=a" (low), "=d" (high));
1666 
1667         return low | ((unsigned long long)high) << 32;
1668 }
1669 
1670 /*
1671  * Open a file, and exit on failure
1672  */
1673 FILE *fopen_or_die(const char *path, const char *mode)
1674 {
1675         FILE *filep = fopen(path, mode);
1676 
1677         if (!filep)
1678                 err(1, "%s: open failed", path);
1679         return filep;
1680 }
1681 /*
1682  * snapshot_sysfs_counter()
1683  *
1684  * return snapshot of given counter
1685  */
1686 unsigned long long snapshot_sysfs_counter(char *path)
1687 {
1688         FILE *fp;
1689         int retval;
1690         unsigned long long counter;
1691 
1692         fp = fopen_or_die(path, "r");
1693 
1694         retval = fscanf(fp, "%lld", &counter);
1695         if (retval != 1)
1696                 err(1, "snapshot_sysfs_counter(%s)", path);
1697 
1698         fclose(fp);
1699 
1700         return counter;
1701 }
1702 
1703 int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1704 {
1705         if (mp->msr_num != 0) {
1706                 if (get_msr(cpu, mp->msr_num, counterp))
1707                         return -1;
1708         } else {
1709                 char path[128 + PATH_BYTES];
1710 
1711                 if (mp->flags & SYSFS_PERCPU) {
1712                         sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1713                                  cpu, mp->path);
1714 
1715                         *counterp = snapshot_sysfs_counter(path);
1716                 } else {
1717                         *counterp = snapshot_sysfs_counter(mp->path);
1718                 }
1719         }
1720 
1721         return 0;
1722 }
1723 
1724 void get_apic_id(struct thread_data *t)
1725 {
1726         unsigned int eax, ebx, ecx, edx;
1727 
1728         if (DO_BIC(BIC_APIC)) {
1729                 eax = ebx = ecx = edx = 0;
1730                 __cpuid(1, eax, ebx, ecx, edx);
1731 
1732                 t->apic_id = (ebx >> 24) & 0xff;
1733         }
1734 
1735         if (!DO_BIC(BIC_X2APIC))
1736                 return;
1737 
1738         if (authentic_amd || hygon_genuine) {
1739                 unsigned int topology_extensions;
1740 
1741                 if (max_extended_level < 0x8000001e)
1742                         return;
1743 
1744                 eax = ebx = ecx = edx = 0;
1745                 __cpuid(0x80000001, eax, ebx, ecx, edx);
1746                         topology_extensions = ecx & (1 << 22);
1747 
1748                 if (topology_extensions == 0)
1749                         return;
1750 
1751                 eax = ebx = ecx = edx = 0;
1752                 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1753 
1754                 t->x2apic_id = eax;
1755                 return;
1756         }
1757 
1758         if (!genuine_intel)
1759                 return;
1760 
1761         if (max_level < 0xb)
1762                 return;
1763 
1764         ecx = 0;
1765         __cpuid(0xb, eax, ebx, ecx, edx);
1766         t->x2apic_id = edx;
1767 
1768         if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1769                 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1770                                 t->cpu_id, t->apic_id, t->x2apic_id);
1771 }
1772 
1773 /*
1774  * get_counters(...)
1775  * migrate to cpu
1776  * acquire and record local counters for that cpu
1777  */
1778 int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1779 {
1780         int cpu = t->cpu_id;
1781         unsigned long long msr;
1782         int aperf_mperf_retry_count = 0;
1783         struct msr_counter *mp;
1784         int i;
1785 
1786         if (cpu_migrate(cpu)) {
1787                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
1788                 return -1;
1789         }
1790 
1791         gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1792 
1793         if (first_counter_read)
1794                 get_apic_id(t);
1795 retry:
1796         t->tsc = rdtsc();       /* we are running on local CPU of interest */
1797 
1798         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1799             soft_c1_residency_display(BIC_Avg_MHz)) {
1800                 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1801 
1802                 /*
1803                  * The TSC, APERF and MPERF must be read together for
1804                  * APERF/MPERF and MPERF/TSC to give accurate results.
1805                  *
1806                  * Unfortunately, APERF and MPERF are read by
1807                  * individual system call, so delays may occur
1808                  * between them.  If the time to read them
1809                  * varies by a large amount, we re-read them.
1810                  */
1811 
1812                 /*
1813                  * This initial dummy APERF read has been seen to
1814                  * reduce jitter in the subsequent reads.
1815                  */
1816 
1817                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1818                         return -3;
1819 
1820                 t->tsc = rdtsc();       /* re-read close to APERF */
1821 
1822                 tsc_before = t->tsc;
1823 
1824                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1825                         return -3;
1826 
1827                 tsc_between = rdtsc();
1828 
1829                 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
1830                         return -4;
1831 
1832                 tsc_after = rdtsc();
1833 
1834                 aperf_time = tsc_between - tsc_before;
1835                 mperf_time = tsc_after - tsc_between;
1836 
1837                 /*
1838                  * If the system call latency to read APERF and MPERF
1839                  * differ by more than 2x, then try again.
1840                  */
1841                 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1842                         aperf_mperf_retry_count++;
1843                         if (aperf_mperf_retry_count < 5)
1844                                 goto retry;
1845                         else
1846                                 warnx("cpu%d jitter %lld %lld",
1847                                         cpu, aperf_time, mperf_time);
1848                 }
1849                 aperf_mperf_retry_count = 0;
1850 
1851                 t->aperf = t->aperf * aperf_mperf_multiplier;
1852                 t->mperf = t->mperf * aperf_mperf_multiplier;
1853         }
1854 
1855         if (DO_BIC(BIC_IRQ))
1856                 t->irq_count = irqs_per_cpu[cpu];
1857         if (DO_BIC(BIC_SMI)) {
1858                 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1859                         return -5;
1860                 t->smi_count = msr & 0xFFFFFFFF;
1861         }
1862         if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
1863                 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1864                         return -6;
1865         }
1866 
1867         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1868                 if (get_mp(cpu, mp, &t->counter[i]))
1869                         return -10;
1870         }
1871 
1872         /* collect core counters only for 1st thread in core */
1873         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1874                 goto done;
1875 
1876         if (DO_BIC(BIC_CPU_c3) || soft_c1_residency_display(BIC_CPU_c3)) {
1877                 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1878                         return -6;
1879         }
1880 
1881         if ((DO_BIC(BIC_CPU_c6) || soft_c1_residency_display(BIC_CPU_c6)) && !do_knl_cstates) {
1882                 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1883                         return -7;
1884         } else if (do_knl_cstates || soft_c1_residency_display(BIC_CPU_c6)) {
1885                 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1886                         return -7;
1887         }
1888 
1889         if (DO_BIC(BIC_CPU_c7) || soft_c1_residency_display(BIC_CPU_c7))
1890                 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1891                         return -8;
1892 
1893         if (DO_BIC(BIC_Mod_c6))
1894                 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
1895                         return -8;
1896 
1897         if (DO_BIC(BIC_CoreTmp)) {
1898                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1899                         return -9;
1900                 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1901         }
1902 
1903         if (do_rapl & RAPL_AMD_F17H) {
1904                 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
1905                         return -14;
1906                 c->core_energy = msr & 0xFFFFFFFF;
1907         }
1908 
1909         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1910                 if (get_mp(cpu, mp, &c->counter[i]))
1911                         return -10;
1912         }
1913 
1914         /* collect package counters only for 1st core in package */
1915         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1916                 goto done;
1917 
1918         if (DO_BIC(BIC_Totl_c0)) {
1919                 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1920                         return -10;
1921         }
1922         if (DO_BIC(BIC_Any_c0)) {
1923                 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1924                         return -11;
1925         }
1926         if (DO_BIC(BIC_GFX_c0)) {
1927                 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1928                         return -12;
1929         }
1930         if (DO_BIC(BIC_CPUGFX)) {
1931                 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1932                         return -13;
1933         }
1934         if (DO_BIC(BIC_Pkgpc3))
1935                 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1936                         return -9;
1937         if (DO_BIC(BIC_Pkgpc6)) {
1938                 if (do_slm_cstates) {
1939                         if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
1940                                 return -10;
1941                 } else {
1942                         if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1943                                 return -10;
1944                 }
1945         }
1946 
1947         if (DO_BIC(BIC_Pkgpc2))
1948                 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1949                         return -11;
1950         if (DO_BIC(BIC_Pkgpc7))
1951                 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1952                         return -12;
1953         if (DO_BIC(BIC_Pkgpc8))
1954                 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1955                         return -13;
1956         if (DO_BIC(BIC_Pkgpc9))
1957                 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1958                         return -13;
1959         if (DO_BIC(BIC_Pkgpc10))
1960                 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1961                         return -13;
1962 
1963         if (DO_BIC(BIC_CPU_LPI))
1964                 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
1965         if (DO_BIC(BIC_SYS_LPI))
1966                 p->sys_lpi = cpuidle_cur_sys_lpi_us;
1967 
1968         if (do_rapl & RAPL_PKG) {
1969                 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1970                         return -13;
1971                 p->energy_pkg = msr & 0xFFFFFFFF;
1972         }
1973         if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
1974                 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1975                         return -14;
1976                 p->energy_cores = msr & 0xFFFFFFFF;
1977         }
1978         if (do_rapl & RAPL_DRAM) {
1979                 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1980                         return -15;
1981                 p->energy_dram = msr & 0xFFFFFFFF;
1982         }
1983         if (do_rapl & RAPL_GFX) {
1984                 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1985                         return -16;
1986                 p->energy_gfx = msr & 0xFFFFFFFF;
1987         }
1988         if (do_rapl & RAPL_PKG_PERF_STATUS) {
1989                 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1990                         return -16;
1991                 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1992         }
1993         if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1994                 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1995                         return -16;
1996                 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1997         }
1998         if (do_rapl & RAPL_AMD_F17H) {
1999                 if (get_msr(cpu, MSR_PKG_ENERGY_STAT, &msr))
2000                         return -13;
2001                 p->energy_pkg = msr & 0xFFFFFFFF;
2002         }
2003         if (DO_BIC(BIC_PkgTmp)) {
2004                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2005                         return -17;
2006                 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2007         }
2008 
2009         if (DO_BIC(BIC_GFX_rc6))
2010                 p->gfx_rc6_ms = gfx_cur_rc6_ms;
2011 
2012         if (DO_BIC(BIC_GFXMHz))
2013                 p->gfx_mhz = gfx_cur_mhz;
2014 
2015         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
2016                 if (get_mp(cpu, mp, &p->counter[i]))
2017                         return -10;
2018         }
2019 done:
2020         gettimeofday(&t->tv_end, (struct timezone *)NULL);
2021 
2022         return 0;
2023 }
2024 
2025 /*
2026  * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2027  * If you change the values, note they are used both in comparisons
2028  * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2029  */
2030 
2031 #define PCLUKN 0 /* Unknown */
2032 #define PCLRSV 1 /* Reserved */
2033 #define PCL__0 2 /* PC0 */
2034 #define PCL__1 3 /* PC1 */
2035 #define PCL__2 4 /* PC2 */
2036 #define PCL__3 5 /* PC3 */
2037 #define PCL__4 6 /* PC4 */
2038 #define PCL__6 7 /* PC6 */
2039 #define PCL_6N 8 /* PC6 No Retention */
2040 #define PCL_6R 9 /* PC6 Retention */
2041 #define PCL__7 10 /* PC7 */
2042 #define PCL_7S 11 /* PC7 Shrink */
2043 #define PCL__8 12 /* PC8 */
2044 #define PCL__9 13 /* PC9 */
2045 #define PCL_10 14 /* PC10 */
2046 #define PCLUNL 15 /* Unlimited */
2047 
2048 int pkg_cstate_limit = PCLUKN;
2049 char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
2050         "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
2051 
2052 int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2053 int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2054 int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2055 int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
2056 int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2057 int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2058 int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2059 int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2060 
2061 
2062 static void
2063 calculate_tsc_tweak()
2064 {
2065         tsc_tweak = base_hz / tsc_hz;
2066 }
2067 
2068 static void
2069 dump_nhm_platform_info(void)
2070 {
2071         unsigned long long msr;
2072         unsigned int ratio;
2073 
2074         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2075 
2076         fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
2077 
2078         ratio = (msr >> 40) & 0xFF;
2079         fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
2080                 ratio, bclk, ratio * bclk);
2081 
2082         ratio = (msr >> 8) & 0xFF;
2083         fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2084                 ratio, bclk, ratio * bclk);
2085 
2086         get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
2087         fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
2088                 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
2089 
2090         return;
2091 }
2092 
2093 static void
2094 dump_hsw_turbo_ratio_limits(void)
2095 {
2096         unsigned long long msr;
2097         unsigned int ratio;
2098 
2099         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
2100 
2101         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
2102 
2103         ratio = (msr >> 8) & 0xFF;
2104         if (ratio)
2105                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
2106                         ratio, bclk, ratio * bclk);
2107 
2108         ratio = (msr >> 0) & 0xFF;
2109         if (ratio)
2110                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
2111                         ratio, bclk, ratio * bclk);
2112         return;
2113 }
2114 
2115 static void
2116 dump_ivt_turbo_ratio_limits(void)
2117 {
2118         unsigned long long msr;
2119         unsigned int ratio;
2120 
2121         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
2122 
2123         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
2124 
2125         ratio = (msr >> 56) & 0xFF;
2126         if (ratio)
2127                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
2128                         ratio, bclk, ratio * bclk);
2129 
2130         ratio = (msr >> 48) & 0xFF;
2131         if (ratio)
2132                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
2133                         ratio, bclk, ratio * bclk);
2134 
2135         ratio = (msr >> 40) & 0xFF;
2136         if (ratio)
2137                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
2138                         ratio, bclk, ratio * bclk);
2139 
2140         ratio = (msr >> 32) & 0xFF;
2141         if (ratio)
2142                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
2143                         ratio, bclk, ratio * bclk);
2144 
2145         ratio = (msr >> 24) & 0xFF;
2146         if (ratio)
2147                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
2148                         ratio, bclk, ratio * bclk);
2149 
2150         ratio = (msr >> 16) & 0xFF;
2151         if (ratio)
2152                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
2153                         ratio, bclk, ratio * bclk);
2154 
2155         ratio = (msr >> 8) & 0xFF;
2156         if (ratio)
2157                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
2158                         ratio, bclk, ratio * bclk);
2159 
2160         ratio = (msr >> 0) & 0xFF;
2161         if (ratio)
2162                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
2163                         ratio, bclk, ratio * bclk);
2164         return;
2165 }
2166 int has_turbo_ratio_group_limits(int family, int model)
2167 {
2168 
2169         if (!genuine_intel)
2170                 return 0;
2171 
2172         switch (model) {
2173         case INTEL_FAM6_ATOM_GOLDMONT:
2174         case INTEL_FAM6_SKYLAKE_X:
2175         case INTEL_FAM6_ATOM_GOLDMONT_D:
2176                 return 1;
2177         }
2178         return 0;
2179 }
2180 
2181 static void
2182 dump_turbo_ratio_limits(int family, int model)
2183 {
2184         unsigned long long msr, core_counts;
2185         unsigned int ratio, group_size;
2186 
2187         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2188         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
2189 
2190         if (has_turbo_ratio_group_limits(family, model)) {
2191                 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2192                 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2193         } else {
2194                 core_counts = 0x0807060504030201;
2195         }
2196 
2197         ratio = (msr >> 56) & 0xFF;
2198         group_size = (core_counts >> 56) & 0xFF;
2199         if (ratio)
2200                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2201                         ratio, bclk, ratio * bclk, group_size);
2202 
2203         ratio = (msr >> 48) & 0xFF;
2204         group_size = (core_counts >> 48) & 0xFF;
2205         if (ratio)
2206                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2207                         ratio, bclk, ratio * bclk, group_size);
2208 
2209         ratio = (msr >> 40) & 0xFF;
2210         group_size = (core_counts >> 40) & 0xFF;
2211         if (ratio)
2212                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2213                         ratio, bclk, ratio * bclk, group_size);
2214 
2215         ratio = (msr >> 32) & 0xFF;
2216         group_size = (core_counts >> 32) & 0xFF;
2217         if (ratio)
2218                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2219                         ratio, bclk, ratio * bclk, group_size);
2220 
2221         ratio = (msr >> 24) & 0xFF;
2222         group_size = (core_counts >> 24) & 0xFF;
2223         if (ratio)
2224                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2225                         ratio, bclk, ratio * bclk, group_size);
2226 
2227         ratio = (msr >> 16) & 0xFF;
2228         group_size = (core_counts >> 16) & 0xFF;
2229         if (ratio)
2230                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2231                         ratio, bclk, ratio * bclk, group_size);
2232 
2233         ratio = (msr >> 8) & 0xFF;
2234         group_size = (core_counts >> 8) & 0xFF;
2235         if (ratio)
2236                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2237                         ratio, bclk, ratio * bclk, group_size);
2238 
2239         ratio = (msr >> 0) & 0xFF;
2240         group_size = (core_counts >> 0) & 0xFF;
2241         if (ratio)
2242                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2243                         ratio, bclk, ratio * bclk, group_size);
2244         return;
2245 }
2246 
2247 static void
2248 dump_atom_turbo_ratio_limits(void)
2249 {
2250         unsigned long long msr;
2251         unsigned int ratio;
2252 
2253         get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2254         fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2255 
2256         ratio = (msr >> 0) & 0x3F;
2257         if (ratio)
2258                 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2259                         ratio, bclk, ratio * bclk);
2260 
2261         ratio = (msr >> 8) & 0x3F;
2262         if (ratio)
2263                 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2264                         ratio, bclk, ratio * bclk);
2265 
2266         ratio = (msr >> 16) & 0x3F;
2267         if (ratio)
2268                 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2269                         ratio, bclk, ratio * bclk);
2270 
2271         get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2272         fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2273 
2274         ratio = (msr >> 24) & 0x3F;
2275         if (ratio)
2276                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2277                         ratio, bclk, ratio * bclk);
2278 
2279         ratio = (msr >> 16) & 0x3F;
2280         if (ratio)
2281                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2282                         ratio, bclk, ratio * bclk);
2283 
2284         ratio = (msr >> 8) & 0x3F;
2285         if (ratio)
2286                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2287                         ratio, bclk, ratio * bclk);
2288 
2289         ratio = (msr >> 0) & 0x3F;
2290         if (ratio)
2291                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2292                         ratio, bclk, ratio * bclk);
2293 }
2294 
2295 static void
2296 dump_knl_turbo_ratio_limits(void)
2297 {
2298         const unsigned int buckets_no = 7;
2299 
2300         unsigned long long msr;
2301         int delta_cores, delta_ratio;
2302         int i, b_nr;
2303         unsigned int cores[buckets_no];
2304         unsigned int ratio[buckets_no];
2305 
2306         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2307 
2308         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
2309                 base_cpu, msr);
2310 
2311         /**
2312          * Turbo encoding in KNL is as follows:
2313          * [0] -- Reserved
2314          * [7:1] -- Base value of number of active cores of bucket 1.
2315          * [15:8] -- Base value of freq ratio of bucket 1.
2316          * [20:16] -- +ve delta of number of active cores of bucket 2.
2317          * i.e. active cores of bucket 2 =
2318          * active cores of bucket 1 + delta
2319          * [23:21] -- Negative delta of freq ratio of bucket 2.
2320          * i.e. freq ratio of bucket 2 =
2321          * freq ratio of bucket 1 - delta
2322          * [28:24]-- +ve delta of number of active cores of bucket 3.
2323          * [31:29]-- -ve delta of freq ratio of bucket 3.
2324          * [36:32]-- +ve delta of number of active cores of bucket 4.
2325          * [39:37]-- -ve delta of freq ratio of bucket 4.
2326          * [44:40]-- +ve delta of number of active cores of bucket 5.
2327          * [47:45]-- -ve delta of freq ratio of bucket 5.
2328          * [52:48]-- +ve delta of number of active cores of bucket 6.
2329          * [55:53]-- -ve delta of freq ratio of bucket 6.
2330          * [60:56]-- +ve delta of number of active cores of bucket 7.
2331          * [63:61]-- -ve delta of freq ratio of bucket 7.
2332          */
2333 
2334         b_nr = 0;
2335         cores[b_nr] = (msr & 0xFF) >> 1;
2336         ratio[b_nr] = (msr >> 8) & 0xFF;
2337 
2338         for (i = 16; i < 64; i += 8) {
2339                 delta_cores = (msr >> i) & 0x1F;
2340                 delta_ratio = (msr >> (i + 5)) & 0x7;
2341 
2342                 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2343                 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2344                 b_nr++;
2345         }
2346 
2347         for (i = buckets_no - 1; i >= 0; i--)
2348                 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
2349                         fprintf(outf,
2350                                 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2351                                 ratio[i], bclk, ratio[i] * bclk, cores[i]);
2352 }
2353 
2354 static void
2355 dump_nhm_cst_cfg(void)
2356 {
2357         unsigned long long msr;
2358 
2359         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
2360 
2361         fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
2362 
2363         fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
2364                 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2365                 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2366                 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2367                 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2368                 (msr & (1 << 15)) ? "" : "UN",
2369                 (unsigned int)msr & 0xF,
2370                 pkg_cstate_limit_strings[pkg_cstate_limit]);
2371 
2372 #define AUTOMATIC_CSTATE_CONVERSION             (1UL << 16)
2373         if (has_automatic_cstate_conversion) {
2374                 fprintf(outf, ", automatic c-state conversion=%s",
2375                         (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2376         }
2377 
2378         fprintf(outf, ")\n");
2379 
2380         return;
2381 }
2382 
2383 static void
2384 dump_config_tdp(void)
2385 {
2386         unsigned long long msr;
2387 
2388         get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
2389         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
2390         fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
2391 
2392         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
2393         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
2394         if (msr) {
2395                 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2396                 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2397                 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2398                 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
2399         }
2400         fprintf(outf, ")\n");
2401 
2402         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
2403         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
2404         if (msr) {
2405                 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2406                 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2407                 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2408                 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
2409         }
2410         fprintf(outf, ")\n");
2411 
2412         get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
2413         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
2414         if ((msr) & 0x3)
2415                 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2416         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2417         fprintf(outf, ")\n");
2418 
2419         get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
2420         fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
2421         fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
2422         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2423         fprintf(outf, ")\n");
2424 }
2425 
2426 unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2427 
2428 void print_irtl(void)
2429 {
2430         unsigned long long msr;
2431 
2432         get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2433         fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2434         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2435                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2436 
2437         get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2438         fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2439         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2440                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2441 
2442         get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2443         fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2444         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2445                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2446 
2447         if (!do_irtl_hsw)
2448                 return;
2449 
2450         get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2451         fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2452         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2453                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2454 
2455         get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2456         fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2457         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2458                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2459 
2460         get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2461         fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2462         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2463                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2464 
2465 }
2466 void free_fd_percpu(void)
2467 {
2468         int i;
2469 
2470         for (i = 0; i < topo.max_cpu_num + 1; ++i) {
2471                 if (fd_percpu[i] != 0)
2472                         close(fd_percpu[i]);
2473         }
2474 
2475         free(fd_percpu);
2476 }
2477 
2478 void free_all_buffers(void)
2479 {
2480         int i;
2481 
2482         CPU_FREE(cpu_present_set);
2483         cpu_present_set = NULL;
2484         cpu_present_setsize = 0;
2485 
2486         CPU_FREE(cpu_affinity_set);
2487         cpu_affinity_set = NULL;
2488         cpu_affinity_setsize = 0;
2489 
2490         free(thread_even);
2491         free(core_even);
2492         free(package_even);
2493 
2494         thread_even = NULL;
2495         core_even = NULL;
2496         package_even = NULL;
2497 
2498         free(thread_odd);
2499         free(core_odd);
2500         free(package_odd);
2501 
2502         thread_odd = NULL;
2503         core_odd = NULL;
2504         package_odd = NULL;
2505 
2506         free(output_buffer);
2507         output_buffer = NULL;
2508         outp = NULL;
2509 
2510         free_fd_percpu();
2511 
2512         free(irq_column_2_cpu);
2513         free(irqs_per_cpu);
2514 
2515         for (i = 0; i <= topo.max_cpu_num; ++i) {
2516                 if (cpus[i].put_ids)
2517                         CPU_FREE(cpus[i].put_ids);
2518         }
2519         free(cpus);
2520 }
2521 
2522 
2523 /*
2524  * Parse a file containing a single int.
2525  * Return 0 if file can not be opened
2526  * Exit if file can be opened, but can not be parsed
2527  */
2528 int parse_int_file(const char *fmt, ...)
2529 {
2530         va_list args;
2531         char path[PATH_MAX];
2532         FILE *filep;
2533         int value;
2534 
2535         va_start(args, fmt);
2536         vsnprintf(path, sizeof(path), fmt, args);
2537         va_end(args);
2538         filep = fopen(path, "r");
2539         if (!filep)
2540                 return 0;
2541         if (fscanf(filep, "%d", &value) != 1)
2542                 err(1, "%s: failed to parse number from file", path);
2543         fclose(filep);
2544         return value;
2545 }
2546 
2547 /*
2548  * cpu_is_first_core_in_package(cpu)
2549  * return 1 if given CPU is 1st core in package
2550  */
2551 int cpu_is_first_core_in_package(int cpu)
2552 {
2553         return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
2554 }
2555 
2556 int get_physical_package_id(int cpu)
2557 {
2558         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
2559 }
2560 
2561 int get_die_id(int cpu)
2562 {
2563         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2564 }
2565 
2566 int get_core_id(int cpu)
2567 {
2568         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
2569 }
2570 
2571 void set_node_data(void)
2572 {
2573         int pkg, node, lnode, cpu, cpux;
2574         int cpu_count;
2575 
2576         /* initialize logical_node_id */
2577         for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2578                 cpus[cpu].logical_node_id = -1;
2579 
2580         cpu_count = 0;
2581         for (pkg = 0; pkg < topo.num_packages; pkg++) {
2582                 lnode = 0;
2583                 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2584                         if (cpus[cpu].physical_package_id != pkg)
2585                                 continue;
2586                         /* find a cpu with an unset logical_node_id */
2587                         if (cpus[cpu].logical_node_id != -1)
2588                                 continue;
2589                         cpus[cpu].logical_node_id = lnode;
2590                         node = cpus[cpu].physical_node_id;
2591                         cpu_count++;
2592                         /*
2593                          * find all matching cpus on this pkg and set
2594                          * the logical_node_id
2595                          */
2596                         for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2597                                 if ((cpus[cpux].physical_package_id == pkg) &&
2598                                    (cpus[cpux].physical_node_id == node)) {
2599                                         cpus[cpux].logical_node_id = lnode;
2600                                         cpu_count++;
2601                                 }
2602                         }
2603                         lnode++;
2604                         if (lnode > topo.nodes_per_pkg)
2605                                 topo.nodes_per_pkg = lnode;
2606                 }
2607                 if (cpu_count >= topo.max_cpu_num)
2608                         break;
2609         }
2610 }
2611 
2612 int get_physical_node_id(struct cpu_topology *thiscpu)
2613 {
2614         char path[80];
2615         FILE *filep;
2616         int i;
2617         int cpu = thiscpu->logical_cpu_id;
2618 
2619         for (i = 0; i <= topo.max_cpu_num; i++) {
2620                 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2621                         cpu, i);
2622                 filep = fopen(path, "r");
2623                 if (!filep)
2624                         continue;
2625                 fclose(filep);
2626                 return i;
2627         }
2628         return -1;
2629 }
2630 
2631 int get_thread_siblings(struct cpu_topology *thiscpu)
2632 {
2633         char path[80], character;
2634         FILE *filep;
2635         unsigned long map;
2636         int so, shift, sib_core;
2637         int cpu = thiscpu->logical_cpu_id;
2638         int offset = topo.max_cpu_num + 1;
2639         size_t size;
2640         int thread_id = 0;
2641 
2642         thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
2643         if (thiscpu->thread_id < 0)
2644                 thiscpu->thread_id = thread_id++;
2645         if (!thiscpu->put_ids)
2646                 return -1;
2647 
2648         size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2649         CPU_ZERO_S(size, thiscpu->put_ids);
2650 
2651         sprintf(path,
2652                 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2653         filep = fopen_or_die(path, "r");
2654         do {
2655                 offset -= BITMASK_SIZE;
2656                 if (fscanf(filep, "%lx%c", &map, &character) != 2)
2657                         err(1, "%s: failed to parse file", path);
2658                 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2659                         if ((map >> shift) & 0x1) {
2660                                 so = shift + offset;
2661                                 sib_core = get_core_id(so);
2662                                 if (sib_core == thiscpu->physical_core_id) {
2663                                         CPU_SET_S(so, size, thiscpu->put_ids);
2664                                         if ((so != cpu) &&
2665                                             (cpus[so].thread_id < 0))
2666                                                 cpus[so].thread_id =
2667                                                                     thread_id++;
2668                                 }
2669                         }
2670                 }
2671         } while (!strncmp(&character, ",", 1));
2672         fclose(filep);
2673 
2674         return CPU_COUNT_S(size, thiscpu->put_ids);
2675 }
2676 
2677 /*
2678  * run func(thread, core, package) in topology order
2679  * skip non-present cpus
2680  */
2681 
2682 int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2683         struct pkg_data *, struct thread_data *, struct core_data *,
2684         struct pkg_data *), struct thread_data *thread_base,
2685         struct core_data *core_base, struct pkg_data *pkg_base,
2686         struct thread_data *thread_base2, struct core_data *core_base2,
2687         struct pkg_data *pkg_base2)
2688 {
2689         int retval, pkg_no, node_no, core_no, thread_no;
2690 
2691         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
2692                 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2693                         for (core_no = 0; core_no < topo.cores_per_node;
2694                              ++core_no) {
2695                                 for (thread_no = 0; thread_no <
2696                                         topo.threads_per_core; ++thread_no) {
2697                                         struct thread_data *t, *t2;
2698                                         struct core_data *c, *c2;
2699                                         struct pkg_data *p, *p2;
2700 
2701                                         t = GET_THREAD(thread_base, thread_no,
2702                                                        core_no, node_no,
2703                                                        pkg_no);
2704 
2705                                         if (cpu_is_not_present(t->cpu_id))
2706                                                 continue;
2707 
2708                                         t2 = GET_THREAD(thread_base2, thread_no,
2709                                                         core_no, node_no,
2710                                                         pkg_no);
2711 
2712                                         c = GET_CORE(core_base, core_no,
2713                                                      node_no, pkg_no);
2714                                         c2 = GET_CORE(core_base2, core_no,
2715                                                       node_no,
2716                                                       pkg_no);
2717 
2718                                         p = GET_PKG(pkg_base, pkg_no);
2719                                         p2 = GET_PKG(pkg_base2, pkg_no);
2720 
2721                                         retval = func(t, c, p, t2, c2, p2);
2722                                         if (retval)
2723                                                 return retval;
2724                                 }
2725                         }
2726                 }
2727         }
2728         return 0;
2729 }
2730 
2731 /*
2732  * run func(cpu) on every cpu in /proc/stat
2733  * return max_cpu number
2734  */
2735 int for_all_proc_cpus(int (func)(int))
2736 {
2737         FILE *fp;
2738         int cpu_num;
2739         int retval;
2740 
2741         fp = fopen_or_die(proc_stat, "r");
2742 
2743         retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
2744         if (retval != 0)
2745                 err(1, "%s: failed to parse format", proc_stat);
2746 
2747         while (1) {
2748                 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
2749                 if (retval != 1)
2750                         break;
2751 
2752                 retval = func(cpu_num);
2753                 if (retval) {
2754                         fclose(fp);
2755                         return(retval);
2756                 }
2757         }
2758         fclose(fp);
2759         return 0;
2760 }
2761 
2762 void re_initialize(void)
2763 {
2764         free_all_buffers();
2765         setup_all_buffers();
2766         printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
2767 }
2768 
2769 void set_max_cpu_num(void)
2770 {
2771         FILE *filep;
2772         unsigned long dummy;
2773 
2774         topo.max_cpu_num = 0;
2775         filep = fopen_or_die(
2776                         "/sys/devices/system/cpu/cpu0/topology/thread_siblings",
2777                         "r");
2778         while (fscanf(filep, "%lx,", &dummy) == 1)
2779                 topo.max_cpu_num += BITMASK_SIZE;
2780         fclose(filep);
2781         topo.max_cpu_num--; /* 0 based */
2782 }
2783 
2784 /*
2785  * count_cpus()
2786  * remember the last one seen, it will be the max
2787  */
2788 int count_cpus(int cpu)
2789 {
2790         topo.num_cpus++;
2791         return 0;
2792 }
2793 int mark_cpu_present(int cpu)
2794 {
2795         CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
2796         return 0;
2797 }
2798 
2799 int init_thread_id(int cpu)
2800 {
2801         cpus[cpu].thread_id = -1;
2802         return 0;
2803 }
2804 
2805 /*
2806  * snapshot_proc_interrupts()
2807  *
2808  * read and record summary of /proc/interrupts
2809  *
2810  * return 1 if config change requires a restart, else return 0
2811  */
2812 int snapshot_proc_interrupts(void)
2813 {
2814         static FILE *fp;
2815         int column, retval;
2816 
2817         if (fp == NULL)
2818                 fp = fopen_or_die("/proc/interrupts", "r");
2819         else
2820                 rewind(fp);
2821 
2822         /* read 1st line of /proc/interrupts to get cpu* name for each column */
2823         for (column = 0; column < topo.num_cpus; ++column) {
2824                 int cpu_number;
2825 
2826                 retval = fscanf(fp, " CPU%d", &cpu_number);
2827                 if (retval != 1)
2828                         break;
2829 
2830                 if (cpu_number > topo.max_cpu_num) {
2831                         warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
2832                         return 1;
2833                 }
2834 
2835                 irq_column_2_cpu[column] = cpu_number;
2836                 irqs_per_cpu[cpu_number] = 0;
2837         }
2838 
2839         /* read /proc/interrupt count lines and sum up irqs per cpu */
2840         while (1) {
2841                 int column;
2842                 char buf[64];
2843 
2844                 retval = fscanf(fp, " %s:", buf);       /* flush irq# "N:" */
2845                 if (retval != 1)
2846                         break;
2847 
2848                 /* read the count per cpu */
2849                 for (column = 0; column < topo.num_cpus; ++column) {
2850 
2851                         int cpu_number, irq_count;
2852 
2853                         retval = fscanf(fp, " %d", &irq_count);
2854                         if (retval != 1)
2855                                 break;
2856 
2857                         cpu_number = irq_column_2_cpu[column];
2858                         irqs_per_cpu[cpu_number] += irq_count;
2859 
2860                 }
2861 
2862                 while (getc(fp) != '\n')
2863                         ;       /* flush interrupt description */
2864 
2865         }
2866         return 0;
2867 }
2868 /*
2869  * snapshot_gfx_rc6_ms()
2870  *
2871  * record snapshot of
2872  * /sys/class/drm/card0/power/rc6_residency_ms
2873  *
2874  * return 1 if config change requires a restart, else return 0
2875  */
2876 int snapshot_gfx_rc6_ms(void)
2877 {
2878         FILE *fp;
2879         int retval;
2880 
2881         fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
2882 
2883         retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
2884         if (retval != 1)
2885                 err(1, "GFX rc6");
2886 
2887         fclose(fp);
2888 
2889         return 0;
2890 }
2891 /*
2892  * snapshot_gfx_mhz()
2893  *
2894  * record snapshot of
2895  * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
2896  *
2897  * return 1 if config change requires a restart, else return 0
2898  */
2899 int snapshot_gfx_mhz(void)
2900 {
2901         static FILE *fp;
2902         int retval;
2903 
2904         if (fp == NULL)
2905                 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
2906         else {
2907                 rewind(fp);
2908                 fflush(fp);
2909         }
2910 
2911         retval = fscanf(fp, "%d", &gfx_cur_mhz);
2912         if (retval != 1)
2913                 err(1, "GFX MHz");
2914 
2915         return 0;
2916 }
2917 
2918 /*
2919  * snapshot_cpu_lpi()
2920  *
2921  * record snapshot of
2922  * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
2923  */
2924 int snapshot_cpu_lpi_us(void)
2925 {
2926         FILE *fp;
2927         int retval;
2928 
2929         fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
2930 
2931         retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
2932         if (retval != 1) {
2933                 fprintf(stderr, "Disabling Low Power Idle CPU output\n");
2934                 BIC_NOT_PRESENT(BIC_CPU_LPI);
2935                 fclose(fp);
2936                 return -1;
2937         }
2938 
2939         fclose(fp);
2940 
2941         return 0;
2942 }
2943 /*
2944  * snapshot_sys_lpi()
2945  *
2946  * record snapshot of sys_lpi_file
2947  */
2948 int snapshot_sys_lpi_us(void)
2949 {
2950         FILE *fp;
2951         int retval;
2952 
2953         fp = fopen_or_die(sys_lpi_file, "r");
2954 
2955         retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
2956         if (retval != 1) {
2957                 fprintf(stderr, "Disabling Low Power Idle System output\n");
2958                 BIC_NOT_PRESENT(BIC_SYS_LPI);
2959                 fclose(fp);
2960                 return -1;
2961         }
2962         fclose(fp);
2963 
2964         return 0;
2965 }
2966 /*
2967  * snapshot /proc and /sys files
2968  *
2969  * return 1 if configuration restart needed, else return 0
2970  */
2971 int snapshot_proc_sysfs_files(void)
2972 {
2973         if (DO_BIC(BIC_IRQ))
2974                 if (snapshot_proc_interrupts())
2975                         return 1;
2976 
2977         if (DO_BIC(BIC_GFX_rc6))
2978                 snapshot_gfx_rc6_ms();
2979 
2980         if (DO_BIC(BIC_GFXMHz))
2981                 snapshot_gfx_mhz();
2982 
2983         if (DO_BIC(BIC_CPU_LPI))
2984                 snapshot_cpu_lpi_us();
2985 
2986         if (DO_BIC(BIC_SYS_LPI))
2987                 snapshot_sys_lpi_us();
2988 
2989         return 0;
2990 }
2991 
2992 int exit_requested;
2993 
2994 static void signal_handler (int signal)
2995 {
2996         switch (signal) {
2997         case SIGINT:
2998                 exit_requested = 1;
2999                 if (debug)
3000                         fprintf(stderr, " SIGINT\n");
3001                 break;
3002         case SIGUSR1:
3003                 if (debug > 1)
3004                         fprintf(stderr, "SIGUSR1\n");
3005                 break;
3006         }
3007 }
3008 
3009 void setup_signal_handler(void)
3010 {
3011         struct sigaction sa;
3012 
3013         memset(&sa, 0, sizeof(sa));
3014 
3015         sa.sa_handler = &signal_handler;
3016 
3017         if (sigaction(SIGINT, &sa, NULL) < 0)
3018                 err(1, "sigaction SIGINT");
3019         if (sigaction(SIGUSR1, &sa, NULL) < 0)
3020                 err(1, "sigaction SIGUSR1");
3021 }
3022 
3023 void do_sleep(void)
3024 {
3025         struct timeval tout;
3026         struct timespec rest;
3027         fd_set readfds;
3028         int retval;
3029 
3030         FD_ZERO(&readfds);
3031         FD_SET(0, &readfds);
3032 
3033         if (ignore_stdin) {
3034                 nanosleep(&interval_ts, NULL);
3035                 return;
3036         }
3037 
3038         tout = interval_tv;
3039         retval = select(1, &readfds, NULL, NULL, &tout);
3040 
3041         if (retval == 1) {
3042                 switch (getc(stdin)) {
3043                 case 'q':
3044                         exit_requested = 1;
3045                         break;
3046                 case EOF:
3047                         /*
3048                          * 'stdin' is a pipe closed on the other end. There
3049                          * won't be any further input.
3050                          */
3051                         ignore_stdin = 1;
3052                         /* Sleep the rest of the time */
3053                         rest.tv_sec = (tout.tv_sec + tout.tv_usec / 1000000);
3054                         rest.tv_nsec = (tout.tv_usec % 1000000) * 1000;
3055                         nanosleep(&rest, NULL);
3056                 }
3057         }
3058 }
3059 
3060 
3061 void turbostat_loop()
3062 {
3063         int retval;
3064         int restarted = 0;
3065         int done_iters = 0;
3066 
3067         setup_signal_handler();
3068 
3069 restart:
3070         restarted++;
3071 
3072         snapshot_proc_sysfs_files();
3073         retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3074         first_counter_read = 0;
3075         if (retval < -1) {
3076                 exit(retval);
3077         } else if (retval == -1) {
3078                 if (restarted > 1) {
3079                         exit(retval);
3080                 }
3081                 re_initialize();
3082                 goto restart;
3083         }
3084         restarted = 0;
3085         done_iters = 0;
3086         gettimeofday(&tv_even, (struct timezone *)NULL);
3087 
3088         while (1) {
3089                 if (for_all_proc_cpus(cpu_is_not_present)) {
3090                         re_initialize();
3091                         goto restart;
3092                 }
3093                 do_sleep();
3094                 if (snapshot_proc_sysfs_files())
3095                         goto restart;
3096                 retval = for_all_cpus(get_counters, ODD_COUNTERS);
3097                 if (retval < -1) {
3098                         exit(retval);
3099                 } else if (retval == -1) {
3100                         re_initialize();
3101                         goto restart;
3102                 }
3103                 gettimeofday(&tv_odd, (struct timezone *)NULL);
3104                 timersub(&tv_odd, &tv_even, &tv_delta);
3105                 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3106                         re_initialize();
3107                         goto restart;
3108                 }
3109                 compute_average(EVEN_COUNTERS);
3110                 format_all_counters(EVEN_COUNTERS);
3111                 flush_output_stdout();
3112                 if (exit_requested)
3113                         break;
3114                 if (num_iterations && ++done_iters >= num_iterations)
3115                         break;
3116                 do_sleep();
3117                 if (snapshot_proc_sysfs_files())
3118                         goto restart;
3119                 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3120                 if (retval < -1) {
3121                         exit(retval);
3122                 } else if (retval == -1) {
3123                         re_initialize();
3124                         goto restart;
3125                 }
3126                 gettimeofday(&tv_even, (struct timezone *)NULL);
3127                 timersub(&tv_even, &tv_odd, &tv_delta);
3128                 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3129                         re_initialize();
3130                         goto restart;
3131                 }
3132                 compute_average(ODD_COUNTERS);
3133                 format_all_counters(ODD_COUNTERS);
3134                 flush_output_stdout();
3135                 if (exit_requested)
3136                         break;
3137                 if (num_iterations && ++done_iters >= num_iterations)
3138                         break;
3139         }
3140 }
3141 
3142 void check_dev_msr()
3143 {
3144         struct stat sb;
3145         char pathname[32];
3146 
3147         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3148         if (stat(pathname, &sb))
3149                 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3150                         err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
3151 }
3152 
3153 /*
3154  * check for CAP_SYS_RAWIO
3155  * return 0 on success
3156  * return 1 on fail
3157  */
3158 int check_for_cap_sys_rawio(void)
3159 {
3160         cap_t caps;
3161         cap_flag_value_t cap_flag_value;
3162 
3163         caps = cap_get_proc();
3164         if (caps == NULL)
3165                 err(-6, "cap_get_proc\n");
3166 
3167         if (cap_get_flag(caps, CAP_SYS_RAWIO, CAP_EFFECTIVE, &cap_flag_value))
3168                 err(-6, "cap_get\n");
3169 
3170         if (cap_flag_value != CAP_SET) {
3171                 warnx("capget(CAP_SYS_RAWIO) failed,"
3172                         " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3173                 return 1;
3174         }
3175 
3176         if (cap_free(caps) == -1)
3177                 err(-6, "cap_free\n");
3178 
3179         return 0;
3180 }
3181 void check_permissions(void)
3182 {
3183         int do_exit = 0;
3184         char pathname[32];
3185 
3186         /* check for CAP_SYS_RAWIO */
3187         do_exit += check_for_cap_sys_rawio();
3188 
3189         /* test file permissions */
3190         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3191         if (euidaccess(pathname, R_OK)) {
3192                 do_exit++;
3193                 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3194         }
3195 
3196         /* if all else fails, thell them to be root */
3197         if (do_exit)
3198                 if (getuid() != 0)
3199                         warnx("... or simply run as root");
3200 
3201         if (do_exit)
3202                 exit(-6);
3203 }
3204 
3205 /*
3206  * NHM adds support for additional MSRs:
3207  *
3208  * MSR_SMI_COUNT                   0x00000034
3209  *
3210  * MSR_PLATFORM_INFO               0x000000ce
3211  * MSR_PKG_CST_CONFIG_CONTROL     0x000000e2
3212  *
3213  * MSR_MISC_PWR_MGMT               0x000001aa
3214  *
3215  * MSR_PKG_C3_RESIDENCY            0x000003f8
3216  * MSR_PKG_C6_RESIDENCY            0x000003f9
3217  * MSR_CORE_C3_RESIDENCY           0x000003fc
3218  * MSR_CORE_C6_RESIDENCY           0x000003fd
3219  *
3220  * Side effect:
3221  * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
3222  * sets has_misc_feature_control
3223  */
3224 int probe_nhm_msrs(unsigned int family, unsigned int model)
3225 {
3226         unsigned long long msr;
3227         unsigned int base_ratio;
3228         int *pkg_cstate_limits;
3229 
3230         if (!genuine_intel)
3231                 return 0;
3232 
3233         if (family != 6)
3234                 return 0;
3235 
3236         bclk = discover_bclk(family, model);
3237 
3238         switch (model) {
3239         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
3240         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3241                 pkg_cstate_limits = nhm_pkg_cstate_limits;
3242                 break;
3243         case INTEL_FAM6_SANDYBRIDGE:    /* SNB */
3244         case INTEL_FAM6_SANDYBRIDGE_X:  /* SNB Xeon */
3245         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3246         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3247                 pkg_cstate_limits = snb_pkg_cstate_limits;
3248                 has_misc_feature_control = 1;
3249                 break;
3250         case INTEL_FAM6_HASWELL:        /* HSW */
3251         case INTEL_FAM6_HASWELL_G:      /* HSW */
3252         case INTEL_FAM6_HASWELL_X:      /* HSX */
3253         case INTEL_FAM6_HASWELL_L:      /* HSW */
3254         case INTEL_FAM6_BROADWELL:      /* BDW */
3255         case INTEL_FAM6_BROADWELL_G:    /* BDW */
3256         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3257         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
3258         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
3259                 pkg_cstate_limits = hsw_pkg_cstate_limits;
3260                 has_misc_feature_control = 1;
3261                 break;
3262         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3263                 pkg_cstate_limits = skx_pkg_cstate_limits;
3264                 has_misc_feature_control = 1;
3265                 break;
3266         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
3267                 no_MSR_MISC_PWR_MGMT = 1;
3268         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
3269                 pkg_cstate_limits = slv_pkg_cstate_limits;
3270                 break;
3271         case INTEL_FAM6_ATOM_AIRMONT:   /* AMT */
3272                 pkg_cstate_limits = amt_pkg_cstate_limits;
3273                 no_MSR_MISC_PWR_MGMT = 1;
3274                 break;
3275         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI */
3276                 pkg_cstate_limits = phi_pkg_cstate_limits;
3277                 break;
3278         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
3279         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3280         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
3281                 pkg_cstate_limits = glm_pkg_cstate_limits;
3282                 break;
3283         default:
3284                 return 0;
3285         }
3286         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
3287         pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
3288 
3289         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
3290         base_ratio = (msr >> 8) & 0xFF;
3291 
3292         base_hz = base_ratio * bclk * 1000000;
3293         has_base_hz = 1;
3294         return 1;
3295 }
3296 /*
3297  * SLV client has support for unique MSRs:
3298  *
3299  * MSR_CC6_DEMOTION_POLICY_CONFIG
3300  * MSR_MC6_DEMOTION_POLICY_CONFIG
3301  */
3302 
3303 int has_slv_msrs(unsigned int family, unsigned int model)
3304 {
3305         if (!genuine_intel)
3306                 return 0;
3307 
3308         switch (model) {
3309         case INTEL_FAM6_ATOM_SILVERMONT:
3310         case INTEL_FAM6_ATOM_SILVERMONT_MID:
3311         case INTEL_FAM6_ATOM_AIRMONT_MID:
3312                 return 1;
3313         }
3314         return 0;
3315 }
3316 int is_dnv(unsigned int family, unsigned int model)
3317 {
3318 
3319         if (!genuine_intel)
3320                 return 0;
3321 
3322         switch (model) {
3323         case INTEL_FAM6_ATOM_GOLDMONT_D:
3324                 return 1;
3325         }
3326         return 0;
3327 }
3328 int is_bdx(unsigned int family, unsigned int model)
3329 {
3330 
3331         if (!genuine_intel)
3332                 return 0;
3333 
3334         switch (model) {
3335         case INTEL_FAM6_BROADWELL_X:
3336                 return 1;
3337         }
3338         return 0;
3339 }
3340 int is_skx(unsigned int family, unsigned int model)
3341 {
3342 
3343         if (!genuine_intel)
3344                 return 0;
3345 
3346         switch (model) {
3347         case INTEL_FAM6_SKYLAKE_X:
3348                 return 1;
3349         }
3350         return 0;
3351 }
3352 
3353 int has_turbo_ratio_limit(unsigned int family, unsigned int model)
3354 {
3355         if (has_slv_msrs(family, model))
3356                 return 0;
3357 
3358         switch (model) {
3359         /* Nehalem compatible, but do not include turbo-ratio limit support */
3360         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3361         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI - Knights Landing (different MSR definition) */
3362                 return 0;
3363         default:
3364                 return 1;
3365         }
3366 }
3367 int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3368 {
3369         if (has_slv_msrs(family, model))
3370                 return 1;
3371 
3372         return 0;
3373 }
3374 int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3375 {
3376         if (!genuine_intel)
3377                 return 0;
3378 
3379         if (family != 6)
3380                 return 0;
3381 
3382         switch (model) {
3383         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3384         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3385                 return 1;
3386         default:
3387                 return 0;
3388         }
3389 }
3390 int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3391 {
3392         if (!genuine_intel)
3393                 return 0;
3394 
3395         if (family != 6)
3396                 return 0;
3397 
3398         switch (model) {
3399         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3400                 return 1;
3401         default:
3402                 return 0;
3403         }
3404 }
3405 
3406 int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3407 {
3408         if (!genuine_intel)
3409                 return 0;
3410 
3411         if (family != 6)
3412                 return 0;
3413 
3414         switch (model) {
3415         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3416                 return 1;
3417         default:
3418                 return 0;
3419         }
3420 }
3421 int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3422 {
3423         if (!genuine_intel)
3424                 return 0;
3425 
3426         if (family != 6)
3427                 return 0;
3428 
3429         switch (model) {
3430         case INTEL_FAM6_ATOM_GOLDMONT:
3431         case INTEL_FAM6_SKYLAKE_X:
3432                 return 1;
3433         default:
3434                 return 0;
3435         }
3436 }
3437 int has_config_tdp(unsigned int family, unsigned int model)
3438 {
3439         if (!genuine_intel)
3440                 return 0;
3441 
3442         if (family != 6)
3443                 return 0;
3444 
3445         switch (model) {
3446         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3447         case INTEL_FAM6_HASWELL:        /* HSW */
3448         case INTEL_FAM6_HASWELL_X:      /* HSX */
3449         case INTEL_FAM6_HASWELL_L:      /* HSW */
3450         case INTEL_FAM6_HASWELL_G:      /* HSW */
3451         case INTEL_FAM6_BROADWELL:      /* BDW */
3452         case INTEL_FAM6_BROADWELL_G:    /* BDW */
3453         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3454         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
3455         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
3456         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3457 
3458         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3459                 return 1;
3460         default:
3461                 return 0;
3462         }
3463 }
3464 
3465 static void
3466 dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
3467 {
3468         if (!do_nhm_platform_info)
3469                 return;
3470 
3471         dump_nhm_platform_info();
3472 
3473         if (has_hsw_turbo_ratio_limit(family, model))
3474                 dump_hsw_turbo_ratio_limits();
3475 
3476         if (has_ivt_turbo_ratio_limit(family, model))
3477                 dump_ivt_turbo_ratio_limits();
3478 
3479         if (has_turbo_ratio_limit(family, model))
3480                 dump_turbo_ratio_limits(family, model);
3481 
3482         if (has_atom_turbo_ratio_limit(family, model))
3483                 dump_atom_turbo_ratio_limits();
3484 
3485         if (has_knl_turbo_ratio_limit(family, model))
3486                 dump_knl_turbo_ratio_limits();
3487 
3488         if (has_config_tdp(family, model))
3489                 dump_config_tdp();
3490 
3491         dump_nhm_cst_cfg();
3492 }
3493 
3494 static void
3495 dump_sysfs_cstate_config(void)
3496 {
3497         char path[64];
3498         char name_buf[16];
3499         char desc[64];
3500         FILE *input;
3501         int state;
3502         char *sp;
3503 
3504         if (!DO_BIC(BIC_sysfs))
3505                 return;
3506 
3507         for (state = 0; state < 10; ++state) {
3508 
3509                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3510                         base_cpu, state);
3511                 input = fopen(path, "r");
3512                 if (input == NULL)
3513                         continue;
3514                 if (!fgets(name_buf, sizeof(name_buf), input))
3515                         err(1, "%s: failed to read file", path);
3516 
3517                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3518                 sp = strchr(name_buf, '-');
3519                 if (!sp)
3520                         sp = strchrnul(name_buf, '\n');
3521                 *sp = '\0';
3522                 fclose(input);
3523 
3524                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3525                         base_cpu, state);
3526                 input = fopen(path, "r");
3527                 if (input == NULL)
3528                         continue;
3529                 if (!fgets(desc, sizeof(desc), input))
3530                         err(1, "%s: failed to read file", path);
3531 
3532                 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3533                 fclose(input);
3534         }
3535 }
3536 static void
3537 dump_sysfs_pstate_config(void)
3538 {
3539         char path[64];
3540         char driver_buf[64];
3541         char governor_buf[64];
3542         FILE *input;
3543         int turbo;
3544 
3545         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3546                         base_cpu);
3547         input = fopen(path, "r");
3548         if (input == NULL) {
3549                 fprintf(outf, "NSFOD %s\n", path);
3550                 return;
3551         }
3552         if (!fgets(driver_buf, sizeof(driver_buf), input))
3553                 err(1, "%s: failed to read file", path);
3554         fclose(input);
3555 
3556         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3557                         base_cpu);
3558         input = fopen(path, "r");
3559         if (input == NULL) {
3560                 fprintf(outf, "NSFOD %s\n", path);
3561                 return;
3562         }
3563         if (!fgets(governor_buf, sizeof(governor_buf), input))
3564                 err(1, "%s: failed to read file", path);
3565         fclose(input);
3566 
3567         fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3568         fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3569 
3570         sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3571         input = fopen(path, "r");
3572         if (input != NULL) {
3573                 if (fscanf(input, "%d", &turbo) != 1)
3574                         err(1, "%s: failed to parse number from file", path);
3575                 fprintf(outf, "cpufreq boost: %d\n", turbo);
3576                 fclose(input);
3577         }
3578 
3579         sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3580         input = fopen(path, "r");
3581         if (input != NULL) {
3582                 if (fscanf(input, "%d", &turbo) != 1)
3583                         err(1, "%s: failed to parse number from file", path);
3584                 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3585                 fclose(input);
3586         }
3587 }
3588 
3589 
3590 /*
3591  * print_epb()
3592  * Decode the ENERGY_PERF_BIAS MSR
3593  */
3594 int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3595 {
3596         unsigned long long msr;
3597         char *epb_string;
3598         int cpu;
3599 
3600         if (!has_epb)
3601                 return 0;
3602 
3603         cpu = t->cpu_id;
3604 
3605         /* EPB is per-package */
3606         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3607                 return 0;
3608 
3609         if (cpu_migrate(cpu)) {
3610                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3611                 return -1;
3612         }
3613 
3614         if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
3615                 return 0;
3616 
3617         switch (msr & 0xF) {
3618         case ENERGY_PERF_BIAS_PERFORMANCE:
3619                 epb_string = "performance";
3620                 break;
3621         case ENERGY_PERF_BIAS_NORMAL:
3622                 epb_string = "balanced";
3623                 break;
3624         case ENERGY_PERF_BIAS_POWERSAVE:
3625                 epb_string = "powersave";
3626                 break;
3627         default:
3628                 epb_string = "custom";
3629                 break;
3630         }
3631         fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
3632 
3633         return 0;
3634 }
3635 /*
3636  * print_hwp()
3637  * Decode the MSR_HWP_CAPABILITIES
3638  */
3639 int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3640 {
3641         unsigned long long msr;
3642         int cpu;
3643 
3644         if (!has_hwp)
3645                 return 0;
3646 
3647         cpu = t->cpu_id;
3648 
3649         /* MSR_HWP_CAPABILITIES is per-package */
3650         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3651                 return 0;
3652 
3653         if (cpu_migrate(cpu)) {
3654                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3655                 return -1;
3656         }
3657 
3658         if (get_msr(cpu, MSR_PM_ENABLE, &msr))
3659                 return 0;
3660 
3661         fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
3662                 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
3663 
3664         /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
3665         if ((msr & (1 << 0)) == 0)
3666                 return 0;
3667 
3668         if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
3669                 return 0;
3670 
3671         fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
3672                         "(high %d guar %d eff %d low %d)\n",
3673                         cpu, msr,
3674                         (unsigned int)HWP_HIGHEST_PERF(msr),
3675                         (unsigned int)HWP_GUARANTEED_PERF(msr),
3676                         (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
3677                         (unsigned int)HWP_LOWEST_PERF(msr));
3678 
3679         if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
3680                 return 0;
3681 
3682         fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
3683                         "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
3684                         cpu, msr,
3685                         (unsigned int)(((msr) >> 0) & 0xff),
3686                         (unsigned int)(((msr) >> 8) & 0xff),
3687                         (unsigned int)(((msr) >> 16) & 0xff),
3688                         (unsigned int)(((msr) >> 24) & 0xff),
3689                         (unsigned int)(((msr) >> 32) & 0xff3),
3690                         (unsigned int)(((msr) >> 42) & 0x1));
3691 
3692         if (has_hwp_pkg) {
3693                 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
3694                         return 0;
3695 
3696                 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
3697                         "(min %d max %d des %d epp 0x%x window 0x%x)\n",
3698                         cpu, msr,
3699                         (unsigned int)(((msr) >> 0) & 0xff),
3700                         (unsigned int)(((msr) >> 8) & 0xff),
3701                         (unsigned int)(((msr) >> 16) & 0xff),
3702                         (unsigned int)(((msr) >> 24) & 0xff),
3703                         (unsigned int)(((msr) >> 32) & 0xff3));
3704         }
3705         if (has_hwp_notify) {
3706                 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
3707                         return 0;
3708 
3709                 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
3710                         "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
3711                         cpu, msr,
3712                         ((msr) & 0x1) ? "EN" : "Dis",
3713                         ((msr) & 0x2) ? "EN" : "Dis");
3714         }
3715         if (get_msr(cpu, MSR_HWP_STATUS, &msr))
3716                 return 0;
3717 
3718         fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
3719                         "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
3720                         cpu, msr,
3721                         ((msr) & 0x1) ? "" : "No-",
3722                         ((msr) & 0x2) ? "" : "No-");
3723 
3724         return 0;
3725 }
3726 
3727 /*
3728  * print_perf_limit()
3729  */
3730 int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3731 {
3732         unsigned long long msr;
3733         int cpu;
3734 
3735         cpu = t->cpu_id;
3736 
3737         /* per-package */
3738         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3739                 return 0;
3740 
3741         if (cpu_migrate(cpu)) {
3742                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3743                 return -1;
3744         }
3745 
3746         if (do_core_perf_limit_reasons) {
3747                 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
3748                 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3749                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
3750                         (msr & 1 << 15) ? "bit15, " : "",
3751                         (msr & 1 << 14) ? "bit14, " : "",
3752                         (msr & 1 << 13) ? "Transitions, " : "",
3753                         (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
3754                         (msr & 1 << 11) ? "PkgPwrL2, " : "",
3755                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
3756                         (msr & 1 << 9) ? "CorePwr, " : "",
3757                         (msr & 1 << 8) ? "Amps, " : "",
3758                         (msr & 1 << 6) ? "VR-Therm, " : "",
3759                         (msr & 1 << 5) ? "Auto-HWP, " : "",
3760                         (msr & 1 << 4) ? "Graphics, " : "",
3761                         (msr & 1 << 2) ? "bit2, " : "",
3762                         (msr & 1 << 1) ? "ThermStatus, " : "",
3763                         (msr & 1 << 0) ? "PROCHOT, " : "");
3764                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
3765                         (msr & 1 << 31) ? "bit31, " : "",
3766                         (msr & 1 << 30) ? "bit30, " : "",
3767                         (msr & 1 << 29) ? "Transitions, " : "",
3768                         (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
3769                         (msr & 1 << 27) ? "PkgPwrL2, " : "",
3770                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
3771                         (msr & 1 << 25) ? "CorePwr, " : "",
3772                         (msr & 1 << 24) ? "Amps, " : "",
3773                         (msr & 1 << 22) ? "VR-Therm, " : "",
3774                         (msr & 1 << 21) ? "Auto-HWP, " : "",
3775                         (msr & 1 << 20) ? "Graphics, " : "",
3776                         (msr & 1 << 18) ? "bit18, " : "",
3777                         (msr & 1 << 17) ? "ThermStatus, " : "",
3778                         (msr & 1 << 16) ? "PROCHOT, " : "");
3779 
3780         }
3781         if (do_gfx_perf_limit_reasons) {
3782                 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
3783                 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3784                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
3785                         (msr & 1 << 0) ? "PROCHOT, " : "",
3786                         (msr & 1 << 1) ? "ThermStatus, " : "",
3787                         (msr & 1 << 4) ? "Graphics, " : "",
3788                         (msr & 1 << 6) ? "VR-Therm, " : "",
3789                         (msr & 1 << 8) ? "Amps, " : "",
3790                         (msr & 1 << 9) ? "GFXPwr, " : "",
3791                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
3792                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
3793                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
3794                         (msr & 1 << 16) ? "PROCHOT, " : "",
3795                         (msr & 1 << 17) ? "ThermStatus, " : "",
3796                         (msr & 1 << 20) ? "Graphics, " : "",
3797                         (msr & 1 << 22) ? "VR-Therm, " : "",
3798                         (msr & 1 << 24) ? "Amps, " : "",
3799                         (msr & 1 << 25) ? "GFXPwr, " : "",
3800                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
3801                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
3802         }
3803         if (do_ring_perf_limit_reasons) {
3804                 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
3805                 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3806                 fprintf(outf, " (Active: %s%s%s%s%s%s)",
3807                         (msr & 1 << 0) ? "PROCHOT, " : "",
3808                         (msr & 1 << 1) ? "ThermStatus, " : "",
3809                         (msr & 1 << 6) ? "VR-Therm, " : "",
3810                         (msr & 1 << 8) ? "Amps, " : "",
3811                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
3812                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
3813                 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
3814                         (msr & 1 << 16) ? "PROCHOT, " : "",
3815                         (msr & 1 << 17) ? "ThermStatus, " : "",
3816                         (msr & 1 << 22) ? "VR-Therm, " : "",
3817                         (msr & 1 << 24) ? "Amps, " : "",
3818                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
3819                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
3820         }
3821         return 0;
3822 }
3823 
3824 #define RAPL_POWER_GRANULARITY  0x7FFF  /* 15 bit power granularity */
3825 #define RAPL_TIME_GRANULARITY   0x3F /* 6 bit time granularity */
3826 
3827 double get_tdp_intel(unsigned int model)
3828 {
3829         unsigned long long msr;
3830 
3831         if (do_rapl & RAPL_PKG_POWER_INFO)
3832                 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
3833                         return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
3834 
3835         switch (model) {
3836         case INTEL_FAM6_ATOM_SILVERMONT:
3837         case INTEL_FAM6_ATOM_SILVERMONT_D:
3838                 return 30.0;
3839         default:
3840                 return 135.0;
3841         }
3842 }
3843 
3844 double get_tdp_amd(unsigned int family)
3845 {
3846         switch (family) {
3847         case 0x17:
3848         case 0x18:
3849         default:
3850                 /* This is the max stock TDP of HEDT/Server Fam17h chips */
3851                 return 250.0;
3852         }
3853 }
3854 
3855 /*
3856  * rapl_dram_energy_units_probe()
3857  * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
3858  */
3859 static double
3860 rapl_dram_energy_units_probe(int  model, double rapl_energy_units)
3861 {
3862         /* only called for genuine_intel, family 6 */
3863 
3864         switch (model) {
3865         case INTEL_FAM6_HASWELL_X:      /* HSX */
3866         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3867         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
3868                 return (rapl_dram_energy_units = 15.3 / 1000000);
3869         default:
3870                 return (rapl_energy_units);
3871         }
3872 }
3873 
3874 void rapl_probe_intel(unsigned int family, unsigned int model)
3875 {
3876         unsigned long long msr;
3877         unsigned int time_unit;
3878         double tdp;
3879 
3880         if (family != 6)
3881                 return;
3882 
3883         switch (model) {
3884         case INTEL_FAM6_SANDYBRIDGE:
3885         case INTEL_FAM6_IVYBRIDGE:
3886         case INTEL_FAM6_HASWELL:        /* HSW */
3887         case INTEL_FAM6_HASWELL_L:      /* HSW */
3888         case INTEL_FAM6_HASWELL_G:      /* HSW */
3889         case INTEL_FAM6_BROADWELL:      /* BDW */
3890         case INTEL_FAM6_BROADWELL_G:    /* BDW */
3891                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
3892                 if (rapl_joules) {
3893                         BIC_PRESENT(BIC_Pkg_J);
3894                         BIC_PRESENT(BIC_Cor_J);
3895                         BIC_PRESENT(BIC_GFX_J);
3896                 } else {
3897                         BIC_PRESENT(BIC_PkgWatt);
3898                         BIC_PRESENT(BIC_CorWatt);
3899                         BIC_PRESENT(BIC_GFXWatt);
3900                 }
3901                 break;
3902         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
3903         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3904                 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
3905                 if (rapl_joules)
3906                         BIC_PRESENT(BIC_Pkg_J);
3907                 else
3908                         BIC_PRESENT(BIC_PkgWatt);
3909                 break;
3910         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
3911         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
3912                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
3913                 BIC_PRESENT(BIC_PKG__);
3914                 BIC_PRESENT(BIC_RAM__);
3915                 if (rapl_joules) {
3916                         BIC_PRESENT(BIC_Pkg_J);
3917                         BIC_PRESENT(BIC_Cor_J);
3918                         BIC_PRESENT(BIC_RAM_J);
3919                         BIC_PRESENT(BIC_GFX_J);
3920                 } else {
3921                         BIC_PRESENT(BIC_PkgWatt);
3922                         BIC_PRESENT(BIC_CorWatt);
3923                         BIC_PRESENT(BIC_RAMWatt);
3924                         BIC_PRESENT(BIC_GFXWatt);
3925                 }
3926                 break;
3927         case INTEL_FAM6_HASWELL_X:      /* HSX */
3928         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3929         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3930         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
3931                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
3932                 BIC_PRESENT(BIC_PKG__);
3933                 BIC_PRESENT(BIC_RAM__);
3934                 if (rapl_joules) {
3935                         BIC_PRESENT(BIC_Pkg_J);
3936                         BIC_PRESENT(BIC_RAM_J);
3937                 } else {
3938                         BIC_PRESENT(BIC_PkgWatt);
3939                         BIC_PRESENT(BIC_RAMWatt);
3940                 }
3941                 break;
3942         case INTEL_FAM6_SANDYBRIDGE_X:
3943         case INTEL_FAM6_IVYBRIDGE_X:
3944                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
3945                 BIC_PRESENT(BIC_PKG__);
3946                 BIC_PRESENT(BIC_RAM__);
3947                 if (rapl_joules) {
3948                         BIC_PRESENT(BIC_Pkg_J);
3949                         BIC_PRESENT(BIC_Cor_J);
3950                         BIC_PRESENT(BIC_RAM_J);
3951                 } else {
3952                         BIC_PRESENT(BIC_PkgWatt);
3953                         BIC_PRESENT(BIC_CorWatt);
3954                         BIC_PRESENT(BIC_RAMWatt);
3955                 }
3956                 break;
3957         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
3958         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
3959                 do_rapl = RAPL_PKG | RAPL_CORES;
3960                 if (rapl_joules) {
3961                         BIC_PRESENT(BIC_Pkg_J);
3962                         BIC_PRESENT(BIC_Cor_J);
3963                 } else {
3964                         BIC_PRESENT(BIC_PkgWatt);
3965                         BIC_PRESENT(BIC_CorWatt);
3966                 }
3967                 break;
3968         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
3969                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
3970                 BIC_PRESENT(BIC_PKG__);
3971                 BIC_PRESENT(BIC_RAM__);
3972                 if (rapl_joules) {
3973                         BIC_PRESENT(BIC_Pkg_J);
3974                         BIC_PRESENT(BIC_Cor_J);
3975                         BIC_PRESENT(BIC_RAM_J);
3976                 } else {
3977                         BIC_PRESENT(BIC_PkgWatt);
3978                         BIC_PRESENT(BIC_CorWatt);
3979                         BIC_PRESENT(BIC_RAMWatt);
3980                 }
3981                 break;
3982         default:
3983                 return;
3984         }
3985 
3986         /* units on package 0, verify later other packages match */
3987         if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
3988                 return;
3989 
3990         rapl_power_units = 1.0 / (1 << (msr & 0xF));
3991         if (model == INTEL_FAM6_ATOM_SILVERMONT)
3992                 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
3993         else
3994                 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
3995 
3996         rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
3997 
3998         time_unit = msr >> 16 & 0xF;
3999         if (time_unit == 0)
4000                 time_unit = 0xA;
4001 
4002         rapl_time_units = 1.0 / (1 << (time_unit));
4003 
4004         tdp = get_tdp_intel(model);
4005 
4006         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4007         if (!quiet)
4008                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4009 }
4010 
4011 void rapl_probe_amd(unsigned int family, unsigned int model)
4012 {
4013         unsigned long long msr;
4014         unsigned int eax, ebx, ecx, edx;
4015         unsigned int has_rapl = 0;
4016         double tdp;
4017 
4018         if (max_extended_level >= 0x80000007) {
4019                 __cpuid(0x80000007, eax, ebx, ecx, edx);
4020                 /* RAPL (Fam 17h) */
4021                 has_rapl = edx & (1 << 14);
4022         }
4023 
4024         if (!has_rapl)
4025                 return;
4026 
4027         switch (family) {
4028         case 0x17: /* Zen, Zen+ */
4029         case 0x18: /* Hygon Dhyana */
4030                 do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
4031                 if (rapl_joules) {
4032                         BIC_PRESENT(BIC_Pkg_J);
4033                         BIC_PRESENT(BIC_Cor_J);
4034                 } else {
4035                         BIC_PRESENT(BIC_PkgWatt);
4036                         BIC_PRESENT(BIC_CorWatt);
4037                 }
4038                 break;
4039         default:
4040                 return;
4041         }
4042 
4043         if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
4044                 return;
4045 
4046         rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
4047         rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
4048         rapl_power_units = ldexp(1.0, -(msr & 0xf));
4049 
4050         tdp = get_tdp_amd(family);
4051 
4052         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4053         if (!quiet)
4054                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4055 }
4056 
4057 /*
4058  * rapl_probe()
4059  *
4060  * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4061  */
4062 void rapl_probe(unsigned int family, unsigned int model)
4063 {
4064         if (genuine_intel)
4065                 rapl_probe_intel(family, model);
4066         if (authentic_amd || hygon_genuine)
4067                 rapl_probe_amd(family, model);
4068 }
4069 
4070 void perf_limit_reasons_probe(unsigned int family, unsigned int model)
4071 {
4072         if (!genuine_intel)
4073                 return;
4074 
4075         if (family != 6)
4076                 return;
4077 
4078         switch (model) {
4079         case INTEL_FAM6_HASWELL:        /* HSW */
4080         case INTEL_FAM6_HASWELL_L:      /* HSW */
4081         case INTEL_FAM6_HASWELL_G:      /* HSW */
4082                 do_gfx_perf_limit_reasons = 1;
4083         case INTEL_FAM6_HASWELL_X:      /* HSX */
4084                 do_core_perf_limit_reasons = 1;
4085                 do_ring_perf_limit_reasons = 1;
4086         default:
4087                 return;
4088         }
4089 }
4090 
4091 void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4092 {
4093         if (is_skx(family, model) || is_bdx(family, model))
4094                 has_automatic_cstate_conversion = 1;
4095 }
4096 
4097 int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4098 {
4099         unsigned long long msr;
4100         unsigned int dts, dts2;
4101         int cpu;
4102 
4103         if (!(do_dts || do_ptm))
4104                 return 0;
4105 
4106         cpu = t->cpu_id;
4107 
4108         /* DTS is per-core, no need to print for each thread */
4109         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
4110                 return 0;
4111 
4112         if (cpu_migrate(cpu)) {
4113                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4114                 return -1;
4115         }
4116 
4117         if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4118                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4119                         return 0;
4120 
4121                 dts = (msr >> 16) & 0x7F;
4122                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
4123                         cpu, msr, tcc_activation_temp - dts);
4124 
4125                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4126                         return 0;
4127 
4128                 dts = (msr >> 16) & 0x7F;
4129                 dts2 = (msr >> 8) & 0x7F;
4130                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4131                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4132         }
4133 
4134 
4135         if (do_dts && debug) {
4136                 unsigned int resolution;
4137 
4138                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4139                         return 0;
4140 
4141                 dts = (msr >> 16) & 0x7F;
4142                 resolution = (msr >> 27) & 0xF;
4143                 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
4144                         cpu, msr, tcc_activation_temp - dts, resolution);
4145 
4146                 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4147                         return 0;
4148 
4149                 dts = (msr >> 16) & 0x7F;
4150                 dts2 = (msr >> 8) & 0x7F;
4151                 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4152                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4153         }
4154 
4155         return 0;
4156 }
4157 
4158 void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4159 {
4160         fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
4161                 cpu, label,
4162                 ((msr >> 15) & 1) ? "EN" : "DIS",
4163                 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4164                 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4165                 (((msr >> 16) & 1) ? "EN" : "DIS"));
4166 
4167         return;
4168 }
4169 
4170 int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4171 {
4172         unsigned long long msr;
4173         const char *msr_name;
4174         int cpu;
4175 
4176         if (!do_rapl)
4177                 return 0;
4178 
4179         /* RAPL counters are per package, so print only for 1st thread/package */
4180         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4181                 return 0;
4182 
4183         cpu = t->cpu_id;
4184         if (cpu_migrate(cpu)) {
4185                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4186                 return -1;
4187         }
4188 
4189         if (do_rapl & RAPL_AMD_F17H) {
4190                 msr_name = "MSR_RAPL_PWR_UNIT";
4191                 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4192                         return -1;
4193         } else {
4194                 msr_name = "MSR_RAPL_POWER_UNIT";
4195                 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4196                         return -1;
4197         }
4198 
4199         fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
4200                 rapl_power_units, rapl_energy_units, rapl_time_units);
4201 
4202         if (do_rapl & RAPL_PKG_POWER_INFO) {
4203 
4204                 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4205                         return -5;
4206 
4207 
4208                 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4209                         cpu, msr,
4210                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4211                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4212                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4213                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4214 
4215         }
4216         if (do_rapl & RAPL_PKG) {
4217 
4218                 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4219                         return -9;
4220 
4221                 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
4222                         cpu, msr, (msr >> 63) & 1 ? "" : "UN");
4223 
4224                 print_power_limit_msr(cpu, msr, "PKG Limit #1");
4225                 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
4226                         cpu,
4227                         ((msr >> 47) & 1) ? "EN" : "DIS",
4228                         ((msr >> 32) & 0x7FFF) * rapl_power_units,
4229                         (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4230                         ((msr >> 48) & 1) ? "EN" : "DIS");
4231         }
4232 
4233         if (do_rapl & RAPL_DRAM_POWER_INFO) {
4234                 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4235                         return -6;
4236 
4237                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4238                         cpu, msr,
4239                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4240                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4241                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4242                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4243         }
4244         if (do_rapl & RAPL_DRAM) {
4245                 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4246                         return -9;
4247                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
4248                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4249 
4250                 print_power_limit_msr(cpu, msr, "DRAM Limit");
4251         }
4252         if (do_rapl & RAPL_CORE_POLICY) {
4253                 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4254                         return -7;
4255 
4256                 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
4257         }
4258         if (do_rapl & RAPL_CORES_POWER_LIMIT) {
4259                 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4260                         return -9;
4261                 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4262                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4263                 print_power_limit_msr(cpu, msr, "Cores Limit");
4264         }
4265         if (do_rapl & RAPL_GFX) {
4266                 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4267                         return -8;
4268 
4269                 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
4270 
4271                 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4272                         return -9;
4273                 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4274                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4275                 print_power_limit_msr(cpu, msr, "GFX Limit");
4276         }
4277         return 0;
4278 }
4279 
4280 /*
4281  * SNB adds support for additional MSRs:
4282  *
4283  * MSR_PKG_C7_RESIDENCY            0x000003fa
4284  * MSR_CORE_C7_RESIDENCY           0x000003fe
4285  * MSR_PKG_C2_RESIDENCY            0x0000060d
4286  */
4287 
4288 int has_snb_msrs(unsigned int family, unsigned int model)
4289 {
4290         if (!genuine_intel)
4291                 return 0;
4292 
4293         switch (model) {
4294         case INTEL_FAM6_SANDYBRIDGE:
4295         case INTEL_FAM6_SANDYBRIDGE_X:
4296         case INTEL_FAM6_IVYBRIDGE:              /* IVB */
4297         case INTEL_FAM6_IVYBRIDGE_X:            /* IVB Xeon */
4298         case INTEL_FAM6_HASWELL:                /* HSW */
4299         case INTEL_FAM6_HASWELL_X:              /* HSW */
4300         case INTEL_FAM6_HASWELL_L:              /* HSW */
4301         case INTEL_FAM6_HASWELL_G:              /* HSW */
4302         case INTEL_FAM6_BROADWELL:              /* BDW */
4303         case INTEL_FAM6_BROADWELL_G:            /* BDW */
4304         case INTEL_FAM6_BROADWELL_X:            /* BDX */
4305         case INTEL_FAM6_SKYLAKE_L:              /* SKL */
4306         case INTEL_FAM6_CANNONLAKE_L:           /* CNL */
4307         case INTEL_FAM6_SKYLAKE_X:              /* SKX */
4308         case INTEL_FAM6_ATOM_GOLDMONT:          /* BXT */
4309         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4310         case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
4311                 return 1;
4312         }
4313         return 0;
4314 }
4315 
4316 /*
4317  * HSW ULT added support for C8/C9/C10 MSRs:
4318  *
4319  * MSR_PKG_C8_RESIDENCY         0x00000630
4320  * MSR_PKG_C9_RESIDENCY         0x00000631
4321  * MSR_PKG_C10_RESIDENCY        0x00000632
4322  *
4323  * MSR_PKGC8_IRTL               0x00000633
4324  * MSR_PKGC9_IRTL               0x00000634
4325  * MSR_PKGC10_IRTL              0x00000635
4326  *
4327  */
4328 int has_c8910_msrs(unsigned int family, unsigned int model)
4329 {
4330         if (!genuine_intel)
4331                 return 0;
4332 
4333         switch (model) {
4334         case INTEL_FAM6_HASWELL_L:      /* HSW */
4335         case INTEL_FAM6_BROADWELL:      /* BDW */
4336         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4337         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4338         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4339         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4340                 return 1;
4341         }
4342         return 0;
4343 }
4344 
4345 /*
4346  * SKL adds support for additional MSRS:
4347  *
4348  * MSR_PKG_WEIGHTED_CORE_C0_RES    0x00000658
4349  * MSR_PKG_ANY_CORE_C0_RES         0x00000659
4350  * MSR_PKG_ANY_GFXE_C0_RES         0x0000065A
4351  * MSR_PKG_BOTH_CORE_GFXE_C0_RES   0x0000065B
4352  */
4353 int has_skl_msrs(unsigned int family, unsigned int model)
4354 {
4355         if (!genuine_intel)
4356                 return 0;
4357 
4358         switch (model) {
4359         case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4360         case INTEL_FAM6_CANNONLAKE_L:   /* CNL */
4361                 return 1;
4362         }
4363         return 0;
4364 }
4365 
4366 int is_slm(unsigned int family, unsigned int model)
4367 {
4368         if (!genuine_intel)
4369                 return 0;
4370         switch (model) {
4371         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
4372         case INTEL_FAM6_ATOM_SILVERMONT_D:      /* AVN */
4373                 return 1;
4374         }
4375         return 0;
4376 }
4377 
4378 int is_knl(unsigned int family, unsigned int model)
4379 {
4380         if (!genuine_intel)
4381                 return 0;
4382         switch (model) {
4383         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4384                 return 1;
4385         }
4386         return 0;
4387 }
4388 
4389 int is_cnl(unsigned int family, unsigned int model)
4390 {
4391         if (!genuine_intel)
4392                 return 0;
4393 
4394         switch (model) {
4395         case INTEL_FAM6_CANNONLAKE_L: /* CNL */
4396                 return 1;
4397         }
4398 
4399         return 0;
4400 }
4401 
4402 unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4403 {
4404         if (is_knl(family, model))
4405                 return 1024;
4406         return 1;
4407 }
4408 
4409 #define SLM_BCLK_FREQS 5
4410 double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4411 
4412 double slm_bclk(void)
4413 {
4414         unsigned long long msr = 3;
4415         unsigned int i;
4416         double freq;
4417 
4418         if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
4419                 fprintf(outf, "SLM BCLK: unknown\n");
4420 
4421         i = msr & 0xf;
4422         if (i >= SLM_BCLK_FREQS) {
4423                 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
4424                 i = 3;
4425         }
4426         freq = slm_freq_table[i];
4427 
4428         if (!quiet)
4429                 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
4430 
4431         return freq;
4432 }
4433 
4434 double discover_bclk(unsigned int family, unsigned int model)
4435 {
4436         if (has_snb_msrs(family, model) || is_knl(family, model))
4437                 return 100.00;
4438         else if (is_slm(family, model))
4439                 return slm_bclk();
4440         else
4441                 return 133.33;
4442 }
4443 
4444 /*
4445  * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4446  * the Thermal Control Circuit (TCC) activates.
4447  * This is usually equal to tjMax.
4448  *
4449  * Older processors do not have this MSR, so there we guess,
4450  * but also allow cmdline over-ride with -T.
4451  *
4452  * Several MSR temperature values are in units of degrees-C
4453  * below this value, including the Digital Thermal Sensor (DTS),
4454  * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4455  */
4456 int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4457 {
4458         unsigned long long msr;
4459         unsigned int target_c_local;
4460         int cpu;
4461 
4462         /* tcc_activation_temp is used only for dts or ptm */
4463         if (!(do_dts || do_ptm))
4464                 return 0;
4465 
4466         /* this is a per-package concept */
4467         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4468                 return 0;
4469 
4470         cpu = t->cpu_id;
4471         if (cpu_migrate(cpu)) {
4472                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4473                 return -1;
4474         }
4475 
4476         if (tcc_activation_temp_override != 0) {
4477                 tcc_activation_temp = tcc_activation_temp_override;
4478                 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
4479                         cpu, tcc_activation_temp);
4480                 return 0;
4481         }
4482 
4483         /* Temperature Target MSR is Nehalem and newer only */
4484         if (!do_nhm_platform_info)
4485                 goto guess;
4486 
4487         if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
4488                 goto guess;
4489 
4490         target_c_local = (msr >> 16) & 0xFF;
4491 
4492         if (!quiet)
4493                 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
4494                         cpu, msr, target_c_local);
4495 
4496         if (!target_c_local)
4497                 goto guess;
4498 
4499         tcc_activation_temp = target_c_local;
4500 
4501         return 0;
4502 
4503 guess:
4504         tcc_activation_temp = TJMAX_DEFAULT;
4505         fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
4506                 cpu, tcc_activation_temp);
4507 
4508         return 0;
4509 }
4510 
4511 void decode_feature_control_msr(void)
4512 {
4513         unsigned long long msr;
4514 
4515         if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
4516                 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4517                         base_cpu, msr,
4518                         msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
4519                         msr & (1 << 18) ? "SGX" : "");
4520 }
4521 
4522 void decode_misc_enable_msr(void)
4523 {
4524         unsigned long long msr;
4525 
4526         if (!genuine_intel)
4527                 return;
4528 
4529         if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
4530                 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
4531                         base_cpu, msr,
4532                         msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4533                         msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
4534                         msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
4535                         msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4536                         msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
4537 }
4538 
4539 void decode_misc_feature_control(void)
4540 {
4541         unsigned long long msr;
4542 
4543         if (!has_misc_feature_control)
4544                 return;
4545 
4546         if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4547                 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4548                         base_cpu, msr,
4549                         msr & (0 << 0) ? "No-" : "",
4550                         msr & (1 << 0) ? "No-" : "",
4551                         msr & (2 << 0) ? "No-" : "",
4552                         msr & (3 << 0) ? "No-" : "");
4553 }
4554 /*
4555  * Decode MSR_MISC_PWR_MGMT
4556  *
4557  * Decode the bits according to the Nehalem documentation
4558  * bit[0] seems to continue to have same meaning going forward
4559  * bit[1] less so...
4560  */
4561 void decode_misc_pwr_mgmt_msr(void)
4562 {
4563         unsigned long long msr;
4564 
4565         if (!do_nhm_platform_info)
4566                 return;
4567 
4568         if (no_MSR_MISC_PWR_MGMT)
4569                 return;
4570 
4571         if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
4572                 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
4573                         base_cpu, msr,
4574                         msr & (1 << 0) ? "DIS" : "EN",
4575                         msr & (1 << 1) ? "EN" : "DIS",
4576                         msr & (1 << 8) ? "EN" : "DIS");
4577 }
4578 /*
4579  * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
4580  *
4581  * This MSRs are present on Silvermont processors,
4582  * Intel Atom processor E3000 series (Baytrail), and friends.
4583  */
4584 void decode_c6_demotion_policy_msr(void)
4585 {
4586         unsigned long long msr;
4587 
4588         if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
4589                 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
4590                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4591 
4592         if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
4593                 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
4594                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4595 }
4596 
4597 /*
4598  * When models are the same, for the purpose of turbostat, reuse
4599  */
4600 unsigned int intel_model_duplicates(unsigned int model)
4601 {
4602 
4603         switch(model) {
4604         case INTEL_FAM6_NEHALEM_EP:     /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
4605         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
4606         case 0x1F:      /* Core i7 and i5 Processor - Nehalem */
4607         case INTEL_FAM6_WESTMERE:       /* Westmere Client - Clarkdale, Arrandale */
4608         case INTEL_FAM6_WESTMERE_EP:    /* Westmere EP - Gulftown */
4609                 return INTEL_FAM6_NEHALEM;
4610 
4611         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
4612         case INTEL_FAM6_WESTMERE_EX:    /* Westmere-EX Xeon - Eagleton */
4613                 return INTEL_FAM6_NEHALEM_EX;
4614 
4615         case INTEL_FAM6_XEON_PHI_KNM:
4616                 return INTEL_FAM6_XEON_PHI_KNL;
4617 
4618         case INTEL_FAM6_BROADWELL_X:
4619         case INTEL_FAM6_BROADWELL_D:    /* BDX-DE */
4620                 return INTEL_FAM6_BROADWELL_X;
4621 
4622         case INTEL_FAM6_SKYLAKE_L:
4623         case INTEL_FAM6_SKYLAKE:
4624         case INTEL_FAM6_KABYLAKE_L:
4625         case INTEL_FAM6_KABYLAKE:
4626                 return INTEL_FAM6_SKYLAKE_L;
4627 
4628         case INTEL_FAM6_ICELAKE_L:
4629         case INTEL_FAM6_ICELAKE_NNPI:
4630                 return INTEL_FAM6_CANNONLAKE_L;
4631 
4632         case INTEL_FAM6_ATOM_TREMONT_D:
4633                 return INTEL_FAM6_ATOM_GOLDMONT_D;
4634         }
4635         return model;
4636 }
4637 void process_cpuid()
4638 {
4639         unsigned int eax, ebx, ecx, edx;
4640         unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
4641         unsigned int has_turbo;
4642 
4643         eax = ebx = ecx = edx = 0;
4644 
4645         __cpuid(0, max_level, ebx, ecx, edx);
4646 
4647         if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
4648                 genuine_intel = 1;
4649         else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
4650                 authentic_amd = 1;
4651         else if (ebx == 0x6f677948 && ecx == 0x656e6975 && edx == 0x6e65476e)
4652                 hygon_genuine = 1;
4653 
4654         if (!quiet)
4655                 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
4656                         (char *)&ebx, (char *)&edx, (char *)&ecx);
4657 
4658         __cpuid(1, fms, ebx, ecx, edx);
4659         family = (fms >> 8) & 0xf;
4660         model = (fms >> 4) & 0xf;
4661         stepping = fms & 0xf;
4662         if (family == 0xf)
4663                 family += (fms >> 20) & 0xff;
4664         if (family >= 6)
4665                 model += ((fms >> 16) & 0xf) << 4;
4666         ecx_flags = ecx;
4667         edx_flags = edx;
4668 
4669         /*
4670          * check max extended function levels of CPUID.
4671          * This is needed to check for invariant TSC.
4672          * This check is valid for both Intel and AMD.
4673          */
4674         ebx = ecx = edx = 0;
4675         __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
4676 
4677         if (!quiet) {
4678                 fprintf(outf, "0x%x CPUID levels; 0x%x xlevels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
4679                         max_level, max_extended_level, family, model, stepping, family, model, stepping);
4680                 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
4681                         ecx_flags & (1 << 0) ? "SSE3" : "-",
4682                         ecx_flags & (1 << 3) ? "MONITOR" : "-",
4683                         ecx_flags & (1 << 6) ? "SMX" : "-",
4684                         ecx_flags & (1 << 7) ? "EIST" : "-",
4685                         ecx_flags & (1 << 8) ? "TM2" : "-",
4686                         edx_flags & (1 << 4) ? "TSC" : "-",
4687                         edx_flags & (1 << 5) ? "MSR" : "-",
4688                         edx_flags & (1 << 22) ? "ACPI-TM" : "-",
4689                         edx_flags & (1 << 28) ? "HT" : "-",
4690                         edx_flags & (1 << 29) ? "TM" : "-");
4691         }
4692         if (genuine_intel)
4693                 model = intel_model_duplicates(model);
4694 
4695         if (!(edx_flags & (1 << 5)))
4696                 errx(1, "CPUID: no MSR");
4697 
4698         if (max_extended_level >= 0x80000007) {
4699 
4700                 /*
4701                  * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
4702                  * this check is valid for both Intel and AMD
4703                  */
4704                 __cpuid(0x80000007, eax, ebx, ecx, edx);
4705                 has_invariant_tsc = edx & (1 << 8);
4706         }
4707 
4708         /*
4709          * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
4710          * this check is valid for both Intel and AMD
4711          */
4712 
4713         __cpuid(0x6, eax, ebx, ecx, edx);
4714         has_aperf = ecx & (1 << 0);
4715         if (has_aperf) {
4716                 BIC_PRESENT(BIC_Avg_MHz);
4717                 BIC_PRESENT(BIC_Busy);
4718                 BIC_PRESENT(BIC_Bzy_MHz);
4719         }
4720         do_dts = eax & (1 << 0);
4721         if (do_dts)
4722                 BIC_PRESENT(BIC_CoreTmp);
4723         has_turbo = eax & (1 << 1);
4724         do_ptm = eax & (1 << 6);
4725         if (do_ptm)
4726                 BIC_PRESENT(BIC_PkgTmp);
4727         has_hwp = eax & (1 << 7);
4728         has_hwp_notify = eax & (1 << 8);
4729         has_hwp_activity_window = eax & (1 << 9);
4730         has_hwp_epp = eax & (1 << 10);
4731         has_hwp_pkg = eax & (1 << 11);
4732         has_epb = ecx & (1 << 3);
4733 
4734         if (!quiet)
4735                 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
4736                         "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
4737                         has_aperf ? "" : "No-",
4738                         has_turbo ? "" : "No-",
4739                         do_dts ? "" : "No-",
4740                         do_ptm ? "" : "No-",
4741                         has_hwp ? "" : "No-",
4742                         has_hwp_notify ? "" : "No-",
4743                         has_hwp_activity_window ? "" : "No-",
4744                         has_hwp_epp ? "" : "No-",
4745                         has_hwp_pkg ? "" : "No-",
4746                         has_epb ? "" : "No-");
4747 
4748         if (!quiet)
4749                 decode_misc_enable_msr();
4750 
4751 
4752         if (max_level >= 0x7 && !quiet) {
4753                 int has_sgx;
4754 
4755                 ecx = 0;
4756 
4757                 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
4758 
4759                 has_sgx = ebx & (1 << 2);
4760                 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
4761 
4762                 if (has_sgx)
4763                         decode_feature_control_msr();
4764         }
4765 
4766         if (max_level >= 0x15) {
4767                 unsigned int eax_crystal;
4768                 unsigned int ebx_tsc;
4769 
4770                 /*
4771                  * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
4772                  */
4773                 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
4774                 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
4775 
4776                 if (ebx_tsc != 0) {
4777 
4778                         if (!quiet && (ebx != 0))
4779                                 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
4780                                         eax_crystal, ebx_tsc, crystal_hz);
4781 
4782                         if (crystal_hz == 0)
4783                                 switch(model) {
4784                                 case INTEL_FAM6_SKYLAKE_L:      /* SKL */
4785                                         crystal_hz = 24000000;  /* 24.0 MHz */
4786                                         break;
4787                                 case INTEL_FAM6_ATOM_GOLDMONT_D:        /* DNV */
4788                                         crystal_hz = 25000000;  /* 25.0 MHz */
4789                                         break;
4790                                 case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4791                                 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4792                                         crystal_hz = 19200000;  /* 19.2 MHz */
4793                                         break;
4794                                 default:
4795                                         crystal_hz = 0;
4796                         }
4797 
4798                         if (crystal_hz) {
4799                                 tsc_hz =  (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
4800                                 if (!quiet)
4801                                         fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
4802                                                 tsc_hz / 1000000, crystal_hz, ebx_tsc,  eax_crystal);
4803                         }
4804                 }
4805         }
4806         if (max_level >= 0x16) {
4807                 unsigned int base_mhz, max_mhz, bus_mhz, edx;
4808 
4809                 /*
4810                  * CPUID 16H Base MHz, Max MHz, Bus MHz
4811                  */
4812                 base_mhz = max_mhz = bus_mhz = edx = 0;
4813 
4814                 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
4815                 if (!quiet)
4816                         fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
4817                                 base_mhz, max_mhz, bus_mhz);
4818         }
4819 
4820         if (has_aperf)
4821                 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
4822 
4823         BIC_PRESENT(BIC_IRQ);
4824         BIC_PRESENT(BIC_TSC_MHz);
4825 
4826         if (probe_nhm_msrs(family, model)) {
4827                 do_nhm_platform_info = 1;
4828                 BIC_PRESENT(BIC_CPU_c1);
4829                 BIC_PRESENT(BIC_CPU_c3);
4830                 BIC_PRESENT(BIC_CPU_c6);
4831                 BIC_PRESENT(BIC_SMI);
4832         }
4833         do_snb_cstates = has_snb_msrs(family, model);
4834 
4835         if (do_snb_cstates)
4836                 BIC_PRESENT(BIC_CPU_c7);
4837 
4838         do_irtl_snb = has_snb_msrs(family, model);
4839         if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
4840                 BIC_PRESENT(BIC_Pkgpc2);
4841         if (pkg_cstate_limit >= PCL__3)
4842                 BIC_PRESENT(BIC_Pkgpc3);
4843         if (pkg_cstate_limit >= PCL__6)
4844                 BIC_PRESENT(BIC_Pkgpc6);
4845         if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
4846                 BIC_PRESENT(BIC_Pkgpc7);
4847         if (has_slv_msrs(family, model)) {
4848                 BIC_NOT_PRESENT(BIC_Pkgpc2);
4849                 BIC_NOT_PRESENT(BIC_Pkgpc3);
4850                 BIC_PRESENT(BIC_Pkgpc6);
4851                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4852                 BIC_PRESENT(BIC_Mod_c6);
4853                 use_c1_residency_msr = 1;
4854         }
4855         if (is_dnv(family, model)) {
4856                 BIC_PRESENT(BIC_CPU_c1);
4857                 BIC_NOT_PRESENT(BIC_CPU_c3);
4858                 BIC_NOT_PRESENT(BIC_Pkgpc3);
4859                 BIC_NOT_PRESENT(BIC_CPU_c7);
4860                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4861                 use_c1_residency_msr = 1;
4862         }
4863         if (is_skx(family, model)) {
4864                 BIC_NOT_PRESENT(BIC_CPU_c3);
4865                 BIC_NOT_PRESENT(BIC_Pkgpc3);
4866                 BIC_NOT_PRESENT(BIC_CPU_c7);
4867                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4868         }
4869         if (is_bdx(family, model)) {
4870                 BIC_NOT_PRESENT(BIC_CPU_c7);
4871                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4872         }
4873         if (has_c8910_msrs(family, model)) {
4874                 BIC_PRESENT(BIC_Pkgpc8);
4875                 BIC_PRESENT(BIC_Pkgpc9);
4876                 BIC_PRESENT(BIC_Pkgpc10);
4877         }
4878         do_irtl_hsw = has_c8910_msrs(family, model);
4879         if (has_skl_msrs(family, model)) {
4880                 BIC_PRESENT(BIC_Totl_c0);
4881                 BIC_PRESENT(BIC_Any_c0);
4882                 BIC_PRESENT(BIC_GFX_c0);
4883                 BIC_PRESENT(BIC_CPUGFX);
4884         }
4885         do_slm_cstates = is_slm(family, model);
4886         do_knl_cstates  = is_knl(family, model);
4887 
4888         if (do_slm_cstates || do_knl_cstates || is_cnl(family, model))
4889                 BIC_NOT_PRESENT(BIC_CPU_c3);
4890 
4891         if (!quiet)
4892                 decode_misc_pwr_mgmt_msr();
4893 
4894         if (!quiet && has_slv_msrs(family, model))
4895                 decode_c6_demotion_policy_msr();
4896 
4897         rapl_probe(family, model);
4898         perf_limit_reasons_probe(family, model);
4899         automatic_cstate_conversion_probe(family, model);
4900 
4901         if (!quiet)
4902                 dump_cstate_pstate_config_info(family, model);
4903 
4904         if (!quiet)
4905                 dump_sysfs_cstate_config();
4906         if (!quiet)
4907                 dump_sysfs_pstate_config();
4908 
4909         if (has_skl_msrs(family, model))
4910                 calculate_tsc_tweak();
4911 
4912         if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
4913                 BIC_PRESENT(BIC_GFX_rc6);
4914 
4915         if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
4916                 BIC_PRESENT(BIC_GFXMHz);
4917 
4918         if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
4919                 BIC_PRESENT(BIC_CPU_LPI);
4920         else
4921                 BIC_NOT_PRESENT(BIC_CPU_LPI);
4922 
4923         if (!access(sys_lpi_file_sysfs, R_OK)) {
4924                 sys_lpi_file = sys_lpi_file_sysfs;
4925                 BIC_PRESENT(BIC_SYS_LPI);
4926         } else if (!access(sys_lpi_file_debugfs, R_OK)) {
4927                 sys_lpi_file = sys_lpi_file_debugfs;
4928                 BIC_PRESENT(BIC_SYS_LPI);
4929         } else {
4930                 sys_lpi_file_sysfs = NULL;
4931                 BIC_NOT_PRESENT(BIC_SYS_LPI);
4932         }
4933 
4934         if (!quiet)
4935                 decode_misc_feature_control();
4936 
4937         return;
4938 }
4939 
4940 /*
4941  * in /dev/cpu/ return success for names that are numbers
4942  * ie. filter out ".", "..", "microcode".
4943  */
4944 int dir_filter(const struct dirent *dirp)
4945 {
4946         if (isdigit(dirp->d_name[0]))
4947                 return 1;
4948         else
4949                 return 0;
4950 }
4951 
4952 int open_dev_cpu_msr(int dummy1)
4953 {
4954         return 0;
4955 }
4956 
4957 void topology_probe()
4958 {
4959         int i;
4960         int max_core_id = 0;
4961         int max_package_id = 0;
4962         int max_die_id = 0;
4963         int max_siblings = 0;
4964 
4965         /* Initialize num_cpus, max_cpu_num */
4966         set_max_cpu_num();
4967         topo.num_cpus = 0;
4968         for_all_proc_cpus(count_cpus);
4969         if (!summary_only && topo.num_cpus > 1)
4970                 BIC_PRESENT(BIC_CPU);
4971 
4972         if (debug > 1)
4973                 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
4974 
4975         cpus = calloc(1, (topo.max_cpu_num  + 1) * sizeof(struct cpu_topology));
4976         if (cpus == NULL)
4977                 err(1, "calloc cpus");
4978 
4979         /*
4980          * Allocate and initialize cpu_present_set
4981          */
4982         cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
4983         if (cpu_present_set == NULL)
4984                 err(3, "CPU_ALLOC");
4985         cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4986         CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
4987         for_all_proc_cpus(mark_cpu_present);
4988 
4989         /*
4990          * Validate that all cpus in cpu_subset are also in cpu_present_set
4991          */
4992         for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
4993                 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
4994                         if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
4995                                 err(1, "cpu%d not present", i);
4996         }
4997 
4998         /*
4999          * Allocate and initialize cpu_affinity_set
5000          */
5001         cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
5002         if (cpu_affinity_set == NULL)
5003                 err(3, "CPU_ALLOC");
5004         cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5005         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
5006 
5007         for_all_proc_cpus(init_thread_id);
5008 
5009         /*
5010          * For online cpus
5011          * find max_core_id, max_package_id
5012          */
5013         for (i = 0; i <= topo.max_cpu_num; ++i) {
5014                 int siblings;
5015 
5016                 if (cpu_is_not_present(i)) {
5017                         if (debug > 1)
5018                                 fprintf(outf, "cpu%d NOT PRESENT\n", i);
5019                         continue;
5020                 }
5021 
5022                 cpus[i].logical_cpu_id = i;
5023 
5024                 /* get package information */
5025                 cpus[i].physical_package_id = get_physical_package_id(i);
5026                 if (cpus[i].physical_package_id > max_package_id)
5027                         max_package_id = cpus[i].physical_package_id;
5028 
5029                 /* get die information */
5030                 cpus[i].die_id = get_die_id(i);
5031                 if (cpus[i].die_id > max_die_id)
5032                         max_die_id = cpus[i].die_id;
5033 
5034                 /* get numa node information */
5035                 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
5036                 if (cpus[i].physical_node_id > topo.max_node_num)
5037                         topo.max_node_num = cpus[i].physical_node_id;
5038 
5039                 /* get core information */
5040                 cpus[i].physical_core_id = get_core_id(i);
5041                 if (cpus[i].physical_core_id > max_core_id)
5042                         max_core_id = cpus[i].physical_core_id;
5043 
5044                 /* get thread information */
5045                 siblings = get_thread_siblings(&cpus[i]);
5046                 if (siblings > max_siblings)
5047                         max_siblings = siblings;
5048                 if (cpus[i].thread_id == 0)
5049                         topo.num_cores++;
5050         }
5051 
5052         topo.cores_per_node = max_core_id + 1;
5053         if (debug > 1)
5054                 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
5055                         max_core_id, topo.cores_per_node);
5056         if (!summary_only && topo.cores_per_node > 1)
5057                 BIC_PRESENT(BIC_Core);
5058 
5059         topo.num_die = max_die_id + 1;
5060         if (debug > 1)
5061                 fprintf(outf, "max_die_id %d, sizing for %d die\n",
5062                                 max_die_id, topo.num_die);
5063         if (!summary_only && topo.num_die > 1)
5064                 BIC_PRESENT(BIC_Die);
5065 
5066         topo.num_packages = max_package_id + 1;
5067         if (debug > 1)
5068                 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
5069                         max_package_id, topo.num_packages);
5070         if (!summary_only && topo.num_packages > 1)
5071                 BIC_PRESENT(BIC_Package);
5072 
5073         set_node_data();
5074         if (debug > 1)
5075                 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
5076         if (!summary_only && topo.nodes_per_pkg > 1)
5077                 BIC_PRESENT(BIC_Node);
5078 
5079         topo.threads_per_core = max_siblings;
5080         if (debug > 1)
5081                 fprintf(outf, "max_siblings %d\n", max_siblings);
5082 
5083         if (debug < 1)
5084                 return;
5085 
5086         for (i = 0; i <= topo.max_cpu_num; ++i) {
5087                 if (cpu_is_not_present(i))
5088                         continue;
5089                 fprintf(outf,
5090                         "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5091                         i, cpus[i].physical_package_id, cpus[i].die_id,
5092                         cpus[i].physical_node_id,
5093                         cpus[i].logical_node_id,
5094                         cpus[i].physical_core_id,
5095                         cpus[i].thread_id);
5096         }
5097 
5098 }
5099 
5100 void
5101 allocate_counters(struct thread_data **t, struct core_data **c,
5102                   struct pkg_data **p)
5103 {
5104         int i;
5105         int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5106                         topo.num_packages;
5107         int num_threads = topo.threads_per_core * num_cores;
5108 
5109         *t = calloc(num_threads, sizeof(struct thread_data));
5110         if (*t == NULL)
5111                 goto error;
5112 
5113         for (i = 0; i < num_threads; i++)
5114                 (*t)[i].cpu_id = -1;
5115 
5116         *c = calloc(num_cores, sizeof(struct core_data));
5117         if (*c == NULL)
5118                 goto error;
5119 
5120         for (i = 0; i < num_cores; i++)
5121                 (*c)[i].core_id = -1;
5122 
5123         *p = calloc(topo.num_packages, sizeof(struct pkg_data));
5124         if (*p == NULL)
5125                 goto error;
5126 
5127         for (i = 0; i < topo.num_packages; i++)
5128                 (*p)[i].package_id = i;
5129 
5130         return;
5131 error:
5132         err(1, "calloc counters");
5133 }
5134 /*
5135  * init_counter()
5136  *
5137  * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
5138  */
5139 void init_counter(struct thread_data *thread_base, struct core_data *core_base,
5140         struct pkg_data *pkg_base, int cpu_id)
5141 {
5142         int pkg_id = cpus[cpu_id].physical_package_id;
5143         int node_id = cpus[cpu_id].logical_node_id;
5144         int core_id = cpus[cpu_id].physical_core_id;
5145         int thread_id = cpus[cpu_id].thread_id;
5146         struct thread_data *t;
5147         struct core_data *c;
5148         struct pkg_data *p;
5149 
5150 
5151         /* Workaround for systems where physical_node_id==-1
5152          * and logical_node_id==(-1 - topo.num_cpus)
5153          */
5154         if (node_id < 0)
5155                 node_id = 0;
5156 
5157         t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5158         c = GET_CORE(core_base, core_id, node_id, pkg_id);
5159         p = GET_PKG(pkg_base, pkg_id);
5160 
5161         t->cpu_id = cpu_id;
5162         if (thread_id == 0) {
5163                 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5164                 if (cpu_is_first_core_in_package(cpu_id))
5165                         t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5166         }
5167 
5168         c->core_id = core_id;
5169         p->package_id = pkg_id;
5170 }
5171 
5172 
5173 int initialize_counters(int cpu_id)
5174 {
5175         init_counter(EVEN_COUNTERS, cpu_id);
5176         init_counter(ODD_COUNTERS, cpu_id);
5177         return 0;
5178 }
5179 
5180 void allocate_output_buffer()
5181 {
5182         output_buffer = calloc(1, (1 + topo.num_cpus) * 2048);
5183         outp = output_buffer;
5184         if (outp == NULL)
5185                 err(-1, "calloc output buffer");
5186 }
5187 void allocate_fd_percpu(void)
5188 {
5189         fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5190         if (fd_percpu == NULL)
5191                 err(-1, "calloc fd_percpu");
5192 }
5193 void allocate_irq_buffers(void)
5194 {
5195         irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5196         if (irq_column_2_cpu == NULL)
5197                 err(-1, "calloc %d", topo.num_cpus);
5198 
5199         irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5200         if (irqs_per_cpu == NULL)
5201                 err(-1, "calloc %d", topo.max_cpu_num + 1);
5202 }
5203 void setup_all_buffers(void)
5204 {
5205         topology_probe();
5206         allocate_irq_buffers();
5207         allocate_fd_percpu();
5208         allocate_counters(&thread_even, &core_even, &package_even);
5209         allocate_counters(&thread_odd, &core_odd, &package_odd);
5210         allocate_output_buffer();
5211         for_all_proc_cpus(initialize_counters);
5212 }
5213 
5214 void set_base_cpu(void)
5215 {
5216         base_cpu = sched_getcpu();
5217         if (base_cpu < 0)
5218                 err(-ENODEV, "No valid cpus found");
5219 
5220         if (debug > 1)
5221                 fprintf(outf, "base_cpu = %d\n", base_cpu);
5222 }
5223 
5224 void turbostat_init()
5225 {
5226         setup_all_buffers();
5227         set_base_cpu();
5228         check_dev_msr();
5229         check_permissions();
5230         process_cpuid();
5231 
5232 
5233         if (!quiet)
5234                 for_all_cpus(print_hwp, ODD_COUNTERS);
5235 
5236         if (!quiet)
5237                 for_all_cpus(print_epb, ODD_COUNTERS);
5238 
5239         if (!quiet)
5240                 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5241 
5242         if (!quiet)
5243                 for_all_cpus(print_rapl, ODD_COUNTERS);
5244 
5245         for_all_cpus(set_temperature_target, ODD_COUNTERS);
5246 
5247         if (!quiet)
5248                 for_all_cpus(print_thermal, ODD_COUNTERS);
5249 
5250         if (!quiet && do_irtl_snb)
5251                 print_irtl();
5252 }
5253 
5254 int fork_it(char **argv)
5255 {
5256         pid_t child_pid;
5257         int status;
5258 
5259         snapshot_proc_sysfs_files();
5260         status = for_all_cpus(get_counters, EVEN_COUNTERS);
5261         first_counter_read = 0;
5262         if (status)
5263                 exit(status);
5264         /* clear affinity side-effect of get_counters() */
5265         sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
5266         gettimeofday(&tv_even, (struct timezone *)NULL);
5267 
5268         child_pid = fork();
5269         if (!child_pid) {
5270                 /* child */
5271                 execvp(argv[0], argv);
5272                 err(errno, "exec %s", argv[0]);
5273         } else {
5274 
5275                 /* parent */
5276                 if (child_pid == -1)
5277                         err(1, "fork");
5278 
5279                 signal(SIGINT, SIG_IGN);
5280                 signal(SIGQUIT, SIG_IGN);
5281                 if (waitpid(child_pid, &status, 0) == -1)
5282                         err(status, "waitpid");
5283 
5284                 if (WIFEXITED(status))
5285                         status = WEXITSTATUS(status);
5286         }
5287         /*
5288          * n.b. fork_it() does not check for errors from for_all_cpus()
5289          * because re-starting is problematic when forking
5290          */
5291         snapshot_proc_sysfs_files();
5292         for_all_cpus(get_counters, ODD_COUNTERS);
5293         gettimeofday(&tv_odd, (struct timezone *)NULL);
5294         timersub(&tv_odd, &tv_even, &tv_delta);
5295         if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5296                 fprintf(outf, "%s: Counter reset detected\n", progname);
5297         else {
5298                 compute_average(EVEN_COUNTERS);
5299                 format_all_counters(EVEN_COUNTERS);
5300         }
5301 
5302         fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5303 
5304         flush_output_stderr();
5305 
5306         return status;
5307 }
5308 
5309 int get_and_dump_counters(void)
5310 {
5311         int status;
5312 
5313         snapshot_proc_sysfs_files();
5314         status = for_all_cpus(get_counters, ODD_COUNTERS);
5315         if (status)
5316                 return status;
5317 
5318         status = for_all_cpus(dump_counters, ODD_COUNTERS);
5319         if (status)
5320                 return status;
5321 
5322         flush_output_stdout();
5323 
5324         return status;
5325 }
5326 
5327 void print_version() {
5328         fprintf(outf, "turbostat version 19.08.31"
5329                 " - Len Brown <lenb@kernel.org>\n");
5330 }
5331 
5332 int add_counter(unsigned int msr_num, char *path, char *name,
5333         unsigned int width, enum counter_scope scope,
5334         enum counter_type type, enum counter_format format, int flags)
5335 {
5336         struct msr_counter *msrp;
5337 
5338         msrp = calloc(1, sizeof(struct msr_counter));
5339         if (msrp == NULL) {
5340                 perror("calloc");
5341                 exit(1);
5342         }
5343 
5344         msrp->msr_num = msr_num;
5345         strncpy(msrp->name, name, NAME_BYTES - 1);
5346         if (path)
5347                 strncpy(msrp->path, path, PATH_BYTES - 1);
5348         msrp->width = width;
5349         msrp->type = type;
5350         msrp->format = format;
5351         msrp->flags = flags;
5352 
5353         switch (scope) {
5354 
5355         case SCOPE_CPU:
5356                 msrp->next = sys.tp;
5357                 sys.tp = msrp;
5358                 sys.added_thread_counters++;
5359                 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
5360                         fprintf(stderr, "exceeded max %d added thread counters\n",
5361                                 MAX_ADDED_COUNTERS);
5362                         exit(-1);
5363                 }
5364                 break;
5365 
5366         case SCOPE_CORE:
5367                 msrp->next = sys.cp;
5368                 sys.cp = msrp;
5369                 sys.added_core_counters++;
5370                 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5371                         fprintf(stderr, "exceeded max %d added core counters\n",
5372                                 MAX_ADDED_COUNTERS);
5373                         exit(-1);
5374                 }
5375                 break;
5376 
5377         case SCOPE_PACKAGE:
5378                 msrp->next = sys.pp;
5379                 sys.pp = msrp;
5380                 sys.added_package_counters++;
5381                 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5382                         fprintf(stderr, "exceeded max %d added package counters\n",
5383                                 MAX_ADDED_COUNTERS);
5384                         exit(-1);
5385                 }
5386                 break;
5387         }
5388 
5389         return 0;
5390 }
5391 
5392 void parse_add_command(char *add_command)
5393 {
5394         int msr_num = 0;
5395         char *path = NULL;
5396         char name_buffer[NAME_BYTES] = "";
5397         int width = 64;
5398         int fail = 0;
5399         enum counter_scope scope = SCOPE_CPU;
5400         enum counter_type type = COUNTER_CYCLES;
5401         enum counter_format format = FORMAT_DELTA;
5402 
5403         while (add_command) {
5404 
5405                 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5406                         goto next;
5407 
5408                 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5409                         goto next;
5410 
5411                 if (*add_command == '/') {
5412                         path = add_command;
5413                         goto next;
5414                 }
5415 
5416                 if (sscanf(add_command, "u%d", &width) == 1) {
5417                         if ((width == 32) || (width == 64))
5418                                 goto next;
5419                         width = 64;
5420                 }
5421                 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5422                         scope = SCOPE_CPU;
5423                         goto next;
5424                 }
5425                 if (!strncmp(add_command, "core", strlen("core"))) {
5426                         scope = SCOPE_CORE;
5427                         goto next;
5428                 }
5429                 if (!strncmp(add_command, "package", strlen("package"))) {
5430                         scope = SCOPE_PACKAGE;
5431                         goto next;
5432                 }
5433                 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5434                         type = COUNTER_CYCLES;
5435                         goto next;
5436                 }
5437                 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5438                         type = COUNTER_SECONDS;
5439                         goto next;
5440                 }
5441                 if (!strncmp(add_command, "usec", strlen("usec"))) {
5442                         type = COUNTER_USEC;
5443                         goto next;
5444                 }
5445                 if (!strncmp(add_command, "raw", strlen("raw"))) {
5446                         format = FORMAT_RAW;
5447                         goto next;
5448                 }
5449                 if (!strncmp(add_command, "delta", strlen("delta"))) {
5450                         format = FORMAT_DELTA;
5451                         goto next;
5452                 }
5453                 if (!strncmp(add_command, "percent", strlen("percent"))) {
5454                         format = FORMAT_PERCENT;
5455                         goto next;
5456                 }
5457 
5458                 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) {        /* 18 < NAME_BYTES */
5459                         char *eos;
5460 
5461                         eos = strchr(name_buffer, ',');
5462                         if (eos)
5463                                 *eos = '\0';
5464                         goto next;
5465                 }
5466 
5467 next:
5468                 add_command = strchr(add_command, ',');
5469                 if (add_command) {
5470                         *add_command = '\0';
5471                         add_command++;
5472                 }
5473 
5474         }
5475         if ((msr_num == 0) && (path == NULL)) {
5476                 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
5477                 fail++;
5478         }
5479 
5480         /* generate default column header */
5481         if (*name_buffer == '\0') {
5482                 if (width == 32)
5483                         sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5484                 else
5485                         sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5486         }
5487 
5488         if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
5489                 fail++;
5490 
5491         if (fail) {
5492                 help();
5493                 exit(1);
5494         }
5495 }
5496 
5497 int is_deferred_skip(char *name)
5498 {
5499         int i;
5500 
5501         for (i = 0; i < deferred_skip_index; ++i)
5502                 if (!strcmp(name, deferred_skip_names[i]))
5503                         return 1;
5504         return 0;
5505 }
5506 
5507 void probe_sysfs(void)
5508 {
5509         char path[64];
5510         char name_buf[16];
5511         FILE *input;
5512         int state;
5513         char *sp;
5514 
5515         if (!DO_BIC(BIC_sysfs))
5516                 return;
5517 
5518         for (state = 10; state >= 0; --state) {
5519 
5520                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5521                         base_cpu, state);
5522                 input = fopen(path, "r");
5523                 if (input == NULL)
5524                         continue;
5525                 if (!fgets(name_buf, sizeof(name_buf), input))
5526                         err(1, "%s: failed to read file", path);
5527 
5528                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5529                 sp = strchr(name_buf, '-');
5530                 if (!sp)
5531                         sp = strchrnul(name_buf, '\n');
5532                 *sp = '%';
5533                 *(sp + 1) = '\0';
5534 
5535                 fclose(input);
5536 
5537                 sprintf(path, "cpuidle/state%d/time", state);
5538 
5539                 if (is_deferred_skip(name_buf))
5540                         continue;
5541 
5542                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
5543                                 FORMAT_PERCENT, SYSFS_PERCPU);
5544         }
5545 
5546         for (state = 10; state >= 0; --state) {
5547 
5548                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5549                         base_cpu, state);
5550                 input = fopen(path, "r");
5551                 if (input == NULL)
5552                         continue;
5553                 if (!fgets(name_buf, sizeof(name_buf), input))
5554                         err(1, "%s: failed to read file", path);
5555                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5556                 sp = strchr(name_buf, '-');
5557                 if (!sp)
5558                         sp = strchrnul(name_buf, '\n');
5559                 *sp = '\0';
5560                 fclose(input);
5561 
5562                 sprintf(path, "cpuidle/state%d/usage", state);
5563 
5564                 if (is_deferred_skip(name_buf))
5565                         continue;
5566 
5567                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
5568                                 FORMAT_DELTA, SYSFS_PERCPU);
5569         }
5570 
5571 }
5572 
5573 
5574 /*
5575  * parse cpuset with following syntax
5576  * 1,2,4..6,8-10 and set bits in cpu_subset
5577  */
5578 void parse_cpu_command(char *optarg)
5579 {
5580         unsigned int start, end;
5581         char *next;
5582 
5583         if (!strcmp(optarg, "core")) {
5584                 if (cpu_subset)
5585                         goto error;
5586                 show_core_only++;
5587                 return;
5588         }
5589         if (!strcmp(optarg, "package")) {
5590                 if (cpu_subset)
5591                         goto error;
5592                 show_pkg_only++;
5593                 return;
5594         }
5595         if (show_core_only || show_pkg_only)
5596                 goto error;
5597 
5598         cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
5599         if (cpu_subset == NULL)
5600                 err(3, "CPU_ALLOC");
5601         cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
5602 
5603         CPU_ZERO_S(cpu_subset_size, cpu_subset);
5604 
5605         next = optarg;
5606 
5607         while (next && *next) {
5608 
5609                 if (*next == '-')       /* no negative cpu numbers */
5610                         goto error;
5611 
5612                 start = strtoul(next, &next, 10);
5613 
5614                 if (start >= CPU_SUBSET_MAXCPUS)
5615                         goto error;
5616                 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5617 
5618                 if (*next == '\0')
5619                         break;
5620 
5621                 if (*next == ',') {
5622                         next += 1;
5623                         continue;
5624                 }
5625 
5626                 if (*next == '-') {
5627                         next += 1;      /* start range */
5628                 } else if (*next == '.') {
5629                         next += 1;
5630                         if (*next == '.')
5631                                 next += 1;      /* start range */
5632                         else
5633                                 goto error;
5634                 }
5635 
5636                 end = strtoul(next, &next, 10);
5637                 if (end <= start)
5638                         goto error;
5639 
5640                 while (++start <= end) {
5641                         if (start >= CPU_SUBSET_MAXCPUS)
5642                                 goto error;
5643                         CPU_SET_S(start, cpu_subset_size, cpu_subset);
5644                 }
5645 
5646                 if (*next == ',')
5647                         next += 1;
5648                 else if (*next != '\0')
5649                         goto error;
5650         }
5651 
5652         return;
5653 
5654 error:
5655         fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
5656         help();
5657         exit(-1);
5658 }
5659 
5660 
5661 void cmdline(int argc, char **argv)
5662 {
5663         int opt;
5664         int option_index = 0;
5665         static struct option long_options[] = {
5666                 {"add",         required_argument,      0, 'a'},
5667                 {"cpu",         required_argument,      0, 'c'},
5668                 {"Dump",        no_argument,            0, 'D'},
5669                 {"debug",       no_argument,            0, 'd'},        /* internal, not documented */
5670                 {"enable",      required_argument,      0, 'e'},
5671                 {"interval",    required_argument,      0, 'i'},
5672                 {"num_iterations",      required_argument,      0, 'n'},
5673                 {"help",        no_argument,            0, 'h'},
5674                 {"hide",        required_argument,      0, 'H'},        // meh, -h taken by --help
5675                 {"Joules",      no_argument,            0, 'J'},
5676                 {"list",        no_argument,            0, 'l'},
5677                 {"out",         required_argument,      0, 'o'},
5678                 {"quiet",       no_argument,            0, 'q'},
5679                 {"show",        required_argument,      0, 's'},
5680                 {"Summary",     no_argument,            0, 'S'},
5681                 {"TCC",         required_argument,      0, 'T'},
5682                 {"version",     no_argument,            0, 'v' },
5683                 {0,             0,                      0,  0 }
5684         };
5685 
5686         progname = argv[0];
5687 
5688         while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
5689                                 long_options, &option_index)) != -1) {
5690                 switch (opt) {
5691                 case 'a':
5692                         parse_add_command(optarg);
5693                         break;
5694                 case 'c':
5695                         parse_cpu_command(optarg);
5696                         break;
5697                 case 'D':
5698                         dump_only++;
5699                         break;
5700                 case 'e':
5701                         /* --enable specified counter */
5702                         bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
5703                         break;
5704                 case 'd':
5705                         debug++;
5706                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
5707                         break;
5708                 case 'H':
5709                         /*
5710                          * --hide: do not show those specified
5711                          *  multiple invocations simply clear more bits in enabled mask
5712                          */
5713                         bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
5714                         break;
5715                 case 'h':
5716                 default:
5717                         help();
5718                         exit(1);
5719                 case 'i':
5720                         {
5721                                 double interval = strtod(optarg, NULL);
5722 
5723                                 if (interval < 0.001) {
5724                                         fprintf(outf, "interval %f seconds is too small\n",
5725                                                 interval);
5726                                         exit(2);
5727                                 }
5728 
5729                                 interval_tv.tv_sec = interval_ts.tv_sec = interval;
5730                                 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
5731                                 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
5732                         }
5733                         break;
5734                 case 'J':
5735                         rapl_joules++;
5736                         break;
5737                 case 'l':
5738                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
5739                         list_header_only++;
5740                         quiet++;
5741                         break;
5742                 case 'o':
5743                         outf = fopen_or_die(optarg, "w");
5744                         break;
5745                 case 'q':
5746                         quiet = 1;
5747                         break;
5748                 case 'n':
5749                         num_iterations = strtod(optarg, NULL);
5750 
5751                         if (num_iterations <= 0) {
5752                                 fprintf(outf, "iterations %d should be positive number\n",
5753                                         num_iterations);
5754                                 exit(2);
5755                         }
5756                         break;
5757                 case 's':
5758                         /*
5759                          * --show: show only those specified
5760                          *  The 1st invocation will clear and replace the enabled mask
5761                          *  subsequent invocations can add to it.
5762                          */
5763                         if (shown == 0)
5764                                 bic_enabled = bic_lookup(optarg, SHOW_LIST);
5765                         else
5766                                 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
5767                         shown = 1;
5768                         break;
5769                 case 'S':
5770                         summary_only++;
5771                         break;
5772                 case 'T':
5773                         tcc_activation_temp_override = atoi(optarg);
5774                         break;
5775                 case 'v':
5776                         print_version();
5777                         exit(0);
5778                         break;
5779                 }
5780         }
5781 }
5782 
5783 int main(int argc, char **argv)
5784 {
5785         outf = stderr;
5786         cmdline(argc, argv);
5787 
5788         if (!quiet)
5789                 print_version();
5790 
5791         probe_sysfs();
5792 
5793         turbostat_init();
5794 
5795         /* dump counters and exit */
5796         if (dump_only)
5797                 return get_and_dump_counters();
5798 
5799         /* list header and exit */
5800         if (list_header_only) {
5801                 print_header(",");
5802                 flush_output_stdout();
5803                 return 0;
5804         }
5805 
5806         /*
5807          * if any params left, it must be a command to fork
5808          */
5809         if (argc - optind)
5810                 return fork_it(argv + optind);
5811         else
5812                 turbostat_loop();
5813 
5814         return 0;
5815 }

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