root/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c

DEFINITIONS

1. bcm6368_nand_intc_ack
2. bcm6368_nand_intc_set
3. bcm6368_nand_probe

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright 2015 Simon Arlott
   4  *
   5  * Derived from bcm63138_nand.c:
   6  * Copyright © 2015 Broadcom Corporation
   7  *
   8  * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
   9  * Copyright 2000-2010 Broadcom Corporation
  10  *
  11  * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
  12  * Copyright 2000-2010 Broadcom Corporation
  13  */
  14 
  15 #include <linux/device.h>
  16 #include <linux/io.h>
  17 #include <linux/ioport.h>
  18 #include <linux/module.h>
  19 #include <linux/of.h>
  20 #include <linux/of_address.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/slab.h>
  23 
  24 #include "brcmnand.h"
  25 
  26 struct bcm6368_nand_soc {
  27         struct brcmnand_soc soc;
  28         void __iomem *base;
  29 };
  30 
  31 #define BCM6368_NAND_INT                0x00
  32 #define  BCM6368_NAND_STATUS_SHIFT      0
  33 #define  BCM6368_NAND_STATUS_MASK       (0xfff << BCM6368_NAND_STATUS_SHIFT)
  34 #define  BCM6368_NAND_ENABLE_SHIFT      16
  35 #define  BCM6368_NAND_ENABLE_MASK       (0xffff << BCM6368_NAND_ENABLE_SHIFT)
  36 #define BCM6368_NAND_BASE_ADDR0 0x04
  37 #define BCM6368_NAND_BASE_ADDR1 0x0c
  38 
  39 enum {
  40         BCM6368_NP_READ         = BIT(0),
  41         BCM6368_BLOCK_ERASE     = BIT(1),
  42         BCM6368_COPY_BACK       = BIT(2),
  43         BCM6368_PAGE_PGM        = BIT(3),
  44         BCM6368_CTRL_READY      = BIT(4),
  45         BCM6368_DEV_RBPIN       = BIT(5),
  46         BCM6368_ECC_ERR_UNC     = BIT(6),
  47         BCM6368_ECC_ERR_CORR    = BIT(7),
  48 };
  49 
  50 static bool bcm6368_nand_intc_ack(struct brcmnand_soc *soc)
  51 {
  52         struct bcm6368_nand_soc *priv =
  53                         container_of(soc, struct bcm6368_nand_soc, soc);
  54         void __iomem *mmio = priv->base + BCM6368_NAND_INT;
  55         u32 val = brcmnand_readl(mmio);
  56 
  57         if (val & (BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT)) {
  58                 /* Ack interrupt */
  59                 val &= ~BCM6368_NAND_STATUS_MASK;
  60                 val |= BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT;
  61                 brcmnand_writel(val, mmio);
  62                 return true;
  63         }
  64 
  65         return false;
  66 }
  67 
  68 static void bcm6368_nand_intc_set(struct brcmnand_soc *soc, bool en)
  69 {
  70         struct bcm6368_nand_soc *priv =
  71                         container_of(soc, struct bcm6368_nand_soc, soc);
  72         void __iomem *mmio = priv->base + BCM6368_NAND_INT;
  73         u32 val = brcmnand_readl(mmio);
  74 
  75         /* Don't ack any interrupts */
  76         val &= ~BCM6368_NAND_STATUS_MASK;
  77 
  78         if (en)
  79                 val |= BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT;
  80         else
  81                 val &= ~(BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT);
  82 
  83         brcmnand_writel(val, mmio);
  84 }
  85 
  86 static int bcm6368_nand_probe(struct platform_device *pdev)
  87 {
  88         struct device *dev = &pdev->dev;
  89         struct bcm6368_nand_soc *priv;
  90         struct brcmnand_soc *soc;
  91         struct resource *res;
  92 
  93         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  94         if (!priv)
  95                 return -ENOMEM;
  96         soc = &priv->soc;
  97 
  98         res = platform_get_resource_byname(pdev,
  99                 IORESOURCE_MEM, "nand-int-base");
 100         priv->base = devm_ioremap_resource(dev, res);
 101         if (IS_ERR(priv->base))
 102                 return PTR_ERR(priv->base);
 103 
 104         soc->ctlrdy_ack = bcm6368_nand_intc_ack;
 105         soc->ctlrdy_set_enabled = bcm6368_nand_intc_set;
 106 
 107         /* Disable and ack all interrupts  */
 108         brcmnand_writel(0, priv->base + BCM6368_NAND_INT);
 109         brcmnand_writel(BCM6368_NAND_STATUS_MASK,
 110                         priv->base + BCM6368_NAND_INT);
 111 
 112         return brcmnand_probe(pdev, soc);
 113 }
 114 
 115 static const struct of_device_id bcm6368_nand_of_match[] = {
 116         { .compatible = "brcm,nand-bcm6368" },
 117         {},
 118 };
 119 MODULE_DEVICE_TABLE(of, bcm6368_nand_of_match);
 120 
 121 static struct platform_driver bcm6368_nand_driver = {
 122         .probe                  = bcm6368_nand_probe,
 123         .remove                 = brcmnand_remove,
 124         .driver = {
 125                 .name           = "bcm6368_nand",
 126                 .pm             = &brcmnand_pm_ops,
 127                 .of_match_table = bcm6368_nand_of_match,
 128         }
 129 };
 130 module_platform_driver(bcm6368_nand_driver);
 131 
 132 MODULE_LICENSE("GPL");
 133 MODULE_AUTHOR("Simon Arlott");
 134 MODULE_DESCRIPTION("NAND driver for BCM6368");