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11 #ifndef _PPC440SPE_ADMA_H
12 #define _PPC440SPE_ADMA_H
13
14 #include <linux/types.h>
15 #include "dma.h"
16 #include "xor.h"
17
18 #define to_ppc440spe_adma_chan(chan) \
19 container_of(chan, struct ppc440spe_adma_chan, common)
20 #define to_ppc440spe_adma_device(dev) \
21 container_of(dev, struct ppc440spe_adma_device, common)
22 #define tx_to_ppc440spe_adma_slot(tx) \
23 container_of(tx, struct ppc440spe_adma_desc_slot, async_tx)
24
25
26 #define PPC440SPE_DEFAULT_POLY 0x4d
27
28 #define PPC440SPE_ADMA_ENGINES_NUM (XOR_ENGINES_NUM + DMA_ENGINES_NUM)
29
30 #define PPC440SPE_ADMA_WATCHDOG_MSEC 3
31 #define PPC440SPE_ADMA_THRESHOLD 1
32
33 #define PPC440SPE_DMA0_ID 0
34 #define PPC440SPE_DMA1_ID 1
35 #define PPC440SPE_XOR_ID 2
36
37 #define PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT 0xFFFFFFUL
38
39 #define PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT (1 << 31)
40 #define PPC440SPE_ADMA_ZERO_SUM_MAX_BYTE_COUNT PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT
41
42 #define PPC440SPE_RXOR_RUN 0
43
44 #define MQ0_CF2H_RXOR_BS_MASK 0x1FF
45
46 #undef ADMA_LL_DEBUG
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62 struct ppc440spe_adma_device {
63 struct device *dev;
64 struct dma_regs __iomem *dma_reg;
65 struct xor_regs __iomem *xor_reg;
66 struct i2o_regs __iomem *i2o_reg;
67 int id;
68 void *dma_desc_pool_virt;
69 dma_addr_t dma_desc_pool;
70 size_t pool_size;
71 int irq;
72 int err_irq;
73 struct dma_device common;
74 };
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93 struct ppc440spe_adma_chan {
94 spinlock_t lock;
95 struct ppc440spe_adma_device *device;
96 struct list_head chain;
97 struct dma_chan common;
98 struct list_head all_slots;
99 struct ppc440spe_adma_desc_slot *last_used;
100 int pending;
101 int slots_allocated;
102 int hw_chain_inited;
103 struct tasklet_struct irq_tasklet;
104 u8 needs_unmap;
105 struct page *pdest_page;
106 struct page *qdest_page;
107 dma_addr_t pdest;
108 dma_addr_t qdest;
109 };
110
111 struct ppc440spe_rxor {
112 u32 addrl;
113 u32 addrh;
114 int len;
115 int xor_count;
116 int addr_count;
117 int desc_count;
118 int state;
119 };
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146 struct ppc440spe_adma_desc_slot {
147 dma_addr_t phys;
148 struct ppc440spe_adma_desc_slot *group_head;
149 struct ppc440spe_adma_desc_slot *hw_next;
150 struct dma_async_tx_descriptor async_tx;
151 struct list_head slot_node;
152 struct list_head chain_node;
153 struct list_head group_list;
154 unsigned int unmap_len;
155 void *hw_desc;
156 u16 stride;
157 u16 idx;
158 u16 slot_cnt;
159 u8 src_cnt;
160 u8 dst_cnt;
161 u8 slots_per_op;
162 u8 descs_per_op;
163 unsigned long flags;
164 unsigned long reverse_flags[8];
165
166 #define PPC440SPE_DESC_INT 0
167 #define PPC440SPE_ZERO_P 1
168 #define PPC440SPE_ZERO_Q 2
169 #define PPC440SPE_COHERENT 3
170
171 #define PPC440SPE_DESC_WXOR 4
172 #define PPC440SPE_DESC_RXOR 5
173
174 #define PPC440SPE_DESC_RXOR123 8
175 #define PPC440SPE_DESC_RXOR124 9
176 #define PPC440SPE_DESC_RXOR125 10
177 #define PPC440SPE_DESC_RXOR12 11
178 #define PPC440SPE_DESC_RXOR_REV 12
179
180 #define PPC440SPE_DESC_PCHECK 13
181 #define PPC440SPE_DESC_QCHECK 14
182
183 #define PPC440SPE_DESC_RXOR_MSK 0x3
184
185 struct ppc440spe_rxor rxor_cursor;
186
187 union {
188 u32 *xor_check_result;
189 u32 *crc32_result;
190 };
191 };
192
193 #endif